From: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Cc: stable@kernel.org
Subject: Re: [PATCH] drm/i915: Sanitize BIOS debugging bits from PIPECONF
Date: Fri, 30 Mar 2012 17:15:08 +0100 [thread overview]
Message-ID: <1333124127_158564@CP5-2952> (raw)
In-Reply-To: <1332428450-13348-1-git-send-email-chris@chris-wilson.co.uk>
On Thu, 22 Mar 2012 15:00:50 +0000, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> Quoting the BSpec from time immemorial:
>
> PIPEACONF, bits 28:27: Frame Start Delay (Debug)
>
> Used to delay the frame start signal that is sent to the display planes.
> Care must be taken to insure that there are enough lines during VBLANK
> to support this setting.
>
> An instance of the BIOS leaving these bits set was found in the wild,
> where it caused our modesetting to go all squiffy and skewiff.
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=47271
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: stable@kernel.org
Reported-and-tested-by: Carl Richell <carl@system76.com>
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=43012
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
prev parent reply other threads:[~2012-03-30 16:15 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-03-22 15:00 [PATCH] drm/i915: Sanitize BIOS debugging bits from PIPECONF Chris Wilson
2012-03-22 15:40 ` Eugeni Dodonov
2012-03-30 16:15 ` Chris Wilson [this message]
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