From: Heiko Stuebner <heiko@sntech.de>
To: Xing Zheng <zhengxing@rock-chips.com>
Cc: linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org,
Michael Turquette <mturquette@baylibre.com>,
Yakir Yang <ykk@rock-chips.com>,
Stephen Boyd <sboyd@codeaurora.org>,
linux-kernel@vger.kernel.org, Kumar Gala <galak@codeaurora.org>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Rob Herring <robh+dt@kernel.org>,
Jeffy Chen <jeffy.chen@rock-chips.com>,
Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Caesar Wang <wxt@rock-chips.com>,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 0/5] Fix and improve clock controller for the RK322x SoCs
Date: Wed, 22 Jun 2016 01:07:29 +0200 [thread overview]
Message-ID: <13345941.K3V3BNYxTY@phil> (raw)
In-Reply-To: <1466484811-26923-1-git-send-email-zhengxing@rock-chips.com>
Am Dienstag, 21. Juni 2016, 12:53:26 schrieb Xing Zheng:
> Hi,
> These patchset fix some clocks bugs, and improve clock configuration
> for i2s/spdif/MAC on RK322x SoCs.
applied to my clock-branch with the following changes:
- fixed the error in patch1 - missing ")" in
COMPOSITE_FRAC(0, "i2s1_frac", "i2s1_src", CLK_SET_RATE_PARENT,
- RK3288_CLKSEL_CON(7), 0,
- RK3288_CLKGATE_CON(0), 11, GFLAGS),
+ RK2928_CLKSEL_CON(7), 0,
+ RK2928_CLKGATE_CON(0), 11, GFLAGS,
- adapted patch2 accordingly
- split out clock id addition into separate patches, as they need a shared
branch. Xing please remember to add clock-ids to the header in separate
patches.
Heiko
WARNING: multiple messages have this Message-ID (diff)
From: heiko@sntech.de (Heiko Stuebner)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 0/5] Fix and improve clock controller for the RK322x SoCs
Date: Wed, 22 Jun 2016 01:07:29 +0200 [thread overview]
Message-ID: <13345941.K3V3BNYxTY@phil> (raw)
In-Reply-To: <1466484811-26923-1-git-send-email-zhengxing@rock-chips.com>
Am Dienstag, 21. Juni 2016, 12:53:26 schrieb Xing Zheng:
> Hi,
> These patchset fix some clocks bugs, and improve clock configuration
> for i2s/spdif/MAC on RK322x SoCs.
applied to my clock-branch with the following changes:
- fixed the error in patch1 - missing ")" in
COMPOSITE_FRAC(0, "i2s1_frac", "i2s1_src", CLK_SET_RATE_PARENT,
- RK3288_CLKSEL_CON(7), 0,
- RK3288_CLKGATE_CON(0), 11, GFLAGS),
+ RK2928_CLKSEL_CON(7), 0,
+ RK2928_CLKGATE_CON(0), 11, GFLAGS,
- adapted patch2 accordingly
- split out clock id addition into separate patches, as they need a shared
branch. Xing please remember to add clock-ids to the header in separate
patches.
Heiko
next prev parent reply other threads:[~2016-06-21 23:07 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-21 4:53 [PATCH 0/5] Fix and improve clock controller for the RK322x SoCs Xing Zheng
2016-06-21 4:53 ` Xing Zheng
2016-06-21 4:53 ` Xing Zheng
2016-06-21 4:53 ` [PATCH 1/5] clk: rockchip: rk3228: fix incorrect clock node names Xing Zheng
2016-06-21 4:53 ` Xing Zheng
2016-06-21 4:53 ` Xing Zheng
2016-06-21 16:01 ` kbuild test robot
2016-06-21 16:01 ` kbuild test robot
2016-06-21 16:01 ` kbuild test robot
2016-06-21 4:53 ` [PATCH 2/5] clk: rockchip: rk3228: include downstream muxes into fractional dividers Xing Zheng
2016-06-21 4:53 ` Xing Zheng
2016-06-21 4:53 ` Xing Zheng
2016-06-21 4:53 ` [PATCH 3/5] clk: rockchip: rk3228: export related i2s/spdif clocks Xing Zheng
2016-06-21 4:53 ` Xing Zheng
2016-06-21 4:53 ` Xing Zheng
2016-06-21 4:53 ` [PATCH 4/5] clk: rockchip: rk3228: rename sclk_macphy_50m to sclk_mac_extclk Xing Zheng
2016-06-21 4:53 ` Xing Zheng
2016-06-21 4:53 ` Xing Zheng
2016-06-21 4:59 ` [PATCH 5/5] clk: rockchip: rk3228: export related MAC clocks Xing Zheng
2016-06-21 4:59 ` Xing Zheng
2016-06-21 4:59 ` Xing Zheng
2016-06-21 23:07 ` Heiko Stuebner [this message]
2016-06-21 23:07 ` [PATCH 0/5] Fix and improve clock controller for the RK322x SoCs Heiko Stuebner
2016-06-22 1:10 ` Xing Zheng
2016-06-22 1:10 ` Xing Zheng
2016-06-22 1:10 ` Xing Zheng
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