Re: PowerPC radeon KMS - is it possible?

["Michel Dänzer" <michel@daenzer.net>]

On Mit, 2012-04-18 at 21:19 +1000, Benjamin Herrenschmidt wrote:=20
> On Wed, 2012-04-18 at 12:44 +0200, Michel D=C3=A4nzer wrote:
> > On Mit, 2012-04-18 at 12:34 +0200, Michel D=C3=A4nzer wrote:=20
> > > On Mit, 2012-04-18 at 20:20 +1000, Benjamin Herrenschmidt wrote:=20
> > > >=20
> > > > I suspect there's a fundamental design issue with apple bridge in t=
hat
> > > > the CPU to memory path isn't coherent at all with the GPU to memory=
 path
> > > > ie. even vs. cache flush instructions (ie buffers in the memory
> > > > controllers can still be out of sync).
> > > >=20
> > > > Darwin does some gross hacks to work around that, some of them visi=
ble
> > > > in the AGP drivers, some burried in the Apple driver, I don't know =
for
> > > > sure. It's possible that they end up mapping all AGP memory as cach=
e
> > > > inhibited, but we can't do that because of our linear mapping.
> > >=20
> > > We are doing that though...
> >=20
> > This reminded me, I've been running with the patch below, but I'm not
> > sure it makes any difference. Maybe Andreas or Jordan can try it.
>=20
> It certainly is something we need to do, provided we also know there
> will be no subsequent access to that page via a cachable mapping until
> it's removed from AGP.

TTM should take care of that.


--=20
Earthling Michel D=C3=A4nzer           |                   http://www.amd.c=
om
Libre software enthusiast         |          Debian, X and DRI developer