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From: Jia Liu <proljc@gmail.com>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH 12/15] Openrisc: add gdb stub support
Date: Thu, 17 May 2012 16:35:55 +0800	[thread overview]
Message-ID: <1337243758-11802-13-git-send-email-proljc@gmail.com> (raw)
In-Reply-To: <1337243758-11802-1-git-send-email-proljc@gmail.com>

add the qemu gdb stub support for openrisc.

Signed-off-by: Jia Liu <proljc@gmail.com>
---
 gdbstub.c |   64 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 64 insertions(+)

diff --git a/gdbstub.c b/gdbstub.c
index 6a77a66..fb86f22 100644
--- a/gdbstub.c
+++ b/gdbstub.c
@@ -1155,6 +1155,68 @@ static int cpu_gdb_write_register(CPUMIPSState *env, uint8_t *mem_buf, int n)
 
     return sizeof(target_ulong);
 }
+#elif defined(TARGET_OPENRISC)
+
+#define NUM_CORE_REGS (32 + 3)
+
+static int cpu_gdb_read_register(CPUOPENRISCState *env, uint8_t *mem_buf, int n)
+{
+    if (n < 32) {
+        GET_REG32(env->gpr[n]);
+    } else {
+        switch (n) {
+        case 32:    /* PPC */
+            GET_REG32(env->ppc);
+            break;
+
+        case 33:    /* NPC */
+            GET_REG32(env->npc);
+            break;
+
+        case 34:    /* SR */
+            GET_REG32(env->sr);
+            break;
+
+        default:
+            break;
+        }
+    }
+    return 0;
+}
+
+static int cpu_gdb_write_register(CPUOPENRISCState *env,
+                                  uint8_t *mem_buf, int n)
+{
+    uint32_t tmp;
+
+    if (n > NUM_CORE_REGS) {
+        return 0;
+    }
+
+    tmp = ldl_p(mem_buf);
+
+    if (n < 32) {
+        env->gpr[n] = tmp;
+    } else {
+        switch (n) {
+        case 32: /* PPC */
+            env->ppc = tmp;
+            break;
+
+        case 33: /* NPC */
+            env->npc = tmp;
+            break;
+
+        case 34: /* SR */
+            env->sr = tmp;
+            break;
+
+        default:
+            break;
+        }
+    }
+    return 4;
+}
 #elif defined (TARGET_SH4)
 
 /* Hint: Use "set architecture sh4" in GDB to see fpu registers */
@@ -1924,6 +1986,8 @@ static void gdb_set_cpu_pc(GDBState *s, target_ulong pc)
     }
 #elif defined (TARGET_MICROBLAZE)
     s->c_cpu->sregs[SR_PC] = pc;
+#elif defined(TARGET_OPENRISC)
+    s->c_cpu->pc = pc;
 #elif defined (TARGET_CRIS)
     s->c_cpu->pc = pc;
 #elif defined (TARGET_ALPHA)
-- 
1.7.9.5

  parent reply	other threads:[~2012-05-17  8:39 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-05-17  8:35 [Qemu-devel] [PATCH 00/15] Qemu Openrisc support Jia Liu
2012-05-17  8:35 ` [Qemu-devel] [PATCH 01/15] Openrisc: add target stub Jia Liu
2012-05-17  9:38   ` 陳韋任
2012-05-17 14:14   ` Andreas Färber
2012-05-18  1:34     ` Jia Liu
2012-05-18  2:30       ` 陳韋任
2012-05-18  2:56       ` 陳韋任
2012-05-20 14:14         ` Andreas Färber
2012-05-21  3:01     ` Jia Liu
2012-05-19  8:51   ` Blue Swirl
2012-05-20 14:11     ` Andreas Färber
2012-05-21  6:25     ` Jia Liu
2012-05-17  8:35 ` [Qemu-devel] [PATCH 02/15] Openrisc: add MMU support Jia Liu
2012-05-19  7:41   ` Blue Swirl
2012-05-21  6:24     ` Jia Liu
2012-05-21  9:03       ` 陳韋任
2012-05-21 17:41         ` Blue Swirl
2012-05-17  8:35 ` [Qemu-devel] [PATCH 03/15] Openrisc: add instructions translation Jia Liu
2012-05-17 12:11   ` Max Filippov
2012-05-18  1:04     ` Jia Liu
2012-05-18  3:53       ` 陳韋任
2012-05-18 10:33       ` Max Filippov
2012-05-19 10:02   ` Blue Swirl
2012-05-19 10:57     ` Peter Maydell
2012-05-19 11:29       ` Blue Swirl
2012-05-23  6:11     ` Jia Liu
2012-05-23 18:59       ` Blue Swirl
2012-05-25 23:50         ` Jia Liu
2012-05-26  0:37         ` Jia Liu
2012-05-17  8:35 ` [Qemu-devel] [PATCH 04/15] Openrisc: add interrupt support Jia Liu
2012-05-19  7:30   ` Blue Swirl
2012-05-23  7:06     ` Jia Liu
2012-05-17  8:35 ` [Qemu-devel] [PATCH 05/15] Openrisc: add exception support Jia Liu
2012-05-19  7:22   ` Blue Swirl
2012-05-23  7:09     ` Jia Liu
2012-05-23 19:11       ` Blue Swirl
2012-05-25  1:25         ` Jia Liu
2012-05-17  8:35 ` [Qemu-devel] [PATCH 06/15] Openrisc: add int instruction helpers Jia Liu
2012-05-17  8:35 ` [Qemu-devel] [PATCH 07/15] Openrisc: add float " Jia Liu
2012-05-19  8:29   ` Blue Swirl
2012-05-23  7:21     ` Jia Liu
2012-05-17  8:35 ` [Qemu-devel] [PATCH 08/15] Openrisc: add programmable interrupt controller support Jia Liu
2012-05-19  8:33   ` Blue Swirl
2012-05-17  8:35 ` [Qemu-devel] [PATCH 09/15] Openrisc: add timer support Jia Liu
2012-05-17  8:35 ` [Qemu-devel] [PATCH 10/15] Openrisc: add a simulation board Jia Liu
2012-05-19  7:51   ` Blue Swirl
2012-05-23  7:54     ` Jia Liu
2012-05-23 19:17       ` Blue Swirl
2012-05-25  2:31         ` Jia Liu
2012-05-17  8:35 ` [Qemu-devel] [PATCH 11/15] Openrisc: add system instruction helpers Jia Liu
2012-05-17  8:35 ` Jia Liu [this message]
2012-05-17  8:35 ` [Qemu-devel] [PATCH 13/15] Openrisc: add linux syscall, signal and termbits Jia Liu
2012-05-19  7:17   ` Blue Swirl
2012-05-19  8:57     ` Jia Liu
2012-05-17  8:35 ` [Qemu-devel] [PATCH 14/15] Openrisc: add linux user support Jia Liu
2012-05-17  8:35 ` [Qemu-devel] [PATCH 15/15] Openrisc: add testcases Jia Liu

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