[U-Boot] [PATCH 1/6] h2200: Add support for iPAQ h2200

["Łukasz Dałek" <luk0104@gmail.com>]

Signed-off-by: ?ukasz Da?ek <luk0104@gmail.com>
---
 arch/arm/include/asm/mach-types.h |    1 +
 board/h2200/Makefile              |   51 ++++++++++
 board/h2200/h2200-header.S        |   27 +++++
 board/h2200/h2200.c               |  197 +++++++++++++++++++++++++++++++++++++
 board/h2200/h2200.h               |   28 +++++
 boards.cfg                        |    2 +
 include/configs/h2200.h           |  168 +++++++++++++++++++++++++++++++
 7 files changed, 474 insertions(+), 0 deletions(-)
 create mode 100644 board/h2200/Makefile
 create mode 100644 board/h2200/h2200-header.S
 create mode 100644 board/h2200/h2200.c
 create mode 100644 board/h2200/h2200.h
 create mode 100644 include/configs/h2200.h

diff --git a/arch/arm/include/asm/mach-types.h b/arch/arm/include/asm/mach-types.h
index 2d5c3bc..b03f385 100644
--- a/arch/arm/include/asm/mach-types.h
+++ b/arch/arm/include/asm/mach-types.h
@@ -74,6 +74,7 @@ extern unsigned int __machine_arch_type;
 #define MACH_TYPE_IXDP2801             300
 #define MACH_TYPE_IQ31244              327
 #define MACH_TYPE_BAST                 331
+#define MACH_TYPE_H2200                341
 #define MACH_TYPE_H1940                347
 #define MACH_TYPE_ENP2611              356
 #define MACH_TYPE_S3C2440              362
diff --git a/board/h2200/Makefile b/board/h2200/Makefile
new file mode 100644
index 0000000..39da114
--- /dev/null
+++ b/board/h2200/Makefile
@@ -0,0 +1,51 @@
+#
+# h2200 Support
+#
+# Copyright (C) 2012 ?ukasz Da?ek <luk0104@gmail.com>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= $(obj)lib$(BOARD).o
+
+COBJS	:= h2200.o
+
+SRCS	:= $(COBJS:.o=.c) h2200-header.S
+OBJS	:= $(addprefix $(obj),$(COBJS))
+
+ALL: $(LIB) h2200-header.bin
+
+h2200-header.o: h2200-header.S
+	$(CC) $(CFLAGS) -c -o $@ $<
+
+h2200-header.bin: h2200-header.o
+	$(OBJCOPY) -O binary $< $@
+
+all: $(LIB) h2200-header.bin
+
+$(LIB):	$(obj).depend $(OBJS)
+	$(call cmd_link_o_target, $(OBJS))
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/h2200/h2200-header.S b/board/h2200/h2200-header.S
new file mode 100644
index 0000000..146795f
--- /dev/null
+++ b/board/h2200/h2200-header.S
@@ -0,0 +1,27 @@
+/*
+ * iPAQ h2200 header
+ *
+ * Copyright (C) 2012 ?ukasz Da?ek <luk0104@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+	.word 0xea0003fe /* b 0x1000 */
+
+	.org 0x40
+	.ascii "ECEC"
+
+	.org 0x1000 - 1
+	.byte 0x0
diff --git a/board/h2200/h2200.c b/board/h2200/h2200.c
new file mode 100644
index 0000000..d31c67f
--- /dev/null
+++ b/board/h2200/h2200.c
@@ -0,0 +1,197 @@
+/*
+ * iPAQ h2200 board configuration
+ *
+ * Copyright (C) 2012 ?ukasz Da?ek <luk0104@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#include <common.h>
+#include <asm/arch/pxa.h>
+#include <asm/arch/pxa-regs.h>
+#include <asm/io.h>
+#include "h2200.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_H2200_USBETH
+int board_eth_init(bd_t *bis)
+{
+	usb_eth_initialize(bis);
+	return 0;
+}
+#endif
+
+int board_early_init_f(void)
+{
+	/* Enable serial */
+	setbits_le32(GPDR0, 1 << 24);
+	writel(1 << 24, GPSR0);
+
+	/* Enable serial transreceiver */
+	setbits_le32(GPDR2, 1 << 16);
+	writel(1 << 16, GPSR2);
+
+	return 0;
+}
+
+int board_init(void)
+{
+	/* We have RAM, disable cache */
+	dcache_disable();
+	icache_disable();
+
+	/* arch number of Lubbock-Board */
+	gd->bd->bi_arch_number = MACH_TYPE_H2200;
+
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = 0xa0000100;
+
+#if defined(CONFIG_H2200_USBETH)
+	udc_disconnect();
+	mdelay(500);
+#endif
+
+	return 0;
+}
+
+/*
+ * iPAQ h2200 has two stage bootloader.
+ * We only replace 2nd stage, so u-boot needs to be
+ * adpopted to the way how 1st stage bootloader works.
+ * Firstly, code needs to have first 4 bytes equal to
+ * 0xea0003fe (arm instruction b 0x1000) and at the offset
+ * 0x40 ascii characters 'ECEC', secondly 1st stage
+ * loads code from flash into SDRAM at address 0xa0040000
+ * so all instructions which reinitializes memory
+ * controller have to be disabled.
+ */
+
+static inline void writelrb(uint32_t val, uint32_t addr)
+{
+	writel(val, addr);
+	asm volatile("" : : : "memory");
+	readl(addr);
+	asm volatile("" : : : "memory");
+}
+
+static void h2200_pxa2xx_dram_init(void)
+{
+	uint32_t tmp;
+	int i;
+
+	/*
+	 * 1) Initialize Asynchronous static memory controller
+	 */
+
+	writelrb(CONFIG_SYS_MSC0_VAL, MSC0);
+	writelrb(CONFIG_SYS_MSC1_VAL, MSC1);
+	writelrb(CONFIG_SYS_MSC2_VAL, MSC2);
+
+	/*
+	 * 2) Initialize Card Interface
+	 */
+
+	/* MECR: Memory Expansion Card Register */
+	writelrb(CONFIG_SYS_MECR_VAL, MECR);
+	/* MCMEM0: Card Interface slot 0 timing */
+	writelrb(CONFIG_SYS_MCMEM0_VAL, MCMEM0);
+	/* MCMEM1: Card Interface slot 1 timing */
+	writelrb(CONFIG_SYS_MCMEM1_VAL, MCMEM1);
+	/* MCATT0: Card Interface Attribute Space Timing, slot 0 */
+	writelrb(CONFIG_SYS_MCATT0_VAL, MCATT0);
+	/* MCATT1: Card Interface Attribute Space Timing, slot 1 */
+	writelrb(CONFIG_SYS_MCATT1_VAL, MCATT1);
+	/* MCIO0: Card Interface I/O Space Timing, slot 0 */
+	writelrb(CONFIG_SYS_MCIO0_VAL, MCIO0);
+	/* MCIO1: Card Interface I/O Space Timing, slot 1 */
+	writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1);
+
+	/*
+	 * 3) Configure Fly-By DMA register
+	 */
+
+	writelrb(CONFIG_SYS_FLYCNFG_VAL, FLYCNFG);
+
+	/*
+	 * 4) Initialize Synchronous Static Memory (Flash/Peripherals)
+	 */
+
+	/* Initialize SXCNFG register. Assert the enable bits.
+	 *
+	 * Write SXMRS to cause an MRS command to all enabled banks of
+	 * synchronous static memory. Note that SXLCR need not be written
+	 * at this time.
+	 */
+
+	writelrb(CONFIG_SYS_SXCNFG_VAL, SXCNFG);
+
+	/*
+	 * 5) Initialize SDRAM
+	 */
+
+	writelrb(CONFIG_SYS_MDREFR_VAL & ~MDREFR_SLFRSH, MDREFR);
+	writelrb(CONFIG_SYS_MDREFR_VAL | MDREFR_E1PIN, MDREFR);
+
+	/*
+	 * 6) Trigger a number (usually 8) refresh cycles by attempting
+	 *    non-burst read or write accesses to disabled SDRAM, as commonly
+	 *    specified in the power up sequence documented in SDRAM data
+	 *    sheets. The address(es) used for this purpose must not be
+	 *    cacheable.
+	 */
+	for (i = 9; i >= 0; i--) {
+		writel(i, 0xa0000000);
+		asm volatile("" : : : "memory");
+	}
+
+	/*
+	 * 7) Write MDCNFG with enable bits asserted (MDCNFG:DEx set to 1).
+	 */
+
+	tmp = CONFIG_SYS_MDCNFG_VAL &
+		(MDCNFG_DE0 | MDCNFG_DE1 | MDCNFG_DE2 | MDCNFG_DE3);
+	tmp |= readl(MDCNFG);
+	writelrb(tmp, MDCNFG);
+
+	/*
+	 * 8) Write MDMRS.
+	 */
+
+	writelrb(CONFIG_SYS_MDMRS_VAL, MDMRS);
+
+	/*
+	 * 9) Enable APD
+	 */
+
+	if (CONFIG_SYS_MDREFR_VAL & MDREFR_APD) {
+		tmp = readl(MDREFR);
+		tmp |= MDREFR_APD;
+		writelrb(tmp, MDREFR);
+	}
+}
+
+int dram_init(void)
+{
+	h2200_pxa2xx_dram_init();
+	gd->ram_size = PHYS_SDRAM_1_SIZE;
+	return 0;
+}
+
+void dram_init_banksize(void)
+{
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+}
diff --git a/board/h2200/h2200.h b/board/h2200/h2200.h
new file mode 100644
index 0000000..4392d6f
--- /dev/null
+++ b/board/h2200/h2200.h
@@ -0,0 +1,28 @@
+/*
+ * iPAQ h2200 board configuration
+ *
+ * Copyright (C) 2012 ?ukasz Da?ek <luk0104@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ */
+
+#ifndef __IPAQ_H2200_H
+#define __IPAQ_H2200_H
+
+#if defined(CONFIG_H2200_USBETH)
+extern void udc_disconnect(void);
+#endif
+
+#endif /* __IPAQ_H2200_H */
diff --git a/boards.cfg b/boards.cfg
index 72e7803..e40cc41 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -283,6 +283,8 @@ dvlhost                      arm         ixp
 pdnb3                        arm         ixp         pdnb3               prodrive
 scpu                         arm         ixp         pdnb3               prodrive       -           pdnb3:SCPU
 balloon3                     arm         pxa
+h2200                        arm         pxa
+h2200_usbeth                 arm         pxa         h2200               -              -           h2200:H2200_USBETH
 lubbock                      arm         pxa
 palmld                       arm         pxa
 palmtc                       arm         pxa
diff --git a/include/configs/h2200.h b/include/configs/h2200.h
new file mode 100644
index 0000000..fb4ec05
--- /dev/null
+++ b/include/configs/h2200.h
@@ -0,0 +1,168 @@
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_CPU_PXA25X		1
+#define CONFIG_BOARD_H2200		1
+
+#define CONFIG_SYS_NO_FLASH		1
+
+#define CONFIG_SYS_HZ			1000
+
+#define CONFIG_NR_DRAM_BANKS		1
+#define PHYS_SDRAM_1			0xa0000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE		0x04000000 /* 64 MB */
+
+#define CONFIG_SYS_DRAM_BASE		PHYS_SDRAM_1
+#define CONFIG_SYS_DRAM_SIZE		PHYS_SDRAM_1_SIZE
+
+#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
+#define CONFIG_SYS_INIT_SP_ADDR		0xfffff800
+
+#define CONFIG_ENV_SIZE			0x00040000
+#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128*1024)
+
+#define CONFIG_ENV_IS_NOWHERE		1
+#define CONFIG_SYS_MAXARGS		16
+#define CONFIG_SYS_LOAD_ADDR		0xa3000000 /* default load address */
+
+/*
+ * iPAQ 1st stage bootloader loads 2nd stage bootloader
+ * at address 0xa0040000 but bootloader requires header
+ * which is 0x1000 long.
+ *
+ * --- Header begin ---
+ *	.word 0xea0003fe ; b 0x1000
+ *
+ *	.org 0x40
+ *	.ascii "ECEC"
+ *
+ *	.org 0x1000
+ * --- Header end ---
+ */
+
+#define CONFIG_SYS_TEXT_BASE		0xa0041000
+#define CONFIG_BOARD_EARLY_INIT_F	1
+
+/*
+ * Static chips
+ */
+
+#define CONFIG_SYS_MSC0_VAL		0x246c7ffc
+#define CONFIG_SYS_MSC1_VAL		0x7ff07ff0
+#define CONFIG_SYS_MSC2_VAL		0x7ff07ff0
+
+/*
+ * PCMCIA and CF Interfaces
+ */
+
+#define CONFIG_SYS_MECR_VAL		0x00000002
+#define CONFIG_SYS_MCMEM0_VAL		0x0002449D
+#define CONFIG_SYS_MCMEM1_VAL		0x00000000
+#define CONFIG_SYS_MCATT0_VAL		0x0002449D
+#define CONFIG_SYS_MCATT1_VAL		0x00000000
+#define CONFIG_SYS_MCIO0_VAL		0x00014290
+#define CONFIG_SYS_MCIO1_VAL		0x00000000
+
+#define CONFIG_SYS_FLYCNFG_VAL		0x00000000
+#define CONFIG_SYS_SXCNFG_VAL		0x00040004
+
+#define CONFIG_SYS_MDREFR_VAL		0x0099E018
+#define CONFIG_SYS_MDCNFG_VAL		0x01C801CB
+#define CONFIG_SYS_MDMRS_VAL		0x00220022
+
+#define CONFIG_SYS_PSSR_VAL		0x00000000
+#define CONFIG_SYS_CKEN			0x00004840
+#define CONFIG_SYS_CCCR			0x00000161
+
+/*
+ * GPIOs
+ */
+
+#define CONFIG_SYS_GPSR0_VAL		0x00000000
+#define CONFIG_SYS_GPSR1_VAL		0x00000000
+#define CONFIG_SYS_GPSR2_VAL		0x00000000
+
+#define CONFIG_SYS_GPCR0_VAL		0x00000000
+#define CONFIG_SYS_GPCR1_VAL		0x00000000
+#define CONFIG_SYS_GPCR2_VAL		0x00000000
+
+#define CONFIG_SYS_GPDR0_VAL		0xF7E38C00
+#define CONFIG_SYS_GPDR1_VAL		0xBCFFBF83
+#define CONFIG_SYS_GPDR2_VAL		0x000157FF
+
+#define CONFIG_SYS_GAFR0_L_VAL		0x80401000
+#define CONFIG_SYS_GAFR0_U_VAL		0x00000112
+#define CONFIG_SYS_GAFR1_L_VAL		0x600A9550
+#define CONFIG_SYS_GAFR1_U_VAL		0x0005AAAA
+#define CONFIG_SYS_GAFR2_L_VAL		0x20000000
+#define CONFIG_SYS_GAFR2_U_VAL		0x00000000
+
+/*
+ * Serial port
+ */
+
+#define CONFIG_PXA_SERIAL		1
+#define CONFIG_FFUART			1
+
+#define CONFIG_BAUDRATE			115200
+#define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }
+
+/*
+ * USB device configuration
+ */
+
+#define CONFIG_SYS_CONSOLE_IS_IN_ENV	1
+#define CONFIG_USB_DEV_PULLUP_GPIO	33
+/* USB VBUS GPIO 3 */
+
+#define CONFIG_CMD_LOADB		1
+#define CONFIG_CMD_IMPORTENV		1
+#define CONFIG_CMD_SOURCE		1
+#define CONFIG_CMD_RUN			1
+#define CONFIG_CMD_IMI			1
+
+/* Monitor Command Prompt */
+#define CONFIG_SYS_PROMPT		"> "
+
+/* Console I/O Buffer Size */
+#define CONFIG_SYS_CBSIZE		256
+
+/* Print Buffer Size */
+#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
+					sizeof(CONFIG_SYS_PROMPT) + 16)
+
+#define CONFIG_BOOTARGS "root=/dev/ram0 ro console=ttyS0,115200n8"
+
+#ifdef CONFIG_H2200_USBETH
+# define CONFIG_USB_ETH_SUBSET		1
+# define CONFIG_SYS_HUSH_PARSER		1
+# define CONFIG_SYS_PROMPT_HUSH_PS2	"$ "
+
+# define CONFIG_CMD_NET			1
+# define CONFIG_CMD_PING		1
+
+# define CONFIG_BOOTDELAY		2
+
+# define CONFIG_BOOTCOMMAND		\
+	"setenv downloaded 0 ; while test $downloaded -eq 0 ; do " \
+	"if bootp ; then setenv downloaded 1 ; fi ; done ; " \
+	"source :script ; " \
+	"bootm ; "
+
+# define CONFIG_USB_GADGET_PXA2XX	1
+
+# define CONFIG_FIT			1
+# define CONFIG_SETUP_MEMORY_TAGS	1
+# define CONFIG_CMDLINE_TAG		1
+# define CONFIG_INITRD_TAG		1
+
+# define CONFIG_USB_ETHER		1
+# define CONFIG_USBNET_DEV_ADDR		"de:ad:be:ef:00:01"
+# define CONFIG_USBNET_HOST_ADDR	"de:ad:be:ef:00:02"
+# define CONFIG_EXTRA_ENV_SETTINGS \
+	"stdin=serial\0" \
+	"stdout=serial\0" \
+	"stderr=serial\0"
+#endif
+
+#endif /* __CONFIG_H */
-- 
1.7.8.6