From: Aurelien Jarno <aurelien@aurel32.net>
To: qemu-devel@nongnu.org
Cc: Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-devel] [PATCH 02/10] tcg/mips: kill warnings in user mode
Date: Fri, 21 Sep 2012 18:43:21 +0200 [thread overview]
Message-ID: <1348245809-13482-3-git-send-email-aurelien@aurel32.net> (raw)
In-Reply-To: <1348245809-13482-1-git-send-email-aurelien@aurel32.net>
Recent versions of GCC emit warnings when compiling user mode targets.
Kill them by reordering a bit the #ifdef.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
tcg/mips/tcg-target.c | 84 +++++++++++++++++++++++++------------------------
1 file changed, 43 insertions(+), 41 deletions(-)
diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
index 9293745..a09c0d6 100644
--- a/tcg/mips/tcg-target.c
+++ b/tcg/mips/tcg-target.c
@@ -842,18 +842,16 @@ static const void * const qemu_st_helpers[4] = {
static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
int opc)
{
- int addr_regl, addr_meml;
- int data_regl, data_regh, data_reg1, data_reg2;
- int mem_index, s_bits;
+ int addr_regl, data_regl, data_regh, data_reg1, data_reg2;
#if defined(CONFIG_SOFTMMU)
void *label1_ptr, *label2_ptr;
int arg_num;
-#endif
-#if TARGET_LONG_BITS == 64
-# if defined(CONFIG_SOFTMMU)
+ int mem_index, s_bits;
+ int addr_meml;
+# if TARGET_LONG_BITS == 64
uint8_t *label3_ptr;
-# endif
int addr_regh, addr_memh;
+# endif
#endif
data_regl = *args++;
if (opc == 3)
@@ -861,11 +859,22 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
else
data_regh = 0;
addr_regl = *args++;
-#if TARGET_LONG_BITS == 64
+#if defined(CONFIG_SOFTMMU)
+# if TARGET_LONG_BITS == 64
addr_regh = *args++;
-#endif
+# if defined(TCG_TARGET_WORDS_BIGENDIAN)
+ addr_memh = 0;
+ addr_meml = 4;
+# else
+ addr_memh = 4;
+ addr_meml = 0;
+# endif
+# else
+ addr_meml = 0;
+# endif
mem_index = *args;
s_bits = opc & 3;
+#endif
if (opc == 3) {
#if defined(TCG_TARGET_WORDS_BIGENDIAN)
@@ -879,18 +888,6 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
data_reg1 = data_regl;
data_reg2 = 0;
}
-#if TARGET_LONG_BITS == 64
-# if defined(TCG_TARGET_WORDS_BIGENDIAN)
- addr_memh = 0;
- addr_meml = 4;
-# else
- addr_memh = 4;
- addr_meml = 0;
-# endif
-#else
- addr_meml = 0;
-#endif
-
#if defined(CONFIG_SOFTMMU)
tcg_out_opc_sa(s, OPC_SRL, TCG_REG_A0, addr_regl, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
tcg_out_opc_imm(s, OPC_ANDI, TCG_REG_A0, TCG_REG_A0, (CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS);
@@ -1029,50 +1026,55 @@ static void tcg_out_qemu_ld(TCGContext *s, const TCGArg *args,
static void tcg_out_qemu_st(TCGContext *s, const TCGArg *args,
int opc)
{
- int addr_regl, addr_meml;
- int data_regl, data_regh, data_reg1, data_reg2;
- int mem_index, s_bits;
+ int addr_regl, data_regl, data_regh, data_reg1, data_reg2;
#if defined(CONFIG_SOFTMMU)
uint8_t *label1_ptr, *label2_ptr;
int arg_num;
+ int mem_index, s_bits;
+ int addr_meml;
#endif
#if TARGET_LONG_BITS == 64
# if defined(CONFIG_SOFTMMU)
uint8_t *label3_ptr;
-# endif
int addr_regh, addr_memh;
+# endif
#endif
-
data_regl = *args++;
if (opc == 3) {
data_regh = *args++;
-#if defined(TCG_TARGET_WORDS_BIGENDIAN)
- data_reg1 = data_regh;
- data_reg2 = data_regl;
-#else
- data_reg1 = data_regl;
- data_reg2 = data_regh;
-#endif
} else {
- data_reg1 = data_regl;
- data_reg2 = 0;
data_regh = 0;
}
addr_regl = *args++;
-#if TARGET_LONG_BITS == 64
+#if defined(CONFIG_SOFTMMU)
+# if TARGET_LONG_BITS == 64
addr_regh = *args++;
-# if defined(TCG_TARGET_WORDS_BIGENDIAN)
+# if defined(TCG_TARGET_WORDS_BIGENDIAN)
addr_memh = 0;
addr_meml = 4;
-# else
+# else
addr_memh = 4;
addr_meml = 0;
-# endif
-#else
+# endif
+# else
addr_meml = 0;
-#endif
+# endif
mem_index = *args;
s_bits = opc;
+#endif
+
+ if (opc == 3) {
+#if defined(TCG_TARGET_WORDS_BIGENDIAN)
+ data_reg1 = data_regh;
+ data_reg2 = data_regl;
+#else
+ data_reg1 = data_regl;
+ data_reg2 = data_regh;
+#endif
+ } else {
+ data_reg1 = data_regl;
+ data_reg2 = 0;
+ }
#if defined(CONFIG_SOFTMMU)
tcg_out_opc_sa(s, OPC_SRL, TCG_REG_A0, addr_regl, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS);
--
1.7.10.4
next prev parent reply other threads:[~2012-09-21 16:43 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-09-21 16:43 [Qemu-devel] [PATCH 00/10] tcg/mips: cleanup and improvements Aurelien Jarno
2012-09-21 16:43 ` [Qemu-devel] [PATCH 01/10] tcg-mips: fix wrong usage of 'Z' constraint Aurelien Jarno
2012-09-21 16:43 ` Aurelien Jarno [this message]
2012-09-21 16:43 ` [Qemu-devel] [PATCH 03/10] tcg/mips: use TCGArg or TCGReg instead of int Aurelien Jarno
2012-09-21 16:43 ` [Qemu-devel] [PATCH 04/10] tcg/mips: don't use global pointer Aurelien Jarno
2012-09-21 18:18 ` Richard Henderson
2012-09-21 21:13 ` Aurelien Jarno
2012-09-21 16:43 ` [Qemu-devel] [PATCH 05/10] tcg/mips: use stack for TCG temps Aurelien Jarno
2012-09-22 14:37 ` Blue Swirl
2012-09-22 17:25 ` Aurelien Jarno
2012-09-22 18:09 ` Blue Swirl
2012-09-22 18:17 ` Aurelien Jarno
2012-09-21 16:43 ` [Qemu-devel] [PATCH 06/10] tcg/mips: optimize brcond arg, 0 Aurelien Jarno
2012-09-21 16:43 ` [Qemu-devel] [PATCH 07/10] tcg/mips: optimize bswap{16, 16s, 32} on MIPS32R2 Aurelien Jarno
2012-09-21 16:43 ` [Qemu-devel] [PATCH 08/10] tcg/mips: implement rotl/rotr ops " Aurelien Jarno
2012-09-21 16:43 ` [Qemu-devel] [PATCH 09/10] tcg/mips: implement deposit op " Aurelien Jarno
2012-09-21 16:43 ` [Qemu-devel] [PATCH 10/10] tcg/mips: implement movcond " Aurelien Jarno
2012-09-21 19:33 ` [Qemu-devel] [PATCH 00/10] tcg/mips: cleanup and improvements Richard Henderson
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