From: Aurelien Jarno <aurelien@aurel32.net>
To: qemu-devel@nongnu.org
Cc: Aurelien Jarno <aurelien@aurel32.net>
Subject: [Qemu-devel] [PATCH 06/10] tcg/mips: optimize brcond arg, 0
Date: Fri, 21 Sep 2012 18:43:25 +0200 [thread overview]
Message-ID: <1348245809-13482-7-git-send-email-aurelien@aurel32.net> (raw)
In-Reply-To: <1348245809-13482-1-git-send-email-aurelien@aurel32.net>
MIPS has some conditional branch instructions when comparing with zero.
Use them.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
---
tcg/mips/tcg-target.c | 38 ++++++++++++++++++++++++++++++--------
1 file changed, 30 insertions(+), 8 deletions(-)
diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
index c05169f..6aa4527 100644
--- a/tcg/mips/tcg-target.c
+++ b/tcg/mips/tcg-target.c
@@ -278,6 +278,8 @@ static inline int tcg_target_const_match(tcg_target_long val,
enum {
OPC_BEQ = 0x04 << 26,
OPC_BNE = 0x05 << 26,
+ OPC_BLEZ = 0x06 << 26,
+ OPC_BGTZ = 0x07 << 26,
OPC_ADDIU = 0x09 << 26,
OPC_SLTI = 0x0A << 26,
OPC_SLTIU = 0x0B << 26,
@@ -319,6 +321,10 @@ enum {
OPC_SLT = OPC_SPECIAL | 0x2A,
OPC_SLTU = OPC_SPECIAL | 0x2B,
+ OPC_REGIMM = 0x01 << 26,
+ OPC_BLTZ = OPC_REGIMM | (0x00 << 16),
+ OPC_BGEZ = OPC_REGIMM | (0x01 << 16),
+
OPC_SPECIAL3 = 0x1f << 26,
OPC_SEB = OPC_SPECIAL3 | 0x420,
OPC_SEH = OPC_SPECIAL3 | 0x620,
@@ -590,32 +596,48 @@ static void tcg_out_brcond(TCGContext *s, TCGCond cond, TCGArg arg1,
tcg_out_opc_br(s, OPC_BNE, arg1, arg2);
break;
case TCG_COND_LT:
- tcg_out_opc_reg(s, OPC_SLT, TCG_REG_AT, arg1, arg2);
- tcg_out_opc_br(s, OPC_BNE, TCG_REG_AT, TCG_REG_ZERO);
+ if (arg2 == 0) {
+ tcg_out_opc_br(s, OPC_BLTZ, 0, arg1);
+ } else {
+ tcg_out_opc_reg(s, OPC_SLT, TCG_REG_AT, arg1, arg2);
+ tcg_out_opc_br(s, OPC_BNE, TCG_REG_AT, TCG_REG_ZERO);
+ }
break;
case TCG_COND_LTU:
tcg_out_opc_reg(s, OPC_SLTU, TCG_REG_AT, arg1, arg2);
tcg_out_opc_br(s, OPC_BNE, TCG_REG_AT, TCG_REG_ZERO);
break;
case TCG_COND_GE:
- tcg_out_opc_reg(s, OPC_SLT, TCG_REG_AT, arg1, arg2);
- tcg_out_opc_br(s, OPC_BEQ, TCG_REG_AT, TCG_REG_ZERO);
+ if (arg2 == 0) {
+ tcg_out_opc_br(s, OPC_BGEZ, 0, arg1);
+ } else {
+ tcg_out_opc_reg(s, OPC_SLT, TCG_REG_AT, arg1, arg2);
+ tcg_out_opc_br(s, OPC_BEQ, TCG_REG_AT, TCG_REG_ZERO);
+ }
break;
case TCG_COND_GEU:
tcg_out_opc_reg(s, OPC_SLTU, TCG_REG_AT, arg1, arg2);
tcg_out_opc_br(s, OPC_BEQ, TCG_REG_AT, TCG_REG_ZERO);
break;
case TCG_COND_LE:
- tcg_out_opc_reg(s, OPC_SLT, TCG_REG_AT, arg2, arg1);
- tcg_out_opc_br(s, OPC_BEQ, TCG_REG_AT, TCG_REG_ZERO);
+ if (arg2 == 0) {
+ tcg_out_opc_br(s, OPC_BLEZ, 0, arg1);
+ } else {
+ tcg_out_opc_reg(s, OPC_SLT, TCG_REG_AT, arg2, arg1);
+ tcg_out_opc_br(s, OPC_BEQ, TCG_REG_AT, TCG_REG_ZERO);
+ }
break;
case TCG_COND_LEU:
tcg_out_opc_reg(s, OPC_SLTU, TCG_REG_AT, arg2, arg1);
tcg_out_opc_br(s, OPC_BEQ, TCG_REG_AT, TCG_REG_ZERO);
break;
case TCG_COND_GT:
- tcg_out_opc_reg(s, OPC_SLT, TCG_REG_AT, arg2, arg1);
- tcg_out_opc_br(s, OPC_BNE, TCG_REG_AT, TCG_REG_ZERO);
+ if (arg2 == 0) {
+ tcg_out_opc_br(s, OPC_BGTZ, 0, arg1);
+ } else {
+ tcg_out_opc_reg(s, OPC_SLT, TCG_REG_AT, arg2, arg1);
+ tcg_out_opc_br(s, OPC_BNE, TCG_REG_AT, TCG_REG_ZERO);
+ }
break;
case TCG_COND_GTU:
tcg_out_opc_reg(s, OPC_SLTU, TCG_REG_AT, arg2, arg1);
--
1.7.10.4
next prev parent reply other threads:[~2012-09-21 16:43 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-09-21 16:43 [Qemu-devel] [PATCH 00/10] tcg/mips: cleanup and improvements Aurelien Jarno
2012-09-21 16:43 ` [Qemu-devel] [PATCH 01/10] tcg-mips: fix wrong usage of 'Z' constraint Aurelien Jarno
2012-09-21 16:43 ` [Qemu-devel] [PATCH 02/10] tcg/mips: kill warnings in user mode Aurelien Jarno
2012-09-21 16:43 ` [Qemu-devel] [PATCH 03/10] tcg/mips: use TCGArg or TCGReg instead of int Aurelien Jarno
2012-09-21 16:43 ` [Qemu-devel] [PATCH 04/10] tcg/mips: don't use global pointer Aurelien Jarno
2012-09-21 18:18 ` Richard Henderson
2012-09-21 21:13 ` Aurelien Jarno
2012-09-21 16:43 ` [Qemu-devel] [PATCH 05/10] tcg/mips: use stack for TCG temps Aurelien Jarno
2012-09-22 14:37 ` Blue Swirl
2012-09-22 17:25 ` Aurelien Jarno
2012-09-22 18:09 ` Blue Swirl
2012-09-22 18:17 ` Aurelien Jarno
2012-09-21 16:43 ` Aurelien Jarno [this message]
2012-09-21 16:43 ` [Qemu-devel] [PATCH 07/10] tcg/mips: optimize bswap{16, 16s, 32} on MIPS32R2 Aurelien Jarno
2012-09-21 16:43 ` [Qemu-devel] [PATCH 08/10] tcg/mips: implement rotl/rotr ops " Aurelien Jarno
2012-09-21 16:43 ` [Qemu-devel] [PATCH 09/10] tcg/mips: implement deposit op " Aurelien Jarno
2012-09-21 16:43 ` [Qemu-devel] [PATCH 10/10] tcg/mips: implement movcond " Aurelien Jarno
2012-09-21 19:33 ` [Qemu-devel] [PATCH 00/10] tcg/mips: cleanup and improvements Richard Henderson
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