From: Mark Zhang <markz-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
To: swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org,
linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org
Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
Mark Zhang <markz-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Subject: [PATCH] ARM: dt: tegra: ventana: define pinmux for ddc
Date: Fri, 19 Oct 2012 13:58:31 +0800 [thread overview]
Message-ID: <1350626311-18131-1-git-send-email-markz@nvidia.com> (raw)
Define pinmux for DDC. The DDC pinmux in Ventana is 2 pins in I2C2.
Signed-off-by: Mark Zhang <markz-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra20-ventana.dts | 70 ++++++++++++++++++++++++++++++---
1 file changed, 65 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
index bec8bb2..b6b3af4 100644
--- a/arch/arm/boot/dts/tegra20-ventana.dts
+++ b/arch/arm/boot/dts/tegra20-ventana.dts
@@ -64,11 +64,6 @@
nvidia,pins = "dap4";
nvidia,function = "dap4";
};
- ddc {
- nvidia,pins = "ddc", "owc", "spdi", "spdo",
- "uac";
- nvidia,function = "rsvd2";
- };
dta {
nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
nvidia,function = "vi";
@@ -248,6 +243,39 @@
nvidia,slew-rate-falling = <3>;
};
};
+
+ state_i2cmux_ddc: pinmux_i2cmux_ddc {
+ ddc {
+ nvidia,pins = "ddc";
+ nvidia,function = "i2c2";
+ };
+ pta {
+ nvidia,pins = "pta";
+ nvidia,function = "rsvd4";
+ };
+ };
+
+ state_i2cmux_pta: pinmux_i2cmux_pta {
+ ddc {
+ nvidia,pins = "ddc";
+ nvidia,function = "rsvd4";
+ };
+ pta {
+ nvidia,pins = "pta";
+ nvidia,function = "i2c2";
+ };
+ };
+
+ state_i2cmux_idle: pinmux_i2cmux_idle {
+ ddc {
+ nvidia,pins = "ddc";
+ nvidia,function = "rsvd4";
+ };
+ pta {
+ nvidia,pins = "pta";
+ nvidia,function = "rsvd4";
+ };
+ };
};
i2s@70002800 {
@@ -291,6 +319,38 @@
clock-frequency = <400000>;
};
+ i2cmux {
+ compatible = "i2c-mux-pinctrl";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c-parent = <&{/i2c@7000c400}>;
+
+ pinctrl-names = "ddc", "pta", "idle";
+ pinctrl-0 = <&state_i2cmux_ddc>;
+ pinctrl-1 = <&state_i2cmux_pta>;
+ pinctrl-2 = <&state_i2cmux_idle>;
+
+ i2c@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ smart-battery@b {
+ compatible = "ti,bq24617", "smart-battery-1.1";
+ reg = <0xb>;
+ ti,i2c-retry-count = <2>;
+ ti,poll-retry-count = <10>;
+ };
+ };
+ };
+
i2c@7000c500 {
status = "okay";
clock-frequency = <400000>;
--
1.7.9.5
WARNING: multiple messages have this Message-ID (diff)
From: markz@nvidia.com (Mark Zhang)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH] ARM: dt: tegra: ventana: define pinmux for ddc
Date: Fri, 19 Oct 2012 13:58:31 +0800 [thread overview]
Message-ID: <1350626311-18131-1-git-send-email-markz@nvidia.com> (raw)
Define pinmux for DDC. The DDC pinmux in Ventana is 2 pins in I2C2.
Signed-off-by: Mark Zhang <markz@nvidia.com>
---
arch/arm/boot/dts/tegra20-ventana.dts | 70 ++++++++++++++++++++++++++++++---
1 file changed, 65 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
index bec8bb2..b6b3af4 100644
--- a/arch/arm/boot/dts/tegra20-ventana.dts
+++ b/arch/arm/boot/dts/tegra20-ventana.dts
@@ -64,11 +64,6 @@
nvidia,pins = "dap4";
nvidia,function = "dap4";
};
- ddc {
- nvidia,pins = "ddc", "owc", "spdi", "spdo",
- "uac";
- nvidia,function = "rsvd2";
- };
dta {
nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
nvidia,function = "vi";
@@ -248,6 +243,39 @@
nvidia,slew-rate-falling = <3>;
};
};
+
+ state_i2cmux_ddc: pinmux_i2cmux_ddc {
+ ddc {
+ nvidia,pins = "ddc";
+ nvidia,function = "i2c2";
+ };
+ pta {
+ nvidia,pins = "pta";
+ nvidia,function = "rsvd4";
+ };
+ };
+
+ state_i2cmux_pta: pinmux_i2cmux_pta {
+ ddc {
+ nvidia,pins = "ddc";
+ nvidia,function = "rsvd4";
+ };
+ pta {
+ nvidia,pins = "pta";
+ nvidia,function = "i2c2";
+ };
+ };
+
+ state_i2cmux_idle: pinmux_i2cmux_idle {
+ ddc {
+ nvidia,pins = "ddc";
+ nvidia,function = "rsvd4";
+ };
+ pta {
+ nvidia,pins = "pta";
+ nvidia,function = "rsvd4";
+ };
+ };
};
i2s at 70002800 {
@@ -291,6 +319,38 @@
clock-frequency = <400000>;
};
+ i2cmux {
+ compatible = "i2c-mux-pinctrl";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c-parent = <&{/i2c@7000c400}>;
+
+ pinctrl-names = "ddc", "pta", "idle";
+ pinctrl-0 = <&state_i2cmux_ddc>;
+ pinctrl-1 = <&state_i2cmux_pta>;
+ pinctrl-2 = <&state_i2cmux_idle>;
+
+ i2c at 0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c at 1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ smart-battery at b {
+ compatible = "ti,bq24617", "smart-battery-1.1";
+ reg = <0xb>;
+ ti,i2c-retry-count = <2>;
+ ti,poll-retry-count = <10>;
+ };
+ };
+ };
+
i2c at 7000c500 {
status = "okay";
clock-frequency = <400000>;
--
1.7.9.5
WARNING: multiple messages have this Message-ID (diff)
From: Mark Zhang <markz@nvidia.com>
To: <swarren@wwwdotorg.org>, <linux@arm.linux.org.uk>
Cc: <linux-tegra@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, Mark Zhang <markz@nvidia.com>
Subject: [PATCH] ARM: dt: tegra: ventana: define pinmux for ddc
Date: Fri, 19 Oct 2012 13:58:31 +0800 [thread overview]
Message-ID: <1350626311-18131-1-git-send-email-markz@nvidia.com> (raw)
Define pinmux for DDC. The DDC pinmux in Ventana is 2 pins in I2C2.
Signed-off-by: Mark Zhang <markz@nvidia.com>
---
arch/arm/boot/dts/tegra20-ventana.dts | 70 ++++++++++++++++++++++++++++++---
1 file changed, 65 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts
index bec8bb2..b6b3af4 100644
--- a/arch/arm/boot/dts/tegra20-ventana.dts
+++ b/arch/arm/boot/dts/tegra20-ventana.dts
@@ -64,11 +64,6 @@
nvidia,pins = "dap4";
nvidia,function = "dap4";
};
- ddc {
- nvidia,pins = "ddc", "owc", "spdi", "spdo",
- "uac";
- nvidia,function = "rsvd2";
- };
dta {
nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
nvidia,function = "vi";
@@ -248,6 +243,39 @@
nvidia,slew-rate-falling = <3>;
};
};
+
+ state_i2cmux_ddc: pinmux_i2cmux_ddc {
+ ddc {
+ nvidia,pins = "ddc";
+ nvidia,function = "i2c2";
+ };
+ pta {
+ nvidia,pins = "pta";
+ nvidia,function = "rsvd4";
+ };
+ };
+
+ state_i2cmux_pta: pinmux_i2cmux_pta {
+ ddc {
+ nvidia,pins = "ddc";
+ nvidia,function = "rsvd4";
+ };
+ pta {
+ nvidia,pins = "pta";
+ nvidia,function = "i2c2";
+ };
+ };
+
+ state_i2cmux_idle: pinmux_i2cmux_idle {
+ ddc {
+ nvidia,pins = "ddc";
+ nvidia,function = "rsvd4";
+ };
+ pta {
+ nvidia,pins = "pta";
+ nvidia,function = "rsvd4";
+ };
+ };
};
i2s@70002800 {
@@ -291,6 +319,38 @@
clock-frequency = <400000>;
};
+ i2cmux {
+ compatible = "i2c-mux-pinctrl";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ i2c-parent = <&{/i2c@7000c400}>;
+
+ pinctrl-names = "ddc", "pta", "idle";
+ pinctrl-0 = <&state_i2cmux_ddc>;
+ pinctrl-1 = <&state_i2cmux_pta>;
+ pinctrl-2 = <&state_i2cmux_idle>;
+
+ i2c@0 {
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ i2c@1 {
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ smart-battery@b {
+ compatible = "ti,bq24617", "smart-battery-1.1";
+ reg = <0xb>;
+ ti,i2c-retry-count = <2>;
+ ti,poll-retry-count = <10>;
+ };
+ };
+ };
+
i2c@7000c500 {
status = "okay";
clock-frequency = <400000>;
--
1.7.9.5
next reply other threads:[~2012-10-19 5:58 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-10-19 5:58 Mark Zhang [this message]
2012-10-19 5:58 ` [PATCH] ARM: dt: tegra: ventana: define pinmux for ddc Mark Zhang
2012-10-19 5:58 ` Mark Zhang
[not found] ` <1350626311-18131-1-git-send-email-markz-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-10-19 15:48 ` Stephen Warren
2012-10-19 15:48 ` Stephen Warren
2012-10-19 15:48 ` Stephen Warren
[not found] ` <50817668.6020709-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-10-22 7:29 ` Mark Zhang
2012-10-22 7:29 ` Mark Zhang
2012-10-22 7:29 ` Mark Zhang
[not found] ` <5084F5D1.7050005-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-10-22 17:14 ` Stephen Warren
2012-10-22 17:14 ` Stephen Warren
2012-10-22 17:14 ` Stephen Warren
[not found] ` <50857EEF.2070707-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-10-25 6:32 ` Mark Zhang
2012-10-25 6:32 ` Mark Zhang
2012-10-25 6:32 ` Mark Zhang
[not found] ` <5088DCF2.7030000-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-10-25 15:37 ` Stephen Warren
2012-10-25 15:37 ` Stephen Warren
2012-10-25 15:37 ` Stephen Warren
[not found] ` <50895CB2.8040103-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2012-10-26 6:28 ` Mark Zhang
2012-10-26 6:28 ` Mark Zhang
2012-10-26 6:28 ` Mark Zhang
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