From: Paulo Zanoni <przanoni@gmail.com>
To: intel-gfx@lists.freedesktop.org
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: [PATCH 03/10] drm/i915: use cpu/pch transcoder on intel_enable_pipe
Date: Tue, 20 Nov 2012 13:27:37 -0200 [thread overview]
Message-ID: <1353425264-3728-4-git-send-email-przanoni@gmail.com> (raw)
In-Reply-To: <1353425264-3728-1-git-send-email-przanoni@gmail.com>
From: Paulo Zanoni <paulo.r.zanoni@intel.com>
This function runs on Haswell, so set the correct pch_transcoder and
cpu_transcoder variables. This fixes an assertion failure on Haswell
VGA.
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 10 ++++++++--
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 9940765..e4d7079 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1812,9 +1812,15 @@ static void intel_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
{
enum transcoder cpu_transcoder = intel_pipe_to_cpu_transcoder(dev_priv,
pipe);
+ enum transcoder pch_transcoder;
int reg;
u32 val;
+ if (IS_HASWELL(dev_priv->dev))
+ pch_transcoder = TRANSCODER_A;
+ else
+ pch_transcoder = pipe;
+
/*
* A pipe without a PLL won't actually be able to drive bits from
* a plane. On ILK+ the pipe PLLs are integrated, so we don't
@@ -1825,8 +1831,8 @@ static void intel_enable_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
else {
if (pch_port) {
/* if driving the PCH, we need FDI enabled */
- assert_fdi_rx_pll_enabled(dev_priv, pipe);
- assert_fdi_tx_pll_enabled(dev_priv, pipe);
+ assert_fdi_rx_pll_enabled(dev_priv, pch_transcoder);
+ assert_fdi_tx_pll_enabled(dev_priv, cpu_transcoder);
}
/* FIXME: assert CPU port conditions for SNB+ */
}
--
1.7.11.7
next prev parent reply other threads:[~2012-11-20 15:28 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-11-20 15:27 [PATCH 00/10] Random Haswell fixes Paulo Zanoni
2012-11-20 15:27 ` [PATCH 01/10] drm/i915: don't limit Haswell CRT encoder to pipe A Paulo Zanoni
2012-11-20 18:20 ` Damien Lespiau
2012-11-20 15:27 ` [PATCH 02/10] drm/i915: fix FDI lane calculation Paulo Zanoni
2012-11-20 18:17 ` Damien Lespiau
2012-11-20 18:43 ` Paulo Zanoni
2012-11-20 15:27 ` Paulo Zanoni [this message]
2012-11-20 18:23 ` [PATCH 03/10] drm/i915: use cpu/pch transcoder on intel_enable_pipe Damien Lespiau
2012-11-20 15:27 ` [PATCH 04/10] drm/i915: fix false positive "Unclaimed write" messages Paulo Zanoni
2012-11-20 18:46 ` Damien Lespiau
2012-11-20 19:10 ` Paulo Zanoni
2012-11-20 19:24 ` Damien Lespiau
2012-11-20 19:34 ` Paulo Zanoni
2012-11-20 15:27 ` [PATCH 05/10] drm/i915: make DP work on LPT-LP machines Paulo Zanoni
2012-11-20 16:50 ` Daniel Vetter
2012-11-20 17:12 ` Paulo Zanoni
2012-11-20 19:00 ` Damien Lespiau
2012-11-20 19:14 ` Paulo Zanoni
2012-11-20 15:27 ` [PATCH 06/10] drm/i915: don't intel_crt_init if DDI A has 4 lanes Paulo Zanoni
2012-11-20 19:12 ` Damien Lespiau
2012-11-20 15:27 ` [PATCH 07/10] drm/i915: make the panel fitter work on pipes B and C on IVB Paulo Zanoni
2012-11-20 19:34 ` Damien Lespiau
2012-11-20 15:27 ` [PATCH 08/10] drm/i915: make the panel fitter work on pipes B and C on Haswell Paulo Zanoni
2012-11-20 19:35 ` Damien Lespiau
2012-11-20 15:27 ` [PATCH 09/10] drm/i915: fix intel_ddi_get_cdclk_freq for ULT machines Paulo Zanoni
2012-11-20 19:59 ` Damien Lespiau
2012-11-20 15:27 ` [PATCH 10/10] drm/i915: implement WaMbcDriverBootEnable on Haswell Paulo Zanoni
2012-11-21 13:31 ` Daniel Vetter
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