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From: Scott Wood <scottwood@freescale.com>
To: Alexander Graf <agraf@suse.de>
Cc: Paul Mackerras <paulus@samba.org>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	"kvm-ppc@vger.kernel.org" <kvm-ppc@vger.kernel.org>,
	Gleb Natapov <gleb@redhat.com>,
	Stuart Yoder <stuart.yoder@freescale.com>
Subject: Re: [STRAWMAN PATCH] KVM: PPC: Add ioctl to specify interrupt controller architecture to emulate
Date: Thu, 14 Mar 2013 00:14:48 +0000	[thread overview]
Message-ID: <1363220088.8945.18@snotra> (raw)
In-Reply-To: <008F8D3C-7556-4034-BA44-A93593981249@suse.de> (from agraf@suse.de on Fri Mar  8 05:04:30 2013)

On 03/08/2013 05:04:30 AM, Alexander Graf wrote:
> 
> 
> Am 08.03.2013 um 11:37 schrieb Paul Mackerras <paulus@samba.org>:
> 
> > On Thu, Mar 07, 2013 at 03:00:52PM +0100, Alexander Graf wrote:
> >>
> >> Could you please (in a quick and drafty way) try and see if  
> setting the IRQ arch (using enable_cap) after the vcpu got created  
> would work for you?
> >>
> >> That enable_cap would then have to loop through all devices and  
> notify irq controllers that a new cpu got spawned.
> >> All vcpu local payloads would have to get allocated and  
> initialized outside of vcpu_create too then.
> >
> > So, the first thing I noticed is that KVM_ENABLE_CAP is a vcpu  
> ioctl,
> > not a vm ioctl.  Apparently qemu calls it once for every vcpu when  
> it
> > calls it on ppc targets.  That means that it doesn't have to loop
> > through all vcpus; it just needs to connect up the one it's called
> > for, which simplifies things.
> 
> That's the point, yes :). And if for some weird reason one vcpu isn't  
> connected to the interrupt controller (or to a different one), we can  
> model that too ;).
> 
> > I'm coding it up now and porting my XICS emulation to the kvm device
> > API proposed by Scott.  It looks like it's going to be OK.
> 
> Awesome! Scott is going to prototype whether using fds as tokens  
> makes sense. But even if we change it to an fd model, there should be  
> very little work to do to move xics to it too if it's already modeled  
> for create_device.

It looks like the fd approach will be workable.  Paul, do you want to  
post what you have in terms of the capability approach, so I can base  
an fd version of the device control patchset on it, or should I fd-ize  
the current patchset without it, and then rework mpic on top of the  
capability stuff once you've posted your device-control-using patchset?

> > I have
> > used the first argument (cap->args[0]) to specify which interrupt
> > controller you want to connect the vcpu to.
> 
> Ah, nice idea. So you basically make the vcpu connection explicit.  
> Perfect! Then just pass the interrupt controller pin id in  
> cap->args[1] so we don't need to guess which vcpu we're talking about  
> and all is well :). No implicit assumptions left in the kernel.

Is the IRQ architecture now implicit based on what sort of irqchip you  
point at, or is there a separate capability for each IRQ architecture?   
The latter may make more sense -- you can test for specific  
architectures, provide architecture-specific arguments, some  
architectures may not require pointing at a device (e.g. the "LAPIC in  
kernel, IO-APIC in userspace" model), etc.

-Scott

WARNING: multiple messages have this Message-ID (diff)
From: Scott Wood <scottwood@freescale.com>
To: Alexander Graf <agraf@suse.de>
Cc: Paul Mackerras <paulus@samba.org>,
	"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
	"kvm-ppc@vger.kernel.org" <kvm-ppc@vger.kernel.org>,
	Gleb Natapov <gleb@redhat.com>,
	Stuart Yoder <stuart.yoder@freescale.com>
Subject: Re: [STRAWMAN PATCH] KVM: PPC: Add ioctl to specify interrupt controller architecture to emulate
Date: Wed, 13 Mar 2013 19:14:48 -0500	[thread overview]
Message-ID: <1363220088.8945.18@snotra> (raw)
In-Reply-To: <008F8D3C-7556-4034-BA44-A93593981249@suse.de> (from agraf@suse.de on Fri Mar  8 05:04:30 2013)

On 03/08/2013 05:04:30 AM, Alexander Graf wrote:
> 
> 
> Am 08.03.2013 um 11:37 schrieb Paul Mackerras <paulus@samba.org>:
> 
> > On Thu, Mar 07, 2013 at 03:00:52PM +0100, Alexander Graf wrote:
> >>
> >> Could you please (in a quick and drafty way) try and see if  
> setting the IRQ arch (using enable_cap) after the vcpu got created  
> would work for you?
> >>
> >> That enable_cap would then have to loop through all devices and  
> notify irq controllers that a new cpu got spawned.
> >> All vcpu local payloads would have to get allocated and  
> initialized outside of vcpu_create too then.
> >
> > So, the first thing I noticed is that KVM_ENABLE_CAP is a vcpu  
> ioctl,
> > not a vm ioctl.  Apparently qemu calls it once for every vcpu when  
> it
> > calls it on ppc targets.  That means that it doesn't have to loop
> > through all vcpus; it just needs to connect up the one it's called
> > for, which simplifies things.
> 
> That's the point, yes :). And if for some weird reason one vcpu isn't  
> connected to the interrupt controller (or to a different one), we can  
> model that too ;).
> 
> > I'm coding it up now and porting my XICS emulation to the kvm device
> > API proposed by Scott.  It looks like it's going to be OK.
> 
> Awesome! Scott is going to prototype whether using fds as tokens  
> makes sense. But even if we change it to an fd model, there should be  
> very little work to do to move xics to it too if it's already modeled  
> for create_device.

It looks like the fd approach will be workable.  Paul, do you want to  
post what you have in terms of the capability approach, so I can base  
an fd version of the device control patchset on it, or should I fd-ize  
the current patchset without it, and then rework mpic on top of the  
capability stuff once you've posted your device-control-using patchset?

> > I have
> > used the first argument (cap->args[0]) to specify which interrupt
> > controller you want to connect the vcpu to.
> 
> Ah, nice idea. So you basically make the vcpu connection explicit.  
> Perfect! Then just pass the interrupt controller pin id in  
> cap->args[1] so we don't need to guess which vcpu we're talking about  
> and all is well :). No implicit assumptions left in the kernel.

Is the IRQ architecture now implicit based on what sort of irqchip you  
point at, or is there a separate capability for each IRQ architecture?   
The latter may make more sense -- you can test for specific  
architectures, provide architecture-specific arguments, some  
architectures may not require pointing at a device (e.g. the "LAPIC in  
kernel, IO-APIC in userspace" model), etc.

-Scott

  parent reply	other threads:[~2013-03-14  0:14 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-03-07  3:29 [STRAWMAN PATCH] KVM: PPC: Add ioctl to specify interrupt controller architecture to emulate Paul Mackerras
2013-03-07  3:29 ` Paul Mackerras
2013-03-07 14:00 ` Alexander Graf
2013-03-07 14:00   ` Alexander Graf
2013-03-08 10:37   ` Paul Mackerras
2013-03-08 10:37     ` Paul Mackerras
2013-03-08 11:04     ` Alexander Graf
2013-03-08 11:04       ` Alexander Graf
2013-03-09  2:26       ` Paul Mackerras
2013-03-09  2:26         ` Paul Mackerras
2013-03-11  9:15         ` Alexander Graf
2013-03-11  9:15           ` Alexander Graf
2013-03-14  0:14       ` Scott Wood [this message]
2013-03-14  0:14         ` Scott Wood
2013-03-14  0:25         ` Alexander Graf
2013-03-14  0:25           ` Alexander Graf
2013-03-14  1:26         ` Paul Mackerras
2013-03-14  1:26           ` Paul Mackerras
2013-03-14 18:15           ` Scott Wood
2013-03-14 18:15             ` Scott Wood
2013-03-14 22:02             ` Paul Mackerras
2013-03-14 22:02               ` Paul Mackerras
2013-03-14 22:44               ` Alexander Graf
2013-03-14 22:44                 ` Alexander Graf
2013-03-14 22:53                 ` Scott Wood
2013-03-14 22:53                   ` Scott Wood

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