diff for duplicates of <1366781902-13025-3-git-send-email-linux@prisktech.co.nz> diff --git a/a/1.txt b/N1/1.txt index 98059a3..f30792f 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,7 +1,7 @@ This patch adds support for the WonderMedia WM8750 SoC and the VIA APC8750 board. -Signed-off-by: Tony Prisk <linux@prisktech.co.nz> +Signed-off-by: Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org> --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/wm8750-apc8750.dts | 26 +++ @@ -32,7 +32,7 @@ index 0000000..62675eb + * wm8750-apc8750.dts + * - Device tree file for VIA APC8750 + * -+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz> ++ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org> + * + * Licensed under GPLv2 or later + */ @@ -63,7 +63,7 @@ index 0000000..81683fa +/* + * wm8750.dtsi - Device tree file for Wondermedia WM8750 SoC + * -+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz> ++ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org> + * + * Licensed under GPLv2 or later + */ @@ -101,7 +101,7 @@ index 0000000..81683fa + ranges; + interrupt-parent = <&intc0>; + -+ intc0: interrupt-controller at d8140000 { ++ intc0: interrupt-controller@d8140000 { + compatible = "via,vt8500-intc"; + interrupt-controller; + reg = <0xd8140000 0x10000>; @@ -109,7 +109,7 @@ index 0000000..81683fa + }; + + /* Secondary IC cascaded to intc0 */ -+ intc1: interrupt-controller at d8150000 { ++ intc1: interrupt-controller@d8150000 { + compatible = "via,vt8500-intc"; + interrupt-controller; + #interrupt-cells = <1>; @@ -117,7 +117,7 @@ index 0000000..81683fa + interrupts = <56 57 58 59 60 61 62 63>; + }; + -+ pinctrl: pinctrl at d8110000 { ++ pinctrl: pinctrl@d8110000 { + compatible = "wm,wm8750-pinctrl"; + reg = <0xd8110000 0x10000>; + interrupt-controller; @@ -126,7 +126,7 @@ index 0000000..81683fa + #gpio-cells = <2>; + }; + -+ pmc at d8130000 { ++ pmc@d8130000 { + compatible = "via,vt8500-pmc"; + reg = <0xd8130000 0x1000>; + @@ -298,92 +298,92 @@ index 0000000..81683fa + }; + }; + -+ sf at d8002000 { ++ sf@d8002000 { + compatible = "wm,wm8505-sf"; + reg = <0xd8002000 0x400>; + clocks = <&clksf>; + }; + -+ pwm: pwm at d8220000 { ++ pwm: pwm@d8220000 { + #pwm-cells = <3>; + compatible = "via,vt8500-pwm"; + reg = <0xd8220000 0x100>; + clocks = <&clkpwm>; + }; + -+ timer at d8130100 { ++ timer@d8130100 { + compatible = "via,vt8500-timer"; + reg = <0xd8130100 0x28>; + interrupts = <36>; + }; + -+ ehci at d8007900 { ++ ehci@d8007900 { + compatible = "via,vt8500-ehci"; + reg = <0xd8007900 0x200>; + interrupts = <26>; + }; + -+ uhci at d8007b00 { ++ uhci@d8007b00 { + compatible = "platform-uhci"; + reg = <0xd8007b00 0x200>; + interrupts = <26>; + }; + -+ uhci at d8008d00 { ++ uhci@d8008d00 { + compatible = "platform-uhci"; + reg = <0xd8008d00 0x200>; + interrupts = <26>; + }; + -+ uart0: uart at d8200000 { ++ uart0: uart@d8200000 { + compatible = "via,vt8500-uart"; + reg = <0xd8200000 0x1040>; + interrupts = <32>; + clocks = <&clkuart0>; + }; + -+ uart1: uart at d82b0000 { ++ uart1: uart@d82b0000 { + compatible = "via,vt8500-uart"; + reg = <0xd82b0000 0x1040>; + interrupts = <33>; + clocks = <&clkuart1>; + }; + -+ uart2: uart at d8210000 { ++ uart2: uart@d8210000 { + compatible = "via,vt8500-uart"; + reg = <0xd8210000 0x1040>; + interrupts = <47>; + clocks = <&clkuart2>; + }; + -+ uart3: uart at d82c0000 { ++ uart3: uart@d82c0000 { + compatible = "via,vt8500-uart"; + reg = <0xd82c0000 0x1040>; + interrupts = <50>; + clocks = <&clkuart3>; + }; + -+ uart4: uart at d8370000 { ++ uart4: uart@d8370000 { + compatible = "via,vt8500-uart"; + reg = <0xd8370000 0x1040>; + interrupts = <30>; + clocks = <&clkuart4>; + }; + -+ uart5: uart at d8380000 { ++ uart5: uart@d8380000 { + compatible = "via,vt8500-uart"; + reg = <0xd8380000 0x1040>; + interrupts = <43>; + clocks = <&clkuart5>; + }; + -+ rtc at d8100000 { ++ rtc@d8100000 { + compatible = "via,vt8500-rtc"; + reg = <0xd8100000 0x10000>; + interrupts = <48>; + }; + -+ sdhc at d800a000 { ++ sdhc@d800a000 { + compatible = "wm,wm8505-sdhc"; + reg = <0xd800a000 0x1000>; + interrupts = <20 21>; @@ -392,7 +392,7 @@ index 0000000..81683fa + sdon-inverted; + }; + -+ i2c_0: i2c at d8280000 { ++ i2c_0: i2c@d8280000 { + compatible = "wm,wm8505-i2c"; + reg = <0xd8280000 0x1000>; + interrupts = <19>; @@ -400,7 +400,7 @@ index 0000000..81683fa + clock-frequency = <400000>; + }; + -+ i2c_1: i2c at d8320000 { ++ i2c_1: i2c@d8320000 { + compatible = "wm,wm8505-i2c"; + reg = <0xd8320000 0x1000>; + interrupts = <18>; diff --git a/a/content_digest b/N1/content_digest index a04b17d..70edd42 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,14 +1,17 @@ "ref\01366781902-13025-1-git-send-email-linux@prisktech.co.nz\0" - "From\0linux@prisktech.co.nz (Tony Prisk)\0" + "ref\01366781902-13025-1-git-send-email-linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org\0" + "From\0Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>\0" "Subject\0[PATCH 2/3] dts: vt8500: Add devicetree support for WM8750 SoC and APC8750 board\0" "Date\0Wed, 24 Apr 2013 17:38:21 +1200\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org\0" + "Cc\0vt8500-wm8505-linux-kernel-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org" + " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\0" "\00:1\0" "b\0" "This patch adds support for the WonderMedia WM8750 SoC and the VIA\n" "APC8750 board.\n" "\n" - "Signed-off-by: Tony Prisk <linux@prisktech.co.nz>\n" + "Signed-off-by: Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>\n" "---\n" " arch/arm/boot/dts/Makefile | 1 +\n" " arch/arm/boot/dts/wm8750-apc8750.dts | 26 +++\n" @@ -39,7 +42,7 @@ "+ * wm8750-apc8750.dts\n" "+ * - Device tree file for VIA APC8750\n" "+ *\n" - "+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>\n" + "+ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>\n" "+ *\n" "+ * Licensed under GPLv2 or later\n" "+ */\n" @@ -70,7 +73,7 @@ "+/*\n" "+ * wm8750.dtsi - Device tree file for Wondermedia WM8750 SoC\n" "+ *\n" - "+ * Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>\n" + "+ * Copyright (C) 2012 Tony Prisk <linux-ci5G2KO2hbZ+pU9mqzGVBQ@public.gmane.org>\n" "+ *\n" "+ * Licensed under GPLv2 or later\n" "+ */\n" @@ -108,7 +111,7 @@ "+\t\tranges;\n" "+\t\tinterrupt-parent = <&intc0>;\n" "+\n" - "+\t\tintc0: interrupt-controller at d8140000 {\n" + "+\t\tintc0: interrupt-controller@d8140000 {\n" "+\t\t\tcompatible = \"via,vt8500-intc\";\n" "+\t\t\tinterrupt-controller;\n" "+\t\t\treg = <0xd8140000 0x10000>;\n" @@ -116,7 +119,7 @@ "+\t\t};\n" "+\n" "+\t\t/* Secondary IC cascaded to intc0 */\n" - "+\t\tintc1: interrupt-controller at d8150000 {\n" + "+\t\tintc1: interrupt-controller@d8150000 {\n" "+\t\t\tcompatible = \"via,vt8500-intc\";\n" "+\t\t\tinterrupt-controller;\n" "+\t\t\t#interrupt-cells = <1>;\n" @@ -124,7 +127,7 @@ "+\t\t\tinterrupts = <56 57 58 59 60 61 62 63>;\n" "+\t\t};\n" "+\n" - "+\t\tpinctrl: pinctrl at d8110000 {\n" + "+\t\tpinctrl: pinctrl@d8110000 {\n" "+\t\t\tcompatible = \"wm,wm8750-pinctrl\";\n" "+\t\t\treg = <0xd8110000 0x10000>;\n" "+\t\t\tinterrupt-controller;\n" @@ -133,7 +136,7 @@ "+\t\t\t#gpio-cells = <2>;\n" "+\t\t};\n" "+\n" - "+\t\tpmc at d8130000 {\n" + "+\t\tpmc@d8130000 {\n" "+\t\t\tcompatible = \"via,vt8500-pmc\";\n" "+\t\t\treg = <0xd8130000 0x1000>;\n" "+\n" @@ -305,92 +308,92 @@ "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tsf at d8002000 {\n" + "+\t\tsf@d8002000 {\n" "+\t\t\tcompatible = \"wm,wm8505-sf\";\n" "+\t\t\treg = <0xd8002000 0x400>;\n" "+\t\t\tclocks = <&clksf>;\n" "+\t\t};\n" "+\n" - "+\t\tpwm: pwm at d8220000 {\n" + "+\t\tpwm: pwm@d8220000 {\n" "+\t\t\t#pwm-cells = <3>;\n" "+\t\t\tcompatible = \"via,vt8500-pwm\";\n" "+\t\t\treg = <0xd8220000 0x100>;\n" "+\t\t\tclocks = <&clkpwm>;\n" "+\t\t};\n" "+\n" - "+\t\ttimer at d8130100 {\n" + "+\t\ttimer@d8130100 {\n" "+\t\t\tcompatible = \"via,vt8500-timer\";\n" "+\t\t\treg = <0xd8130100 0x28>;\n" "+\t\t\tinterrupts = <36>;\n" "+\t\t};\n" "+\n" - "+\t\tehci at d8007900 {\n" + "+\t\tehci@d8007900 {\n" "+\t\t\tcompatible = \"via,vt8500-ehci\";\n" "+\t\t\treg = <0xd8007900 0x200>;\n" "+\t\t\tinterrupts = <26>;\n" "+\t\t};\n" "+\n" - "+\t\tuhci at d8007b00 {\n" + "+\t\tuhci@d8007b00 {\n" "+\t\t\tcompatible = \"platform-uhci\";\n" "+\t\t\treg = <0xd8007b00 0x200>;\n" "+\t\t\tinterrupts = <26>;\n" "+\t\t};\n" "+\n" - "+\t\tuhci at d8008d00 {\n" + "+\t\tuhci@d8008d00 {\n" "+\t\t\tcompatible = \"platform-uhci\";\n" "+\t\t\treg = <0xd8008d00 0x200>;\n" "+\t\t\tinterrupts = <26>;\n" "+\t\t};\n" "+\n" - "+\t\tuart0: uart at d8200000 {\n" + "+\t\tuart0: uart@d8200000 {\n" "+\t\t\tcompatible = \"via,vt8500-uart\";\n" "+\t\t\treg = <0xd8200000 0x1040>;\n" "+\t\t\tinterrupts = <32>;\n" "+\t\t\tclocks = <&clkuart0>;\n" "+\t\t};\n" "+\n" - "+\t\tuart1: uart at d82b0000 {\n" + "+\t\tuart1: uart@d82b0000 {\n" "+\t\t\tcompatible = \"via,vt8500-uart\";\n" "+\t\t\treg = <0xd82b0000 0x1040>;\n" "+\t\t\tinterrupts = <33>;\n" "+\t\t\tclocks = <&clkuart1>;\n" "+\t\t};\n" "+\n" - "+ uart2: uart at d8210000 {\n" + "+ uart2: uart@d8210000 {\n" "+ compatible = \"via,vt8500-uart\";\n" "+ reg = <0xd8210000 0x1040>;\n" "+ interrupts = <47>;\n" "+ clocks = <&clkuart2>;\n" "+ };\n" "+\n" - "+ uart3: uart at d82c0000 {\n" + "+ uart3: uart@d82c0000 {\n" "+ compatible = \"via,vt8500-uart\";\n" "+ reg = <0xd82c0000 0x1040>;\n" "+ interrupts = <50>;\n" "+ clocks = <&clkuart3>;\n" "+ };\n" "+\n" - "+ uart4: uart at d8370000 {\n" + "+ uart4: uart@d8370000 {\n" "+ compatible = \"via,vt8500-uart\";\n" "+ reg = <0xd8370000 0x1040>;\n" "+ interrupts = <30>;\n" "+ clocks = <&clkuart4>;\n" "+ };\n" "+\n" - "+ uart5: uart at d8380000 {\n" + "+ uart5: uart@d8380000 {\n" "+ compatible = \"via,vt8500-uart\";\n" "+ reg = <0xd8380000 0x1040>;\n" "+ interrupts = <43>;\n" "+ clocks = <&clkuart5>;\n" "+ };\n" "+\n" - "+\t\trtc at d8100000 {\n" + "+\t\trtc@d8100000 {\n" "+\t\t\tcompatible = \"via,vt8500-rtc\";\n" "+\t\t\treg = <0xd8100000 0x10000>;\n" "+\t\t\tinterrupts = <48>;\n" "+\t\t};\n" "+\n" - "+\t\tsdhc at d800a000 {\n" + "+\t\tsdhc@d800a000 {\n" "+\t\t\tcompatible = \"wm,wm8505-sdhc\";\n" "+\t\t\treg = <0xd800a000 0x1000>;\n" "+\t\t\tinterrupts = <20 21>;\n" @@ -399,7 +402,7 @@ "+\t\t\tsdon-inverted;\n" "+\t\t};\n" "+\n" - "+\t\ti2c_0: i2c at d8280000 {\n" + "+\t\ti2c_0: i2c@d8280000 {\n" "+\t\t\tcompatible = \"wm,wm8505-i2c\";\n" "+\t\t\treg = <0xd8280000 0x1000>;\n" "+\t\t\tinterrupts = <19>;\n" @@ -407,7 +410,7 @@ "+\t\t\tclock-frequency = <400000>;\n" "+\t\t};\n" "+\n" - "+\t\ti2c_1: i2c at d8320000 {\n" + "+\t\ti2c_1: i2c@d8320000 {\n" "+\t\t\tcompatible = \"wm,wm8505-i2c\";\n" "+\t\t\treg = <0xd8320000 0x1000>;\n" "+\t\t\tinterrupts = <18>;\n" @@ -419,4 +422,4 @@ "-- \n" 1.7.9.5 -484d67e8b8a2b5511e333b829ce367623014afbd8711fc3df3d1bb3aa0c32107 +053910005f973caa351a33b8090e4dd993a61372ab7a50ebd044245476c4d905
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