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From: Tom Musta <tommusta@gmail.com>
To: qemu-devel@nongnu.org
Cc: Tom Musta <tommusta@gmail.com>, qemu-ppc@nongnu.org
Subject: [Qemu-devel] [V2 PATCH 01/18] target-ppc: Add Flag for Power ISA V2.06
Date: Wed, 11 Dec 2013 13:16:21 -0600	[thread overview]
Message-ID: <1386789398-5239-2-git-send-email-tommusta@gmail.com> (raw)
In-Reply-To: <1386789398-5239-1-git-send-email-tommusta@gmail.com>

This patch adds a flag for base instruction additions to Power ISA
2.06B.  The flag will be used to identify/select basic Book I and
Book II instructions that were newly added in that revision of the
architecture.  The flag will not be used for VSX or Altivec.

Signed-off-by: Tom Musta <tommusta@gmail.com>
---
 target-ppc/cpu.h            |    4 +++-
 target-ppc/translate_init.c |    6 ++++--
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 0abc848..fe3aace 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1877,9 +1877,11 @@ enum {
     PPC2_ISA205        = 0x0000000000000020ULL,
     /* VSX additions in ISA 2.07                                             */
     PPC2_VSX207        = 0x0000000000000040ULL,
+    /* Book I 2.06B PowerPC specification (base instructions)                */
+    PPC2_ISA206        = 0x0000000000000080ULL,
 
 #define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_VSX | PPC2_PRCNTL | PPC2_DBRX | \
-                        PPC2_ISA205 | PPC2_VSX207)
+                        PPC2_ISA205 | PPC2_VSX207 | PPC2_ISA206)
 };
 
 /*****************************************************************************/
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index e14ab63..491e56c 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7234,7 +7234,8 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data)
                        PPC_64B | PPC_ALTIVEC |
                        PPC_SEGMENT_64B | PPC_SLBI |
                        PPC_POPCNTB | PPC_POPCNTWD;
-    pcc->insns_flags2 = PPC2_VSX | PPC2_DFP | PPC2_DBRX | PPC2_ISA205;
+    pcc->insns_flags2 = PPC2_VSX | PPC2_DFP | PPC2_DBRX | PPC2_ISA205 |
+                        PPC2_ISA206;
     pcc->msr_mask = 0x800000000284FF37ULL;
     pcc->mmu_model = POWERPC_MMU_2_06;
 #if defined(CONFIG_SOFTMMU)
@@ -7270,7 +7271,8 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
                        PPC_64B | PPC_ALTIVEC |
                        PPC_SEGMENT_64B | PPC_SLBI |
                        PPC_POPCNTB | PPC_POPCNTWD;
-    pcc->insns_flags2 = PPC2_VSX | PPC2_VSX207 | PPC2_DFP | PPC2_DBRX;
+    pcc->insns_flags2 = PPC2_VSX | PPC2_VSX207 | PPC2_DFP | PPC2_DBRX |
+                        PPC2_ISA206;
     pcc->msr_mask = 0x800000000284FF36ULL;
     pcc->mmu_model = POWERPC_MMU_2_06;
 #if defined(CONFIG_SOFTMMU)
-- 
1.7.1

  reply	other threads:[~2013-12-11 19:17 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-12-11 19:16 [Qemu-devel] [V2 PATCH 00/18] target-ppc: Base ISA V2.06 for Power7/Power8 Tom Musta
2013-12-11 19:16 ` Tom Musta [this message]
2013-12-11 19:16 ` [Qemu-devel] [V2 PATCH 02/18] target-ppc: Add ISA2.06 bpermd Instruction Tom Musta
2013-12-11 21:19   ` Richard Henderson
2013-12-11 19:16 ` [Qemu-devel] [V2 PATCH 03/18] target-ppc: Add ISA2.06 divdeu[o] Instructions Tom Musta
2013-12-11 19:16 ` [Qemu-devel] [V2 PATCH 04/18] target-ppc: Add ISA2.06 divde[o] Instructions Tom Musta
2013-12-11 19:16 ` [Qemu-devel] [V2 PATCH 05/18] target-ppc: Add ISA 2.06 divwe[u][o] Instructions Tom Musta
2013-12-11 19:16 ` [Qemu-devel] [V2 PATCH 06/18] target-ppc: Add ISA2.06 lbarx, lharx Instructions Tom Musta
2013-12-11 19:16 ` [Qemu-devel] [V2 PATCH 07/18] target-ppc: Add ISA 2.06 stbcx. and sthcx. Instructions Tom Musta
2013-12-11 19:16 ` [Qemu-devel] [V2 PATCH 08/18] target-ppc: Add ISA2.06 Float to Integer Instructions Tom Musta
2013-12-11 19:16 ` [Qemu-devel] [V2 PATCH 09/18] softfloat: Fix Handling of Small Negatives in float64_to_uint64 Tom Musta
2013-12-11 19:16 ` [Qemu-devel] [V2 PATCH 10/18] softfloat: Fix float64_to_uint64_round_to_zero Tom Musta
2013-12-11 19:16 ` [Qemu-devel] [V2 PATCH 11/18] softfloat: Fix float64_to_uint32 Tom Musta
2013-12-11 19:53   ` Peter Maydell
2013-12-11 20:39     ` Tom Musta
2013-12-17 17:45       ` Peter Maydell
2013-12-17 19:32         ` Peter Maydell
2013-12-18 17:32         ` Tom Musta
2013-12-18 18:03           ` Peter Maydell
2013-12-18 18:23             ` Tom Musta
2013-12-11 19:16 ` [Qemu-devel] [V2 PATCH 12/18] softfloat: Fix float64_to_uint32_round_to_zero Tom Musta
2013-12-11 19:54   ` Peter Maydell
2013-12-11 19:16 ` [Qemu-devel] [V2 PATCH 13/18] target-ppc: Add ISA 2.06 fcfid[u][s] Instructions Tom Musta
2013-12-11 19:16 ` [Qemu-devel] [V2 PATCH 14/18] target-ppc: Fix and enable fri[mnpz] Tom Musta
2013-12-11 19:16 ` [Qemu-devel] [V2 PATCH 15/18] target-ppc: Add ISA 2.06 ftdiv Instruction Tom Musta
2013-12-11 19:16 ` [Qemu-devel] [V2 PATCH 16/18] target-ppc: Add ISA 2.06 ftsqrt Tom Musta
2013-12-11 19:16 ` [Qemu-devel] [V2 PATCH 17/18] target-ppc: Enable frsqrtes on Power7 and Power8 Tom Musta
2013-12-11 19:16 ` [Qemu-devel] [V2 PATCH 18/18] target-ppc: Add ISA2.06 lfiwzx Instruction Tom Musta
2013-12-11 19:40 ` [Qemu-devel] [V2 PATCH 00/18] target-ppc: Base ISA V2.06 for Power7/Power8 Peter Maydell
2013-12-11 19:42   ` Tom Musta
2013-12-11 19:50     ` Peter Maydell

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