From: Boris BREZILLON <b.brezillon.dev@gmail.com>
To: Maxime Ripard <maxime.ripard@free-electrons.com>,
Rob Herring <robherring2@gmail.com>,
David Woodhouse <dwmw2@infradead.org>,
Grant Likely <grant.likely@linaro.org>,
Brian Norris <computersforpeace@gmail.com>,
Jason Gunthorpe <jgunthorpe@obsidianresearch.com>,
Arnd Bergmann <arnd@arndb.de>
Cc: devicetree@vger.kernel.org,
Boris BREZILLON <b.brezillon.dev@gmail.com>,
linux-doc@vger.kernel.org, dev@linux-sunxi.org,
linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 1/9] mtd: nand: define struct nand_timings
Date: Wed, 12 Mar 2014 19:07:36 +0100 [thread overview]
Message-ID: <1394647664-8258-2-git-send-email-b.brezillon.dev@gmail.com> (raw)
In-Reply-To: <1394647664-8258-1-git-send-email-b.brezillon.dev@gmail.com>
Define a struct containing the standard NAND timings as described in NAND
datasheets.
Signed-off-by: Boris BREZILLON <b.brezillon.dev@gmail.com>
---
include/linux/mtd/nand.h | 49 ++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 389b3c5..f3ff3a3 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -846,4 +846,53 @@ static inline bool nand_is_slc(struct nand_chip *chip)
{
return chip->bits_per_cell == 1;
}
+
+/**
+ * struct nand_sdr_timings - SDR NAND chip timings
+ *
+ * This struct defines the timing requirements of a SDR NAND chip.
+ * These informations can be found in every NAND datasheets and the timings
+ * meaning are described in the ONFI specifications:
+ * www.onfi.org/~/media/ONFI/specs/onfi_3_1_spec.pdf (chapter 4.15 Timing
+ * Parameters)
+ *
+ */
+
+struct nand_sdr_timings {
+ u32 tALH_min;
+ u32 tADL_min;
+ u32 tALS_min;
+ u32 tAR_min;
+ u32 tCEA_max;
+ u32 tCEH_min;
+ u32 tCH_min;
+ u32 tCHZ_max;
+ u32 tCLH_min;
+ u32 tCLR_min;
+ u32 tCLS_min;
+ u32 tCOH_min;
+ u32 tCS_min;
+ u32 tDH_min;
+ u32 tDS_min;
+ u32 tFEAT_max;
+ u32 tIR_min;
+ u32 tITC_max;
+ u32 tRC_min;
+ u32 tREA_max;
+ u32 tREH_min;
+ u32 tRHOH_min;
+ u32 tRHW_min;
+ u32 tRHZ_max;
+ u32 tRLOH_min;
+ u32 tRP_min;
+ u32 tRR_min;
+ u64 tRST_max;
+ u32 tWB_max;
+ u32 tWC_min;
+ u32 tWH_min;
+ u32 tWHR_min;
+ u32 tWP_min;
+ u32 tWW_min;
+};
+
#endif /* __LINUX_MTD_NAND_H */
--
1.7.9.5
WARNING: multiple messages have this Message-ID (diff)
From: b.brezillon.dev@gmail.com (Boris BREZILLON)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 1/9] mtd: nand: define struct nand_timings
Date: Wed, 12 Mar 2014 19:07:36 +0100 [thread overview]
Message-ID: <1394647664-8258-2-git-send-email-b.brezillon.dev@gmail.com> (raw)
In-Reply-To: <1394647664-8258-1-git-send-email-b.brezillon.dev@gmail.com>
Define a struct containing the standard NAND timings as described in NAND
datasheets.
Signed-off-by: Boris BREZILLON <b.brezillon.dev@gmail.com>
---
include/linux/mtd/nand.h | 49 ++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 389b3c5..f3ff3a3 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -846,4 +846,53 @@ static inline bool nand_is_slc(struct nand_chip *chip)
{
return chip->bits_per_cell == 1;
}
+
+/**
+ * struct nand_sdr_timings - SDR NAND chip timings
+ *
+ * This struct defines the timing requirements of a SDR NAND chip.
+ * These informations can be found in every NAND datasheets and the timings
+ * meaning are described in the ONFI specifications:
+ * www.onfi.org/~/media/ONFI/specs/onfi_3_1_spec.pdf? (chapter 4.15 Timing
+ * Parameters)
+ *
+ */
+
+struct nand_sdr_timings {
+ u32 tALH_min;
+ u32 tADL_min;
+ u32 tALS_min;
+ u32 tAR_min;
+ u32 tCEA_max;
+ u32 tCEH_min;
+ u32 tCH_min;
+ u32 tCHZ_max;
+ u32 tCLH_min;
+ u32 tCLR_min;
+ u32 tCLS_min;
+ u32 tCOH_min;
+ u32 tCS_min;
+ u32 tDH_min;
+ u32 tDS_min;
+ u32 tFEAT_max;
+ u32 tIR_min;
+ u32 tITC_max;
+ u32 tRC_min;
+ u32 tREA_max;
+ u32 tREH_min;
+ u32 tRHOH_min;
+ u32 tRHW_min;
+ u32 tRHZ_max;
+ u32 tRLOH_min;
+ u32 tRP_min;
+ u32 tRR_min;
+ u64 tRST_max;
+ u32 tWB_max;
+ u32 tWC_min;
+ u32 tWH_min;
+ u32 tWHR_min;
+ u32 tWP_min;
+ u32 tWW_min;
+};
+
#endif /* __LINUX_MTD_NAND_H */
--
1.7.9.5
WARNING: multiple messages have this Message-ID (diff)
From: Boris BREZILLON <b.brezillon.dev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Maxime Ripard
<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
Rob Herring <robherring2-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
David Woodhouse <dwmw2-wEGCiKHe2LqWVfeAwA7xHQ@public.gmane.org>,
Grant Likely
<grant.likely-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Brian Norris
<computersforpeace-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Jason Gunthorpe
<jgunthorpe-ePGOBjL8dl3ta4EC/59zMFaTQe2KTcn/@public.gmane.org>,
Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>
Cc: Boris BREZILLON
<b.brezillon.dev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-doc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
dev-3kdeTeqwOZ9EV1b7eY7vFQ@public.gmane.org
Subject: [PATCH v3 1/9] mtd: nand: define struct nand_timings
Date: Wed, 12 Mar 2014 19:07:36 +0100 [thread overview]
Message-ID: <1394647664-8258-2-git-send-email-b.brezillon.dev@gmail.com> (raw)
In-Reply-To: <1394647664-8258-1-git-send-email-b.brezillon.dev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Define a struct containing the standard NAND timings as described in NAND
datasheets.
Signed-off-by: Boris BREZILLON <b.brezillon.dev-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
include/linux/mtd/nand.h | 49 ++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 389b3c5..f3ff3a3 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -846,4 +846,53 @@ static inline bool nand_is_slc(struct nand_chip *chip)
{
return chip->bits_per_cell == 1;
}
+
+/**
+ * struct nand_sdr_timings - SDR NAND chip timings
+ *
+ * This struct defines the timing requirements of a SDR NAND chip.
+ * These informations can be found in every NAND datasheets and the timings
+ * meaning are described in the ONFI specifications:
+ * www.onfi.org/~/media/ONFI/specs/onfi_3_1_spec.pdf (chapter 4.15 Timing
+ * Parameters)
+ *
+ */
+
+struct nand_sdr_timings {
+ u32 tALH_min;
+ u32 tADL_min;
+ u32 tALS_min;
+ u32 tAR_min;
+ u32 tCEA_max;
+ u32 tCEH_min;
+ u32 tCH_min;
+ u32 tCHZ_max;
+ u32 tCLH_min;
+ u32 tCLR_min;
+ u32 tCLS_min;
+ u32 tCOH_min;
+ u32 tCS_min;
+ u32 tDH_min;
+ u32 tDS_min;
+ u32 tFEAT_max;
+ u32 tIR_min;
+ u32 tITC_max;
+ u32 tRC_min;
+ u32 tREA_max;
+ u32 tREH_min;
+ u32 tRHOH_min;
+ u32 tRHW_min;
+ u32 tRHZ_max;
+ u32 tRLOH_min;
+ u32 tRP_min;
+ u32 tRR_min;
+ u64 tRST_max;
+ u32 tWB_max;
+ u32 tWC_min;
+ u32 tWH_min;
+ u32 tWHR_min;
+ u32 tWP_min;
+ u32 tWW_min;
+};
+
#endif /* __LINUX_MTD_NAND_H */
--
1.7.9.5
--
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WARNING: multiple messages have this Message-ID (diff)
From: Boris BREZILLON <b.brezillon.dev@gmail.com>
To: Maxime Ripard <maxime.ripard@free-electrons.com>,
Rob Herring <robherring2@gmail.com>,
David Woodhouse <dwmw2@infradead.org>,
Grant Likely <grant.likely@linaro.org>,
Brian Norris <computersforpeace@gmail.com>,
Jason Gunthorpe <jgunthorpe@obsidianresearch.com>,
Arnd Bergmann <arnd@arndb.de>
Cc: Boris BREZILLON <b.brezillon.dev@gmail.com>,
devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mtd@lists.infradead.org, dev@linux-sunxi.org
Subject: [PATCH v3 1/9] mtd: nand: define struct nand_timings
Date: Wed, 12 Mar 2014 19:07:36 +0100 [thread overview]
Message-ID: <1394647664-8258-2-git-send-email-b.brezillon.dev@gmail.com> (raw)
In-Reply-To: <1394647664-8258-1-git-send-email-b.brezillon.dev@gmail.com>
Define a struct containing the standard NAND timings as described in NAND
datasheets.
Signed-off-by: Boris BREZILLON <b.brezillon.dev@gmail.com>
---
include/linux/mtd/nand.h | 49 ++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 49 insertions(+)
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 389b3c5..f3ff3a3 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -846,4 +846,53 @@ static inline bool nand_is_slc(struct nand_chip *chip)
{
return chip->bits_per_cell == 1;
}
+
+/**
+ * struct nand_sdr_timings - SDR NAND chip timings
+ *
+ * This struct defines the timing requirements of a SDR NAND chip.
+ * These informations can be found in every NAND datasheets and the timings
+ * meaning are described in the ONFI specifications:
+ * www.onfi.org/~/media/ONFI/specs/onfi_3_1_spec.pdf (chapter 4.15 Timing
+ * Parameters)
+ *
+ */
+
+struct nand_sdr_timings {
+ u32 tALH_min;
+ u32 tADL_min;
+ u32 tALS_min;
+ u32 tAR_min;
+ u32 tCEA_max;
+ u32 tCEH_min;
+ u32 tCH_min;
+ u32 tCHZ_max;
+ u32 tCLH_min;
+ u32 tCLR_min;
+ u32 tCLS_min;
+ u32 tCOH_min;
+ u32 tCS_min;
+ u32 tDH_min;
+ u32 tDS_min;
+ u32 tFEAT_max;
+ u32 tIR_min;
+ u32 tITC_max;
+ u32 tRC_min;
+ u32 tREA_max;
+ u32 tREH_min;
+ u32 tRHOH_min;
+ u32 tRHW_min;
+ u32 tRHZ_max;
+ u32 tRLOH_min;
+ u32 tRP_min;
+ u32 tRR_min;
+ u64 tRST_max;
+ u32 tWB_max;
+ u32 tWC_min;
+ u32 tWH_min;
+ u32 tWHR_min;
+ u32 tWP_min;
+ u32 tWW_min;
+};
+
#endif /* __LINUX_MTD_NAND_H */
--
1.7.9.5
next prev parent reply other threads:[~2014-03-12 18:07 UTC|newest]
Thread overview: 115+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-03-12 18:07 [PATCH v3 0/9] mtd: nand: add sunxi NAND Flash Controller support Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON [this message]
2014-03-12 18:07 ` [PATCH v3 1/9] mtd: nand: define struct nand_timings Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-04-30 17:51 ` Brian Norris
2014-04-30 17:51 ` Brian Norris
2014-04-30 17:51 ` Brian Norris
2014-05-01 17:36 ` Boris BREZILLON
2014-05-01 17:36 ` Boris BREZILLON
2014-05-01 17:36 ` Boris BREZILLON
2014-05-08 14:29 ` Lee Jones
2014-05-08 14:29 ` Lee Jones
2014-05-08 14:29 ` Lee Jones
2014-05-09 15:47 ` Boris BREZILLON
2014-05-09 15:47 ` Boris BREZILLON
2014-05-20 18:13 ` Brian Norris
2014-05-20 18:13 ` Brian Norris
2014-05-20 18:13 ` Brian Norris
2014-03-12 18:07 ` [PATCH v3 2/9] mtd: nand: add ONFI timing mode to nand_timings converter Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-04-30 18:06 ` Brian Norris
2014-04-30 18:06 ` Brian Norris
2014-04-30 18:06 ` Brian Norris
2014-07-09 17:25 ` Brian Norris
2014-07-09 17:25 ` Brian Norris
2014-07-09 17:25 ` Brian Norris
2014-07-09 17:25 ` Brian Norris
2014-03-12 18:07 ` [PATCH v3 3/9] of: mtd: add NAND timing mode retrieval support Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-04-30 18:14 ` Brian Norris
2014-04-30 18:14 ` Brian Norris
2014-04-30 18:14 ` Brian Norris
2014-03-12 18:07 ` [PATCH v3 4/9] of: mtd: add documentation for the ONFI NAND timing mode property Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-03-12 18:27 ` Warner Losh
2014-03-12 18:27 ` Warner Losh
2014-03-12 18:27 ` Warner Losh
2014-03-12 18:48 ` Boris BREZILLON
2014-03-12 18:48 ` Boris BREZILLON
2014-03-12 18:48 ` Boris BREZILLON
2014-05-20 18:25 ` Brian Norris
2014-05-20 18:25 ` Brian Norris
2014-05-20 18:25 ` Brian Norris
2014-05-20 18:25 ` Brian Norris
2014-05-20 19:30 ` Boris BREZILLON
2014-05-20 19:30 ` Boris BREZILLON
2014-05-20 19:30 ` Boris BREZILLON
2014-05-20 19:51 ` Jason Gunthorpe
2014-05-20 19:51 ` Jason Gunthorpe
2014-05-20 19:51 ` Jason Gunthorpe
2014-05-20 19:55 ` Brian Norris
2014-05-20 19:55 ` Brian Norris
2014-05-20 19:55 ` Brian Norris
2014-05-20 19:52 ` Brian Norris
2014-05-20 19:52 ` Brian Norris
2014-05-20 19:52 ` Brian Norris
2014-05-20 21:32 ` Boris BREZILLON
2014-05-20 21:32 ` Boris BREZILLON
2014-05-20 21:32 ` Boris BREZILLON
2014-07-09 17:46 ` Brian Norris
2014-07-09 17:46 ` Brian Norris
2014-07-09 17:46 ` Brian Norris
2014-07-09 17:46 ` Brian Norris
2014-03-12 18:07 ` [PATCH v3 5/9] mtd: nand: add sunxi NAND flash controller support Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-05-09 16:03 ` Ezequiel Garcia
2014-05-09 16:03 ` Ezequiel Garcia
2014-05-09 16:03 ` Ezequiel Garcia
2014-05-09 16:03 ` Ezequiel Garcia
2014-05-09 16:47 ` Boris BREZILLON
2014-05-09 16:47 ` Boris BREZILLON
2014-05-09 16:47 ` Boris BREZILLON
2014-05-09 16:47 ` Boris BREZILLON
2014-05-09 17:05 ` Ezequiel Garcia
2014-05-09 17:05 ` Ezequiel Garcia
2014-05-09 17:05 ` Ezequiel Garcia
2014-05-09 17:05 ` Ezequiel Garcia
2014-05-20 18:49 ` Brian Norris
2014-05-20 18:49 ` Brian Norris
2014-05-20 18:49 ` Brian Norris
2014-05-20 19:21 ` Brian Norris
2014-05-20 19:21 ` Brian Norris
2014-05-20 19:21 ` Brian Norris
2014-05-20 19:21 ` Brian Norris
2014-05-20 19:36 ` Boris BREZILLON
2014-05-20 19:36 ` Boris BREZILLON
2014-05-20 19:36 ` Boris BREZILLON
2014-03-12 18:07 ` [PATCH v3 6/9] mtd: nand: add sunxi NFC dt bindings doc Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-03-12 18:07 ` [PATCH v3 7/9] ARM: dt/sunxi: add NFC node to Allwinner A20 SoC Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-03-12 18:07 ` [PATCH v3 8/9] ARM: dt/sunxi: add A20 NAND controller pin definitions Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-03-12 18:07 ` [PATCH v3 9/9] ARM: sunxi/dt: enable NAND on cubietruck board Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
2014-03-12 18:07 ` Boris BREZILLON
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