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From: prakash.burla@smartplayin.com
To: srinivas.kandagatla@linaro.org
Cc: linux@arm.linux.org.uk, ulf.hansson@linaro.org,
	linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-msm@vger.kernel.org
Subject: RE: Fwd: [PATCH v6 04/12] mmc: mmci: Add Qcom datactrl register variant
Date: Thu, 17 Jul 2014 06:26:39 -0400 (EDT)	[thread overview]
Message-ID: <1405592799.65820182@apps.rackspace.com> (raw)
In-Reply-To: <CA+neC=Of9Ua5OxUiezmTHfzq9zkXVRCFei3xKMbXi3OGV84EHw@mail.gmail.com>

tested-by: Prakash Burla <prakash.burla@smartplayin.com>
This driver tested on AP806X with mmc Driver.

----------------------------------------------------------------------------------
From:  <srinivas.kandagatla@linaro.org>
Date: Mon, Jun 2, 2014 at 2:39 PM
Subject: [PATCH v6 04/12] mmc: mmci: Add Qcom datactrl register variant
To: Russell King <linux@arm.linux.org.uk>, Ulf Hansson
<ulf.hansson@linaro.org>, linux-mmc@vger.kernel.org
Cc: Chris Ball <chris@printf.net>, linux-kernel@vger.kernel.org,
linux-arm-msm@vger.kernel.org, linus.walleij@linaro.org, Srinivas


From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

Instance of this IP on Qualcomm's SOCs has bit different layout for datactrl
register. Bit position datactrl[16:4] hold the true block size instead of power
of 2.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
---
 drivers/mmc/host/mmci.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index ed20bf5..72981f6 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -60,6 +60,8 @@ static unsigned int fmax = 515633;
  * @sdio: variant supports SDIO
  * @st_clkdiv: true if using a ST-specific clock divider algorithm
  * @blksz_datactrl16: true if Block size is at b16..b30 position in
datactrl register
+ * @blksz_datactrl4: true if Block size is at b4..b16 position in datactrl
+ *                  register
  * @pwrreg_powerup: power up value for MMCIPOWER register
  * @signal_direction: input/out direction of bus signals can be indicated
  * @pwrreg_clkgate: MMCIPOWER register must be used to gate the clock
@@ -75,6 +77,7 @@ struct variant_data {
        bool                    sdio;
        bool                    st_clkdiv;
        bool                    blksz_datactrl16;
+       bool                    blksz_datactrl4;
        u32                     pwrreg_powerup;
        bool                    signal_direction;
        bool                    pwrreg_clkgate;
@@ -731,6 +734,8 @@ static void mmci_start_data(struct mmci_host
*host, struct mmc_data *data)

        if (variant->blksz_datactrl16)
                datactrl = MCI_DPSM_ENABLE | (data->blksz << 16);
+       else if (variant->blksz_datactrl4)
+               datactrl = MCI_DPSM_ENABLE | (data->blksz << 4);
        else
                datactrl = MCI_DPSM_ENABLE | blksz_bits << 4;

--
1.9.1


WARNING: multiple messages have this Message-ID (diff)
From: prakash.burla@smartplayin.com
To: srinivas.kandagatla@linaro.org
Cc: linux@arm.linux.org.uk, ulf.hansson@linaro.org,
	linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-msm@vger.kernel.org
Subject: RE: Fwd: [PATCH v6 04/12] mmc: mmci: Add Qcom datactrl register variant
Date: Thu, 17 Jul 2014 06:26:39 -0400 (EDT)	[thread overview]
Message-ID: <1405592799.65820182@apps.rackspace.com> (raw)
In-Reply-To: <CA+neC=Of9Ua5OxUiezmTHfzq9zkXVRCFei3xKMbXi3OGV84EHw@mail.gmail.com>

tested-by: Prakash Burla <prakash.burla@smartplayin.com>
This driver tested on AP806X with mmc Driver.

----------------------------------------------------------------------------------
From:  <srinivas.kandagatla@linaro.org>
Date: Mon, Jun 2, 2014 at 2:39 PM
Subject: [PATCH v6 04/12] mmc: mmci: Add Qcom datactrl register variant
To: Russell King <linux@arm.linux.org.uk>, Ulf Hansson
<ulf.hansson@linaro.org>, linux-mmc@vger.kernel.org
Cc: Chris Ball <chris@printf.net>, linux-kernel@vger.kernel.org,
linux-arm-msm@vger.kernel.org, linus.walleij@linaro.org, Srinivas


From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

Instance of this IP on Qualcomm's SOCs has bit different layout for datactrl
register. Bit position datactrl[16:4] hold the true block size instead of power
of 2.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
---
 drivers/mmc/host/mmci.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c
index ed20bf5..72981f6 100644
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -60,6 +60,8 @@ static unsigned int fmax = 515633;
  * @sdio: variant supports SDIO
  * @st_clkdiv: true if using a ST-specific clock divider algorithm
  * @blksz_datactrl16: true if Block size is at b16..b30 position in
datactrl register
+ * @blksz_datactrl4: true if Block size is at b4..b16 position in datactrl
+ *                  register
  * @pwrreg_powerup: power up value for MMCIPOWER register
  * @signal_direction: input/out direction of bus signals can be indicated
  * @pwrreg_clkgate: MMCIPOWER register must be used to gate the clock
@@ -75,6 +77,7 @@ struct variant_data {
        bool                    sdio;
        bool                    st_clkdiv;
        bool                    blksz_datactrl16;
+       bool                    blksz_datactrl4;
        u32                     pwrreg_powerup;
        bool                    signal_direction;
        bool                    pwrreg_clkgate;
@@ -731,6 +734,8 @@ static void mmci_start_data(struct mmci_host
*host, struct mmc_data *data)

        if (variant->blksz_datactrl16)
                datactrl = MCI_DPSM_ENABLE | (data->blksz << 16);
+       else if (variant->blksz_datactrl4)
+               datactrl = MCI_DPSM_ENABLE | (data->blksz << 4);
        else
                datactrl = MCI_DPSM_ENABLE | blksz_bits << 4;

--
1.9.1

--
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  parent reply	other threads:[~2014-07-17 10:26 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-06-02  9:03 [PATCH v6 00/12] Qualcomm SD Card Controller support srinivas.kandagatla
2014-06-02  9:08 ` [PATCH v6 01/12] mmc: mmci: use NSEC_PER_SEC macro srinivas.kandagatla
2014-06-02  9:08 ` [PATCH v6 02/12] mmc: mmci: Add Qualcomm specific register defines srinivas.kandagatla
2014-06-11 12:45   ` Linus Walleij
2014-06-02  9:08 ` [PATCH v6 03/12] mmc: mmci: Add enough delay between writes to CMD register srinivas.kandagatla
2014-06-11 12:46   ` Linus Walleij
2014-06-02  9:09 ` [PATCH v6 04/12] mmc: mmci: Add Qcom datactrl register variant srinivas.kandagatla
     [not found]   ` <CA+neC=Of9Ua5OxUiezmTHfzq9zkXVRCFei3xKMbXi3OGV84EHw@mail.gmail.com>
2014-07-17 10:26     ` prakash.burla [this message]
2014-07-17 10:26       ` Fwd: " prakash.burla
2014-06-02  9:09 ` [PATCH v6 05/12] mmc: mmci: add ddrmode mask to variant data srinivas.kandagatla
2014-06-02  9:09 ` [PATCH v6 06/12] mmc: mmci: add 8bit bus support in " srinivas.kandagatla
2014-06-02  9:09 ` [PATCH v6 07/12] mmc: mmci: add edge support to data and command out " srinivas.kandagatla
2014-06-02  9:09 ` [PATCH v6 08/12] mmc: mmci: Add support to data commands via variant structure srinivas.kandagatla
2014-06-02  9:09 ` [PATCH v6 09/12] mmc: mmci: add f_max to " srinivas.kandagatla
2014-06-11 12:47   ` Linus Walleij
2014-06-02  9:09 ` [PATCH v6 10/12] mmc: mmci: add explicit clk control srinivas.kandagatla
2014-06-11 12:50   ` Linus Walleij
2014-06-02  9:10 ` [PATCH v6 11/12] mmc: mmci: Add Qcom specific rx_fifocnt logic srinivas.kandagatla
2014-06-11 12:52   ` Linus Walleij
2014-06-02  9:10 ` [PATCH v6 12/12] mmc: mmci: Add Qualcomm Id to amba id table srinivas.kandagatla
2014-06-11 12:52   ` Linus Walleij
     [not found]   ` <CA+neC=PRkUqcL63yNkvJNgRQqvQ+c+1g+qptM7vXH5c9-b5UDw@mail.gmail.com>
2014-07-17  8:31     ` Fwd: " prakash.burla
2014-06-11 17:35 ` [PATCH v6 00/12] Qualcomm SD Card Controller support Ulf Hansson
2014-06-11 17:37   ` Srinivas Kandagatla

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