From: David Woodhouse <dwmw2@infradead.org>
To: Jeff Garzik <jgarzik@mandrakesoft.com>
Cc: bjornw@axis.com, linux-kernel@vger.kernel.org,
linux-mtd@lists.infradead.org
Subject: Re: Missing cache flush.
Date: Tue, 05 Jun 2001 00:29:22 +0100 [thread overview]
Message-ID: <14147.991697362@redhat.com> (raw)
In-Reply-To: <3B1C1872.8D8F1529@mandrakesoft.com>
jgarzik@mandrakesoft.com said:
> > I was pointed at Documentation/DMA-mapping.txt but that doesn't seem
> > very helpful - it's very PCI-specific, and a quick perusal of
> > pci_dma_sync() on i386 shows that it doesn't do what's required anyway.
> What should it do on i386? mb()?
For it to have any use in the situation I described, it would need to
writeback and invalidate the dcache for the affected range. It doesn't seem
to do so, so it seems that it isn't what I require.
The situation is simple - I have a paged RAM setup and I need it cached.
All I want to do is flush and invalidate the cache when I'm about to waggle
whatever I/O ports I waggle to change pages.
There are other situations in which I need the cache flushed, but the above
is one of the simplest.
Even flush_page_to_ram() doesn't seem to do what its name implies, on most
architectures.
--
dwmw2
WARNING: multiple messages have this Message-ID (diff)
From: David Woodhouse <dwmw2@infradead.org>
To: Jeff Garzik <jgarzik@mandrakesoft.com>
Cc: bjornw@axis.com, linux-kernel@vger.kernel.org,
linux-mtd@lists.infradead.org
Subject: Re: Missing cache flush.
Date: Tue, 05 Jun 2001 00:29:22 +0100 [thread overview]
Message-ID: <14147.991697362@redhat.com> (raw)
In-Reply-To: <3B1C1872.8D8F1529@mandrakesoft.com>
In-Reply-To: <3B1C1872.8D8F1529@mandrakesoft.com> <13942.991696607@redhat.com>
jgarzik@mandrakesoft.com said:
> > I was pointed at Documentation/DMA-mapping.txt but that doesn't seem
> > very helpful - it's very PCI-specific, and a quick perusal of
> > pci_dma_sync() on i386 shows that it doesn't do what's required anyway.
> What should it do on i386? mb()?
For it to have any use in the situation I described, it would need to
writeback and invalidate the dcache for the affected range. It doesn't seem
to do so, so it seems that it isn't what I require.
The situation is simple - I have a paged RAM setup and I need it cached.
All I want to do is flush and invalidate the cache when I'm about to waggle
whatever I/O ports I waggle to change pages.
There are other situations in which I need the cache flushed, but the above
is one of the simplest.
Even flush_page_to_ram() doesn't seem to do what its name implies, on most
architectures.
--
dwmw2
next prev parent reply other threads:[~2001-06-04 23:25 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2001-06-04 23:16 Missing cache flush David Woodhouse
2001-06-04 23:23 ` Jeff Garzik
2001-06-04 23:29 ` David Woodhouse [this message]
2001-06-04 23:29 ` David Woodhouse
2001-06-05 2:04 ` David S. Miller
2001-06-05 2:04 ` David S. Miller
2001-06-05 2:03 ` David S. Miller
2001-06-05 2:03 ` David S. Miller
2001-06-05 3:55 ` Chris Wedgwood
2001-06-05 4:01 ` David S. Miller
2001-06-05 4:01 ` David S. Miller
2001-06-05 8:46 ` David Woodhouse
2001-06-05 8:46 ` David Woodhouse
2001-06-05 8:50 ` David S. Miller
2001-06-05 8:50 ` David S. Miller
2001-06-05 9:05 ` David Woodhouse
2001-06-05 9:05 ` David Woodhouse
2001-06-05 9:11 ` David S. Miller
2001-06-05 9:11 ` David S. Miller
2001-06-05 12:42 ` David Woodhouse
2001-06-05 12:42 ` David Woodhouse
2001-06-05 12:48 ` David S. Miller
2001-06-05 12:48 ` David S. Miller
2001-06-05 12:52 ` David Woodhouse
2001-06-05 12:52 ` David Woodhouse
2001-06-06 8:32 ` Albert D. Cahalan
2001-06-06 19:48 ` Pavel Machek
2001-06-05 17:01 ` Jamie Lokier
2001-06-05 23:24 ` Chris Wedgwood
2001-06-06 8:43 ` James Sutherland
2001-06-05 9:29 ` kira brown
2001-06-05 9:29 ` kira brown
2001-06-05 17:16 ` Alan Cox
2001-06-06 19:44 ` Earyly Cyrix CPUs was " Pavel Machek
2001-06-08 16:00 ` Alan Cox
2001-06-05 9:43 ` Johan Adolfsson
2001-06-05 5:28 ` Linus Torvalds
2001-06-05 6:49 ` Alan Cox
2001-06-05 8:29 ` Ingo Molnar
2001-06-05 15:10 ` Ralf Baechle
2001-06-05 9:17 ` Bjorn Wesen
2001-06-05 12:57 ` Chris Wedgwood
2001-06-05 15:17 ` Ralf Baechle
2001-06-05 17:41 ` Daniel Phillips
2001-06-05 14:22 ` Vipin Malik
2001-06-05 14:40 ` Chris Wedgwood
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