From: "Lazar, Lijo" <lijo.lazar@amd.com>
To: Mario Limonciello <mario.limonciello@amd.com>,
Alex Deucher <alexander.deucher@amd.com>,
linux-kernel@vger.kernel.org
Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com>,
Javier Martinez Canillas <javierm@redhat.com>,
dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org,
Daniel Vetter <daniel@ffwll.ch>,
Carlos Soriano Sanchez <csoriano@redhat.com>,
David Airlie <airlied@gmail.com>,
christian.koenig@amd.com
Subject: Re: [PATCH v6 20/45] drm/amd: Parse both v1 and v2 TA microcode headers using same function
Date: Thu, 5 Jan 2023 18:52:24 +0530 [thread overview]
Message-ID: <142113d4-b958-c55e-eacd-04ff4ef3243f@amd.com> (raw)
In-Reply-To: <20230105034327.1439-21-mario.limonciello@amd.com>
On 1/5/2023 9:12 AM, Mario Limonciello wrote:
> Several IP versions duplicate code and can't use the common helpers.
> Move this code into a single function so that the helpers can be used.
>
> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
> ---
> v5->v6:
> * Rebase on earlier patches
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 120 ++++++++++++++++++------
> drivers/gpu/drm/amd/amdgpu/psp_v10_0.c | 64 +------------
> drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 77 ++-------------
> drivers/gpu/drm/amd/amdgpu/psp_v12_0.c | 62 +-----------
> 4 files changed, 109 insertions(+), 214 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> index 7a2fc920739b..d971e3785eaf 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> @@ -3272,41 +3272,75 @@ static int parse_ta_bin_descriptor(struct psp_context *psp,
> return 0;
> }
>
> -int psp_init_ta_microcode(struct psp_context *psp,
> - const char *chip_name)
> +static int parse_ta_v1_microcode(struct psp_context *psp)
> {
> + const struct ta_firmware_header_v1_0 *ta_hdr;
> struct amdgpu_device *adev = psp->adev;
> - char fw_name[PSP_FW_NAME_LEN];
> - const struct ta_firmware_header_v2_0 *ta_hdr;
> - int err = 0;
> - int ta_index = 0;
>
> - if (!chip_name) {
> - dev_err(adev->dev, "invalid chip name for ta microcode\n");
> + ta_hdr = (const struct ta_firmware_header_v1_0 *)
> + adev->psp.ta_fw->data;
> +
> + if (le16_to_cpu(ta_hdr->header.header_version_major) != 1)
> return -EINVAL;
> +
> + adev->psp.xgmi_context.context.bin_desc.fw_version =
> + le32_to_cpu(ta_hdr->xgmi.fw_version);
> + adev->psp.xgmi_context.context.bin_desc.size_bytes =
> + le32_to_cpu(ta_hdr->xgmi.size_bytes);
> + adev->psp.xgmi_context.context.bin_desc.start_addr =
> + (uint8_t *)ta_hdr +
> + le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
> + adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
> + adev->psp.ras_context.context.bin_desc.fw_version =
> + le32_to_cpu(ta_hdr->ras.fw_version);
> + adev->psp.ras_context.context.bin_desc.size_bytes =
> + le32_to_cpu(ta_hdr->ras.size_bytes);
> + adev->psp.ras_context.context.bin_desc.start_addr =
> + (uint8_t *)adev->psp.xgmi_context.context.bin_desc.start_addr +
> + le32_to_cpu(ta_hdr->ras.offset_bytes);
> + adev->psp.hdcp_context.context.bin_desc.fw_version =
> + le32_to_cpu(ta_hdr->hdcp.fw_version);
> + adev->psp.hdcp_context.context.bin_desc.size_bytes =
> + le32_to_cpu(ta_hdr->hdcp.size_bytes);
> + adev->psp.hdcp_context.context.bin_desc.start_addr =
> + (uint8_t *)ta_hdr +
> + le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
> + adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
> + adev->psp.dtm_context.context.bin_desc.fw_version =
> + le32_to_cpu(ta_hdr->dtm.fw_version);
> + adev->psp.dtm_context.context.bin_desc.size_bytes =
> + le32_to_cpu(ta_hdr->dtm.size_bytes);
> + adev->psp.dtm_context.context.bin_desc.start_addr =
> + (uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr +
> + le32_to_cpu(ta_hdr->dtm.offset_bytes);
> + if (adev->apu_flags & AMD_APU_IS_RENOIR) {
> + adev->psp.securedisplay_context.context.bin_desc.fw_version =
> + le32_to_cpu(ta_hdr->securedisplay.fw_version);
> + adev->psp.securedisplay_context.context.bin_desc.size_bytes =
> + le32_to_cpu(ta_hdr->securedisplay.size_bytes);
> + adev->psp.securedisplay_context.context.bin_desc.start_addr =
> + (uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr +
> + le32_to_cpu(ta_hdr->securedisplay.offset_bytes);
> }
psp_v10_0_init_microcode used to get securedisplay_context
unconditionally and now this is restricted to RENOIR following the logic
in psp v12. Better is to fetch all FW details unconditionally and make
the size_bytes to 0 (just to be sure) in specific PSP versions to
prevent their load.
Thanks,
Lijo
>
> - snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ta.bin", chip_name);
> - err = request_firmware(&adev->psp.ta_fw, fw_name, adev->dev);
> - if (err)
> - goto out;
> + return 0;
> +}
>
> - err = amdgpu_ucode_validate(adev->psp.ta_fw);
> - if (err)
> - goto out;
> +static int parse_ta_v2_microcode(struct psp_context *psp)
> +{
> + const struct ta_firmware_header_v2_0 *ta_hdr;
> + struct amdgpu_device *adev = psp->adev;
> + int err = 0;
> + int ta_index = 0;
>
> ta_hdr = (const struct ta_firmware_header_v2_0 *)adev->psp.ta_fw->data;
>
> - if (le16_to_cpu(ta_hdr->header.header_version_major) != 2) {
> - dev_err(adev->dev, "unsupported TA header version\n");
> - err = -EINVAL;
> - goto out;
> - }
> + if (le16_to_cpu(ta_hdr->header.header_version_major) != 2)
> + return -EINVAL;
>
> if (le32_to_cpu(ta_hdr->ta_fw_bin_count) >= UCODE_MAX_PSP_PACKAGING) {
> dev_err(adev->dev, "packed TA count exceeds maximum limit\n");
> - err = -EINVAL;
> - goto out;
> + return -EINVAL;
> }
>
> for (ta_index = 0; ta_index < le32_to_cpu(ta_hdr->ta_fw_bin_count); ta_index++) {
> @@ -3314,14 +3348,46 @@ int psp_init_ta_microcode(struct psp_context *psp,
> &ta_hdr->ta_fw_bin[ta_index],
> ta_hdr);
> if (err)
> - goto out;
> + return err;
> }
>
> return 0;
> -out:
> - dev_err(adev->dev, "fail to initialize ta microcode\n");
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> +}
> +
> +int psp_init_ta_microcode(struct psp_context *psp, const char *chip_name)
> +{
> + const struct common_firmware_header *hdr;
> + struct amdgpu_device *adev = psp->adev;
> + char fw_name[PSP_FW_NAME_LEN];
> + int err;
> +
> + snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ta.bin", chip_name);
> + err = request_firmware(&adev->psp.ta_fw, fw_name, adev->dev);
> + if (err)
> + return err;
> + err = amdgpu_ucode_validate(adev->psp.ta_fw);
> + if (err)
> + return err;
> +
> + hdr = (const struct common_firmware_header *)adev->psp.ta_fw->data;
> + switch (le16_to_cpu(hdr->header_version_major)) {
> + case 1:
> + err = parse_ta_v1_microcode(psp);
> + break;
> + case 2:
> + err = parse_ta_v2_microcode(psp);
> + break;
> + default:
> + dev_err(adev->dev, "unsupported TA header version\n");
> + err = -EINVAL;
> + }
> +
> + if (err) {
> + dev_err(adev->dev, "fail to initialize ta microcode\n");
> + release_firmware(adev->psp.ta_fw);
> + adev->psp.ta_fw = NULL;
> + }
> +
> return err;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
> index 9de46fa8f46c..f14fcfb9c425 100644
> --- a/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
> @@ -48,9 +48,8 @@ static int psp_v10_0_init_microcode(struct psp_context *psp)
> {
> struct amdgpu_device *adev = psp->adev;
> const char *chip_name;
> - char fw_name[30];
> + char ucode_prefix[30];
> int err = 0;
> - const struct ta_firmware_header_v1_0 *ta_hdr;
> DRM_DEBUG("\n");
>
> switch (adev->asic_type) {
> @@ -64,66 +63,13 @@ static int psp_v10_0_init_microcode(struct psp_context *psp)
> break;
> default: BUG();
> }
> + amdgpu_ucode_ip_version_decode(adev, MP0_HWIP, ucode_prefix, sizeof(ucode_prefix));
>
> - err = psp_init_asd_microcode(psp, chip_name);
> + err = psp_init_asd_microcode(psp, ucode_prefix);
> if (err)
> - goto out;
> -
> - snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ta.bin", chip_name);
> - err = request_firmware(&adev->psp.ta_fw, fw_name, adev->dev);
> - if (err) {
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> - dev_info(adev->dev,
> - "psp v10.0: Failed to load firmware \"%s\"\n",
> - fw_name);
> - } else {
> - err = amdgpu_ucode_validate(adev->psp.ta_fw);
> - if (err)
> - goto out2;
> -
> - ta_hdr = (const struct ta_firmware_header_v1_0 *)
> - adev->psp.ta_fw->data;
> - adev->psp.hdcp_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->hdcp.fw_version);
> - adev->psp.hdcp_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->hdcp.size_bytes);
> - adev->psp.hdcp_context.context.bin_desc.start_addr =
> - (uint8_t *)ta_hdr +
> - le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
> -
> - adev->psp.dtm_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->dtm.fw_version);
> - adev->psp.dtm_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->dtm.size_bytes);
> - adev->psp.dtm_context.context.bin_desc.start_addr =
> - (uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr +
> - le32_to_cpu(ta_hdr->dtm.offset_bytes);
> -
> - adev->psp.securedisplay_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->securedisplay.fw_version);
> - adev->psp.securedisplay_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->securedisplay.size_bytes);
> - adev->psp.securedisplay_context.context.bin_desc.start_addr =
> - (uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr +
> - le32_to_cpu(ta_hdr->securedisplay.offset_bytes);
> -
> - adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
> - }
> -
> - return 0;
> -
> -out2:
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> -out:
> - if (err) {
> - dev_err(adev->dev,
> - "psp v10.0: Failed to load firmware \"%s\"\n",
> - fw_name);
> - }
> + return err;
>
> - return err;
> + return psp_init_ta_microcode(psp, ucode_prefix);
> }
>
> static int psp_v10_0_ring_create(struct psp_context *psp,
> diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> index bd3e3e23a939..21d20ca2377a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> @@ -89,9 +89,8 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
> {
> struct amdgpu_device *adev = psp->adev;
> const char *chip_name;
> - char fw_name[PSP_FW_NAME_LEN];
> + char ucode_prefix[30];
> int err = 0;
> - const struct ta_firmware_header_v1_0 *ta_hdr;
>
> DRM_DEBUG("\n");
>
> @@ -129,6 +128,7 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
> default:
> BUG();
> }
> + amdgpu_ucode_ip_version_decode(adev, MP0_HWIP, ucode_prefix, sizeof(ucode_prefix));
>
>
> switch (adev->ip_versions[MP0_HWIP][0]) {
> @@ -140,35 +140,9 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
> err = psp_init_asd_microcode(psp, chip_name);
> if (err)
> return err;
> - snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ta.bin", chip_name);
> - err = request_firmware(&adev->psp.ta_fw, fw_name, adev->dev);
> - if (err) {
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> - dev_info(adev->dev,
> - "psp v11.0: Failed to load firmware \"%s\"\n", fw_name);
> - } else {
> - err = amdgpu_ucode_validate(adev->psp.ta_fw);
> - if (err)
> - goto out2;
> -
> - ta_hdr = (const struct ta_firmware_header_v1_0 *)adev->psp.ta_fw->data;
> - adev->psp.xgmi_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->xgmi.fw_version);
> - adev->psp.xgmi_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->xgmi.size_bytes);
> - adev->psp.xgmi_context.context.bin_desc.start_addr =
> - (uint8_t *)ta_hdr +
> - le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
> - adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
> - adev->psp.ras_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->ras.fw_version);
> - adev->psp.ras_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->ras.size_bytes);
> - adev->psp.ras_context.context.bin_desc.start_addr =
> - (uint8_t *)adev->psp.xgmi_context.context.bin_desc.start_addr +
> - le32_to_cpu(ta_hdr->ras.offset_bytes);
> - }
> + err = psp_init_ta_microcode(psp, ucode_prefix);
> + if (err)
> + return err;
> break;
> case IP_VERSION(11, 0, 0):
> case IP_VERSION(11, 0, 5):
> @@ -179,39 +153,9 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
> err = psp_init_asd_microcode(psp, chip_name);
> if (err)
> return err;
> - snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ta.bin", chip_name);
> - err = request_firmware(&adev->psp.ta_fw, fw_name, adev->dev);
> - if (err) {
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> - dev_info(adev->dev,
> - "psp v11.0: Failed to load firmware \"%s\"\n", fw_name);
> - } else {
> - err = amdgpu_ucode_validate(adev->psp.ta_fw);
> - if (err)
> - goto out2;
> -
> - ta_hdr = (const struct ta_firmware_header_v1_0 *)adev->psp.ta_fw->data;
> - adev->psp.hdcp_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->hdcp.fw_version);
> - adev->psp.hdcp_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->hdcp.size_bytes);
> - adev->psp.hdcp_context.context.bin_desc.start_addr =
> - (uint8_t *)ta_hdr +
> - le32_to_cpu(
> - ta_hdr->header.ucode_array_offset_bytes);
> -
> - adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
> -
> - adev->psp.dtm_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->dtm.fw_version);
> - adev->psp.dtm_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->dtm.size_bytes);
> - adev->psp.dtm_context.context.bin_desc.start_addr =
> - (uint8_t *)adev->psp.hdcp_context.context
> - .bin_desc.start_addr +
> - le32_to_cpu(ta_hdr->dtm.offset_bytes);
> - }
> + err = psp_init_ta_microcode(psp, ucode_prefix);
> + if (err)
> + return err;
> break;
> case IP_VERSION(11, 0, 7):
> case IP_VERSION(11, 0, 11):
> @@ -237,11 +181,6 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
> }
>
> return 0;
> -
> -out2:
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> - return err;
> }
>
> static int psp_v11_0_wait_for_bootloader(struct psp_context *psp)
> diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v12_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v12_0.c
> index 8ed2281b6557..634fa2822d8a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/psp_v12_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/psp_v12_0.c
> @@ -49,9 +49,8 @@ static int psp_v12_0_init_microcode(struct psp_context *psp)
> {
> struct amdgpu_device *adev = psp->adev;
> const char *chip_name;
> - char fw_name[30];
> + char ucode_prefix[30];
> int err = 0;
> - const struct ta_firmware_header_v1_0 *ta_hdr;
> DRM_DEBUG("\n");
>
> switch (adev->asic_type) {
> @@ -64,67 +63,12 @@ static int psp_v12_0_init_microcode(struct psp_context *psp)
> default:
> BUG();
> }
> + amdgpu_ucode_ip_version_decode(adev, MP0_HWIP, ucode_prefix, sizeof(ucode_prefix));
>
> err = psp_init_asd_microcode(psp, chip_name);
> if (err)
> return err;
> -
> - snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ta.bin", chip_name);
> - err = request_firmware(&adev->psp.ta_fw, fw_name, adev->dev);
> - if (err) {
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> - dev_info(adev->dev,
> - "psp v12.0: Failed to load firmware \"%s\"\n",
> - fw_name);
> - } else {
> - err = amdgpu_ucode_validate(adev->psp.ta_fw);
> - if (err)
> - goto out;
> -
> - ta_hdr = (const struct ta_firmware_header_v1_0 *)
> - adev->psp.ta_fw->data;
> - adev->psp.hdcp_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->hdcp.fw_version);
> - adev->psp.hdcp_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->hdcp.size_bytes);
> - adev->psp.hdcp_context.context.bin_desc.start_addr =
> - (uint8_t *)ta_hdr +
> - le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
> -
> - adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
> -
> - adev->psp.dtm_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->dtm.fw_version);
> - adev->psp.dtm_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->dtm.size_bytes);
> - adev->psp.dtm_context.context.bin_desc.start_addr =
> - (uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr +
> - le32_to_cpu(ta_hdr->dtm.offset_bytes);
> -
> - if (adev->apu_flags & AMD_APU_IS_RENOIR) {
> - adev->psp.securedisplay_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->securedisplay.fw_version);
> - adev->psp.securedisplay_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->securedisplay.size_bytes);
> - adev->psp.securedisplay_context.context.bin_desc.start_addr =
> - (uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr +
> - le32_to_cpu(ta_hdr->securedisplay.offset_bytes);
> - }
> - }
> -
> - return 0;
> -
> -out:
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> - if (err) {
> - dev_err(adev->dev,
> - "psp v12.0: Failed to load firmware \"%s\"\n",
> - fw_name);
> - }
> -
> - return err;
> + return psp_init_ta_microcode(psp, ucode_prefix);
> }
>
> static int psp_v12_0_bootloader_load_sysdrv(struct psp_context *psp)
WARNING: multiple messages have this Message-ID (diff)
From: "Lazar, Lijo" <lijo.lazar@amd.com>
To: Mario Limonciello <mario.limonciello@amd.com>,
Alex Deucher <alexander.deucher@amd.com>,
linux-kernel@vger.kernel.org
Cc: "Pan, Xinhui" <Xinhui.Pan@amd.com>,
Javier Martinez Canillas <javierm@redhat.com>,
dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org,
Carlos Soriano Sanchez <csoriano@redhat.com>,
christian.koenig@amd.com
Subject: Re: [PATCH v6 20/45] drm/amd: Parse both v1 and v2 TA microcode headers using same function
Date: Thu, 5 Jan 2023 18:52:24 +0530 [thread overview]
Message-ID: <142113d4-b958-c55e-eacd-04ff4ef3243f@amd.com> (raw)
In-Reply-To: <20230105034327.1439-21-mario.limonciello@amd.com>
On 1/5/2023 9:12 AM, Mario Limonciello wrote:
> Several IP versions duplicate code and can't use the common helpers.
> Move this code into a single function so that the helpers can be used.
>
> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
> ---
> v5->v6:
> * Rebase on earlier patches
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 120 ++++++++++++++++++------
> drivers/gpu/drm/amd/amdgpu/psp_v10_0.c | 64 +------------
> drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 77 ++-------------
> drivers/gpu/drm/amd/amdgpu/psp_v12_0.c | 62 +-----------
> 4 files changed, 109 insertions(+), 214 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> index 7a2fc920739b..d971e3785eaf 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> @@ -3272,41 +3272,75 @@ static int parse_ta_bin_descriptor(struct psp_context *psp,
> return 0;
> }
>
> -int psp_init_ta_microcode(struct psp_context *psp,
> - const char *chip_name)
> +static int parse_ta_v1_microcode(struct psp_context *psp)
> {
> + const struct ta_firmware_header_v1_0 *ta_hdr;
> struct amdgpu_device *adev = psp->adev;
> - char fw_name[PSP_FW_NAME_LEN];
> - const struct ta_firmware_header_v2_0 *ta_hdr;
> - int err = 0;
> - int ta_index = 0;
>
> - if (!chip_name) {
> - dev_err(adev->dev, "invalid chip name for ta microcode\n");
> + ta_hdr = (const struct ta_firmware_header_v1_0 *)
> + adev->psp.ta_fw->data;
> +
> + if (le16_to_cpu(ta_hdr->header.header_version_major) != 1)
> return -EINVAL;
> +
> + adev->psp.xgmi_context.context.bin_desc.fw_version =
> + le32_to_cpu(ta_hdr->xgmi.fw_version);
> + adev->psp.xgmi_context.context.bin_desc.size_bytes =
> + le32_to_cpu(ta_hdr->xgmi.size_bytes);
> + adev->psp.xgmi_context.context.bin_desc.start_addr =
> + (uint8_t *)ta_hdr +
> + le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
> + adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
> + adev->psp.ras_context.context.bin_desc.fw_version =
> + le32_to_cpu(ta_hdr->ras.fw_version);
> + adev->psp.ras_context.context.bin_desc.size_bytes =
> + le32_to_cpu(ta_hdr->ras.size_bytes);
> + adev->psp.ras_context.context.bin_desc.start_addr =
> + (uint8_t *)adev->psp.xgmi_context.context.bin_desc.start_addr +
> + le32_to_cpu(ta_hdr->ras.offset_bytes);
> + adev->psp.hdcp_context.context.bin_desc.fw_version =
> + le32_to_cpu(ta_hdr->hdcp.fw_version);
> + adev->psp.hdcp_context.context.bin_desc.size_bytes =
> + le32_to_cpu(ta_hdr->hdcp.size_bytes);
> + adev->psp.hdcp_context.context.bin_desc.start_addr =
> + (uint8_t *)ta_hdr +
> + le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
> + adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
> + adev->psp.dtm_context.context.bin_desc.fw_version =
> + le32_to_cpu(ta_hdr->dtm.fw_version);
> + adev->psp.dtm_context.context.bin_desc.size_bytes =
> + le32_to_cpu(ta_hdr->dtm.size_bytes);
> + adev->psp.dtm_context.context.bin_desc.start_addr =
> + (uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr +
> + le32_to_cpu(ta_hdr->dtm.offset_bytes);
> + if (adev->apu_flags & AMD_APU_IS_RENOIR) {
> + adev->psp.securedisplay_context.context.bin_desc.fw_version =
> + le32_to_cpu(ta_hdr->securedisplay.fw_version);
> + adev->psp.securedisplay_context.context.bin_desc.size_bytes =
> + le32_to_cpu(ta_hdr->securedisplay.size_bytes);
> + adev->psp.securedisplay_context.context.bin_desc.start_addr =
> + (uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr +
> + le32_to_cpu(ta_hdr->securedisplay.offset_bytes);
> }
psp_v10_0_init_microcode used to get securedisplay_context
unconditionally and now this is restricted to RENOIR following the logic
in psp v12. Better is to fetch all FW details unconditionally and make
the size_bytes to 0 (just to be sure) in specific PSP versions to
prevent their load.
Thanks,
Lijo
>
> - snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ta.bin", chip_name);
> - err = request_firmware(&adev->psp.ta_fw, fw_name, adev->dev);
> - if (err)
> - goto out;
> + return 0;
> +}
>
> - err = amdgpu_ucode_validate(adev->psp.ta_fw);
> - if (err)
> - goto out;
> +static int parse_ta_v2_microcode(struct psp_context *psp)
> +{
> + const struct ta_firmware_header_v2_0 *ta_hdr;
> + struct amdgpu_device *adev = psp->adev;
> + int err = 0;
> + int ta_index = 0;
>
> ta_hdr = (const struct ta_firmware_header_v2_0 *)adev->psp.ta_fw->data;
>
> - if (le16_to_cpu(ta_hdr->header.header_version_major) != 2) {
> - dev_err(adev->dev, "unsupported TA header version\n");
> - err = -EINVAL;
> - goto out;
> - }
> + if (le16_to_cpu(ta_hdr->header.header_version_major) != 2)
> + return -EINVAL;
>
> if (le32_to_cpu(ta_hdr->ta_fw_bin_count) >= UCODE_MAX_PSP_PACKAGING) {
> dev_err(adev->dev, "packed TA count exceeds maximum limit\n");
> - err = -EINVAL;
> - goto out;
> + return -EINVAL;
> }
>
> for (ta_index = 0; ta_index < le32_to_cpu(ta_hdr->ta_fw_bin_count); ta_index++) {
> @@ -3314,14 +3348,46 @@ int psp_init_ta_microcode(struct psp_context *psp,
> &ta_hdr->ta_fw_bin[ta_index],
> ta_hdr);
> if (err)
> - goto out;
> + return err;
> }
>
> return 0;
> -out:
> - dev_err(adev->dev, "fail to initialize ta microcode\n");
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> +}
> +
> +int psp_init_ta_microcode(struct psp_context *psp, const char *chip_name)
> +{
> + const struct common_firmware_header *hdr;
> + struct amdgpu_device *adev = psp->adev;
> + char fw_name[PSP_FW_NAME_LEN];
> + int err;
> +
> + snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ta.bin", chip_name);
> + err = request_firmware(&adev->psp.ta_fw, fw_name, adev->dev);
> + if (err)
> + return err;
> + err = amdgpu_ucode_validate(adev->psp.ta_fw);
> + if (err)
> + return err;
> +
> + hdr = (const struct common_firmware_header *)adev->psp.ta_fw->data;
> + switch (le16_to_cpu(hdr->header_version_major)) {
> + case 1:
> + err = parse_ta_v1_microcode(psp);
> + break;
> + case 2:
> + err = parse_ta_v2_microcode(psp);
> + break;
> + default:
> + dev_err(adev->dev, "unsupported TA header version\n");
> + err = -EINVAL;
> + }
> +
> + if (err) {
> + dev_err(adev->dev, "fail to initialize ta microcode\n");
> + release_firmware(adev->psp.ta_fw);
> + adev->psp.ta_fw = NULL;
> + }
> +
> return err;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
> index 9de46fa8f46c..f14fcfb9c425 100644
> --- a/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
> @@ -48,9 +48,8 @@ static int psp_v10_0_init_microcode(struct psp_context *psp)
> {
> struct amdgpu_device *adev = psp->adev;
> const char *chip_name;
> - char fw_name[30];
> + char ucode_prefix[30];
> int err = 0;
> - const struct ta_firmware_header_v1_0 *ta_hdr;
> DRM_DEBUG("\n");
>
> switch (adev->asic_type) {
> @@ -64,66 +63,13 @@ static int psp_v10_0_init_microcode(struct psp_context *psp)
> break;
> default: BUG();
> }
> + amdgpu_ucode_ip_version_decode(adev, MP0_HWIP, ucode_prefix, sizeof(ucode_prefix));
>
> - err = psp_init_asd_microcode(psp, chip_name);
> + err = psp_init_asd_microcode(psp, ucode_prefix);
> if (err)
> - goto out;
> -
> - snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ta.bin", chip_name);
> - err = request_firmware(&adev->psp.ta_fw, fw_name, adev->dev);
> - if (err) {
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> - dev_info(adev->dev,
> - "psp v10.0: Failed to load firmware \"%s\"\n",
> - fw_name);
> - } else {
> - err = amdgpu_ucode_validate(adev->psp.ta_fw);
> - if (err)
> - goto out2;
> -
> - ta_hdr = (const struct ta_firmware_header_v1_0 *)
> - adev->psp.ta_fw->data;
> - adev->psp.hdcp_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->hdcp.fw_version);
> - adev->psp.hdcp_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->hdcp.size_bytes);
> - adev->psp.hdcp_context.context.bin_desc.start_addr =
> - (uint8_t *)ta_hdr +
> - le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
> -
> - adev->psp.dtm_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->dtm.fw_version);
> - adev->psp.dtm_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->dtm.size_bytes);
> - adev->psp.dtm_context.context.bin_desc.start_addr =
> - (uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr +
> - le32_to_cpu(ta_hdr->dtm.offset_bytes);
> -
> - adev->psp.securedisplay_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->securedisplay.fw_version);
> - adev->psp.securedisplay_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->securedisplay.size_bytes);
> - adev->psp.securedisplay_context.context.bin_desc.start_addr =
> - (uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr +
> - le32_to_cpu(ta_hdr->securedisplay.offset_bytes);
> -
> - adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
> - }
> -
> - return 0;
> -
> -out2:
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> -out:
> - if (err) {
> - dev_err(adev->dev,
> - "psp v10.0: Failed to load firmware \"%s\"\n",
> - fw_name);
> - }
> + return err;
>
> - return err;
> + return psp_init_ta_microcode(psp, ucode_prefix);
> }
>
> static int psp_v10_0_ring_create(struct psp_context *psp,
> diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> index bd3e3e23a939..21d20ca2377a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> @@ -89,9 +89,8 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
> {
> struct amdgpu_device *adev = psp->adev;
> const char *chip_name;
> - char fw_name[PSP_FW_NAME_LEN];
> + char ucode_prefix[30];
> int err = 0;
> - const struct ta_firmware_header_v1_0 *ta_hdr;
>
> DRM_DEBUG("\n");
>
> @@ -129,6 +128,7 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
> default:
> BUG();
> }
> + amdgpu_ucode_ip_version_decode(adev, MP0_HWIP, ucode_prefix, sizeof(ucode_prefix));
>
>
> switch (adev->ip_versions[MP0_HWIP][0]) {
> @@ -140,35 +140,9 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
> err = psp_init_asd_microcode(psp, chip_name);
> if (err)
> return err;
> - snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ta.bin", chip_name);
> - err = request_firmware(&adev->psp.ta_fw, fw_name, adev->dev);
> - if (err) {
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> - dev_info(adev->dev,
> - "psp v11.0: Failed to load firmware \"%s\"\n", fw_name);
> - } else {
> - err = amdgpu_ucode_validate(adev->psp.ta_fw);
> - if (err)
> - goto out2;
> -
> - ta_hdr = (const struct ta_firmware_header_v1_0 *)adev->psp.ta_fw->data;
> - adev->psp.xgmi_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->xgmi.fw_version);
> - adev->psp.xgmi_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->xgmi.size_bytes);
> - adev->psp.xgmi_context.context.bin_desc.start_addr =
> - (uint8_t *)ta_hdr +
> - le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
> - adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
> - adev->psp.ras_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->ras.fw_version);
> - adev->psp.ras_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->ras.size_bytes);
> - adev->psp.ras_context.context.bin_desc.start_addr =
> - (uint8_t *)adev->psp.xgmi_context.context.bin_desc.start_addr +
> - le32_to_cpu(ta_hdr->ras.offset_bytes);
> - }
> + err = psp_init_ta_microcode(psp, ucode_prefix);
> + if (err)
> + return err;
> break;
> case IP_VERSION(11, 0, 0):
> case IP_VERSION(11, 0, 5):
> @@ -179,39 +153,9 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
> err = psp_init_asd_microcode(psp, chip_name);
> if (err)
> return err;
> - snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ta.bin", chip_name);
> - err = request_firmware(&adev->psp.ta_fw, fw_name, adev->dev);
> - if (err) {
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> - dev_info(adev->dev,
> - "psp v11.0: Failed to load firmware \"%s\"\n", fw_name);
> - } else {
> - err = amdgpu_ucode_validate(adev->psp.ta_fw);
> - if (err)
> - goto out2;
> -
> - ta_hdr = (const struct ta_firmware_header_v1_0 *)adev->psp.ta_fw->data;
> - adev->psp.hdcp_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->hdcp.fw_version);
> - adev->psp.hdcp_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->hdcp.size_bytes);
> - adev->psp.hdcp_context.context.bin_desc.start_addr =
> - (uint8_t *)ta_hdr +
> - le32_to_cpu(
> - ta_hdr->header.ucode_array_offset_bytes);
> -
> - adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
> -
> - adev->psp.dtm_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->dtm.fw_version);
> - adev->psp.dtm_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->dtm.size_bytes);
> - adev->psp.dtm_context.context.bin_desc.start_addr =
> - (uint8_t *)adev->psp.hdcp_context.context
> - .bin_desc.start_addr +
> - le32_to_cpu(ta_hdr->dtm.offset_bytes);
> - }
> + err = psp_init_ta_microcode(psp, ucode_prefix);
> + if (err)
> + return err;
> break;
> case IP_VERSION(11, 0, 7):
> case IP_VERSION(11, 0, 11):
> @@ -237,11 +181,6 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
> }
>
> return 0;
> -
> -out2:
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> - return err;
> }
>
> static int psp_v11_0_wait_for_bootloader(struct psp_context *psp)
> diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v12_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v12_0.c
> index 8ed2281b6557..634fa2822d8a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/psp_v12_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/psp_v12_0.c
> @@ -49,9 +49,8 @@ static int psp_v12_0_init_microcode(struct psp_context *psp)
> {
> struct amdgpu_device *adev = psp->adev;
> const char *chip_name;
> - char fw_name[30];
> + char ucode_prefix[30];
> int err = 0;
> - const struct ta_firmware_header_v1_0 *ta_hdr;
> DRM_DEBUG("\n");
>
> switch (adev->asic_type) {
> @@ -64,67 +63,12 @@ static int psp_v12_0_init_microcode(struct psp_context *psp)
> default:
> BUG();
> }
> + amdgpu_ucode_ip_version_decode(adev, MP0_HWIP, ucode_prefix, sizeof(ucode_prefix));
>
> err = psp_init_asd_microcode(psp, chip_name);
> if (err)
> return err;
> -
> - snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ta.bin", chip_name);
> - err = request_firmware(&adev->psp.ta_fw, fw_name, adev->dev);
> - if (err) {
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> - dev_info(adev->dev,
> - "psp v12.0: Failed to load firmware \"%s\"\n",
> - fw_name);
> - } else {
> - err = amdgpu_ucode_validate(adev->psp.ta_fw);
> - if (err)
> - goto out;
> -
> - ta_hdr = (const struct ta_firmware_header_v1_0 *)
> - adev->psp.ta_fw->data;
> - adev->psp.hdcp_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->hdcp.fw_version);
> - adev->psp.hdcp_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->hdcp.size_bytes);
> - adev->psp.hdcp_context.context.bin_desc.start_addr =
> - (uint8_t *)ta_hdr +
> - le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
> -
> - adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
> -
> - adev->psp.dtm_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->dtm.fw_version);
> - adev->psp.dtm_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->dtm.size_bytes);
> - adev->psp.dtm_context.context.bin_desc.start_addr =
> - (uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr +
> - le32_to_cpu(ta_hdr->dtm.offset_bytes);
> -
> - if (adev->apu_flags & AMD_APU_IS_RENOIR) {
> - adev->psp.securedisplay_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->securedisplay.fw_version);
> - adev->psp.securedisplay_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->securedisplay.size_bytes);
> - adev->psp.securedisplay_context.context.bin_desc.start_addr =
> - (uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr +
> - le32_to_cpu(ta_hdr->securedisplay.offset_bytes);
> - }
> - }
> -
> - return 0;
> -
> -out:
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> - if (err) {
> - dev_err(adev->dev,
> - "psp v12.0: Failed to load firmware \"%s\"\n",
> - fw_name);
> - }
> -
> - return err;
> + return psp_init_ta_microcode(psp, ucode_prefix);
> }
>
> static int psp_v12_0_bootloader_load_sysdrv(struct psp_context *psp)
WARNING: multiple messages have this Message-ID (diff)
From: "Lazar, Lijo" <lijo.lazar@amd.com>
To: Mario Limonciello <mario.limonciello@amd.com>,
Alex Deucher <alexander.deucher@amd.com>,
linux-kernel@vger.kernel.org
Cc: Javier Martinez Canillas <javierm@redhat.com>,
Carlos Soriano Sanchez <csoriano@redhat.com>,
amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
christian.koenig@amd.com, "Pan, Xinhui" <Xinhui.Pan@amd.com>
Subject: Re: [PATCH v6 20/45] drm/amd: Parse both v1 and v2 TA microcode headers using same function
Date: Thu, 5 Jan 2023 18:52:24 +0530 [thread overview]
Message-ID: <142113d4-b958-c55e-eacd-04ff4ef3243f@amd.com> (raw)
In-Reply-To: <20230105034327.1439-21-mario.limonciello@amd.com>
On 1/5/2023 9:12 AM, Mario Limonciello wrote:
> Several IP versions duplicate code and can't use the common helpers.
> Move this code into a single function so that the helpers can be used.
>
> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
> ---
> v5->v6:
> * Rebase on earlier patches
> ---
> drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 120 ++++++++++++++++++------
> drivers/gpu/drm/amd/amdgpu/psp_v10_0.c | 64 +------------
> drivers/gpu/drm/amd/amdgpu/psp_v11_0.c | 77 ++-------------
> drivers/gpu/drm/amd/amdgpu/psp_v12_0.c | 62 +-----------
> 4 files changed, 109 insertions(+), 214 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> index 7a2fc920739b..d971e3785eaf 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
> @@ -3272,41 +3272,75 @@ static int parse_ta_bin_descriptor(struct psp_context *psp,
> return 0;
> }
>
> -int psp_init_ta_microcode(struct psp_context *psp,
> - const char *chip_name)
> +static int parse_ta_v1_microcode(struct psp_context *psp)
> {
> + const struct ta_firmware_header_v1_0 *ta_hdr;
> struct amdgpu_device *adev = psp->adev;
> - char fw_name[PSP_FW_NAME_LEN];
> - const struct ta_firmware_header_v2_0 *ta_hdr;
> - int err = 0;
> - int ta_index = 0;
>
> - if (!chip_name) {
> - dev_err(adev->dev, "invalid chip name for ta microcode\n");
> + ta_hdr = (const struct ta_firmware_header_v1_0 *)
> + adev->psp.ta_fw->data;
> +
> + if (le16_to_cpu(ta_hdr->header.header_version_major) != 1)
> return -EINVAL;
> +
> + adev->psp.xgmi_context.context.bin_desc.fw_version =
> + le32_to_cpu(ta_hdr->xgmi.fw_version);
> + adev->psp.xgmi_context.context.bin_desc.size_bytes =
> + le32_to_cpu(ta_hdr->xgmi.size_bytes);
> + adev->psp.xgmi_context.context.bin_desc.start_addr =
> + (uint8_t *)ta_hdr +
> + le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
> + adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
> + adev->psp.ras_context.context.bin_desc.fw_version =
> + le32_to_cpu(ta_hdr->ras.fw_version);
> + adev->psp.ras_context.context.bin_desc.size_bytes =
> + le32_to_cpu(ta_hdr->ras.size_bytes);
> + adev->psp.ras_context.context.bin_desc.start_addr =
> + (uint8_t *)adev->psp.xgmi_context.context.bin_desc.start_addr +
> + le32_to_cpu(ta_hdr->ras.offset_bytes);
> + adev->psp.hdcp_context.context.bin_desc.fw_version =
> + le32_to_cpu(ta_hdr->hdcp.fw_version);
> + adev->psp.hdcp_context.context.bin_desc.size_bytes =
> + le32_to_cpu(ta_hdr->hdcp.size_bytes);
> + adev->psp.hdcp_context.context.bin_desc.start_addr =
> + (uint8_t *)ta_hdr +
> + le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
> + adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
> + adev->psp.dtm_context.context.bin_desc.fw_version =
> + le32_to_cpu(ta_hdr->dtm.fw_version);
> + adev->psp.dtm_context.context.bin_desc.size_bytes =
> + le32_to_cpu(ta_hdr->dtm.size_bytes);
> + adev->psp.dtm_context.context.bin_desc.start_addr =
> + (uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr +
> + le32_to_cpu(ta_hdr->dtm.offset_bytes);
> + if (adev->apu_flags & AMD_APU_IS_RENOIR) {
> + adev->psp.securedisplay_context.context.bin_desc.fw_version =
> + le32_to_cpu(ta_hdr->securedisplay.fw_version);
> + adev->psp.securedisplay_context.context.bin_desc.size_bytes =
> + le32_to_cpu(ta_hdr->securedisplay.size_bytes);
> + adev->psp.securedisplay_context.context.bin_desc.start_addr =
> + (uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr +
> + le32_to_cpu(ta_hdr->securedisplay.offset_bytes);
> }
psp_v10_0_init_microcode used to get securedisplay_context
unconditionally and now this is restricted to RENOIR following the logic
in psp v12. Better is to fetch all FW details unconditionally and make
the size_bytes to 0 (just to be sure) in specific PSP versions to
prevent their load.
Thanks,
Lijo
>
> - snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ta.bin", chip_name);
> - err = request_firmware(&adev->psp.ta_fw, fw_name, adev->dev);
> - if (err)
> - goto out;
> + return 0;
> +}
>
> - err = amdgpu_ucode_validate(adev->psp.ta_fw);
> - if (err)
> - goto out;
> +static int parse_ta_v2_microcode(struct psp_context *psp)
> +{
> + const struct ta_firmware_header_v2_0 *ta_hdr;
> + struct amdgpu_device *adev = psp->adev;
> + int err = 0;
> + int ta_index = 0;
>
> ta_hdr = (const struct ta_firmware_header_v2_0 *)adev->psp.ta_fw->data;
>
> - if (le16_to_cpu(ta_hdr->header.header_version_major) != 2) {
> - dev_err(adev->dev, "unsupported TA header version\n");
> - err = -EINVAL;
> - goto out;
> - }
> + if (le16_to_cpu(ta_hdr->header.header_version_major) != 2)
> + return -EINVAL;
>
> if (le32_to_cpu(ta_hdr->ta_fw_bin_count) >= UCODE_MAX_PSP_PACKAGING) {
> dev_err(adev->dev, "packed TA count exceeds maximum limit\n");
> - err = -EINVAL;
> - goto out;
> + return -EINVAL;
> }
>
> for (ta_index = 0; ta_index < le32_to_cpu(ta_hdr->ta_fw_bin_count); ta_index++) {
> @@ -3314,14 +3348,46 @@ int psp_init_ta_microcode(struct psp_context *psp,
> &ta_hdr->ta_fw_bin[ta_index],
> ta_hdr);
> if (err)
> - goto out;
> + return err;
> }
>
> return 0;
> -out:
> - dev_err(adev->dev, "fail to initialize ta microcode\n");
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> +}
> +
> +int psp_init_ta_microcode(struct psp_context *psp, const char *chip_name)
> +{
> + const struct common_firmware_header *hdr;
> + struct amdgpu_device *adev = psp->adev;
> + char fw_name[PSP_FW_NAME_LEN];
> + int err;
> +
> + snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ta.bin", chip_name);
> + err = request_firmware(&adev->psp.ta_fw, fw_name, adev->dev);
> + if (err)
> + return err;
> + err = amdgpu_ucode_validate(adev->psp.ta_fw);
> + if (err)
> + return err;
> +
> + hdr = (const struct common_firmware_header *)adev->psp.ta_fw->data;
> + switch (le16_to_cpu(hdr->header_version_major)) {
> + case 1:
> + err = parse_ta_v1_microcode(psp);
> + break;
> + case 2:
> + err = parse_ta_v2_microcode(psp);
> + break;
> + default:
> + dev_err(adev->dev, "unsupported TA header version\n");
> + err = -EINVAL;
> + }
> +
> + if (err) {
> + dev_err(adev->dev, "fail to initialize ta microcode\n");
> + release_firmware(adev->psp.ta_fw);
> + adev->psp.ta_fw = NULL;
> + }
> +
> return err;
> }
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
> index 9de46fa8f46c..f14fcfb9c425 100644
> --- a/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
> @@ -48,9 +48,8 @@ static int psp_v10_0_init_microcode(struct psp_context *psp)
> {
> struct amdgpu_device *adev = psp->adev;
> const char *chip_name;
> - char fw_name[30];
> + char ucode_prefix[30];
> int err = 0;
> - const struct ta_firmware_header_v1_0 *ta_hdr;
> DRM_DEBUG("\n");
>
> switch (adev->asic_type) {
> @@ -64,66 +63,13 @@ static int psp_v10_0_init_microcode(struct psp_context *psp)
> break;
> default: BUG();
> }
> + amdgpu_ucode_ip_version_decode(adev, MP0_HWIP, ucode_prefix, sizeof(ucode_prefix));
>
> - err = psp_init_asd_microcode(psp, chip_name);
> + err = psp_init_asd_microcode(psp, ucode_prefix);
> if (err)
> - goto out;
> -
> - snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ta.bin", chip_name);
> - err = request_firmware(&adev->psp.ta_fw, fw_name, adev->dev);
> - if (err) {
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> - dev_info(adev->dev,
> - "psp v10.0: Failed to load firmware \"%s\"\n",
> - fw_name);
> - } else {
> - err = amdgpu_ucode_validate(adev->psp.ta_fw);
> - if (err)
> - goto out2;
> -
> - ta_hdr = (const struct ta_firmware_header_v1_0 *)
> - adev->psp.ta_fw->data;
> - adev->psp.hdcp_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->hdcp.fw_version);
> - adev->psp.hdcp_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->hdcp.size_bytes);
> - adev->psp.hdcp_context.context.bin_desc.start_addr =
> - (uint8_t *)ta_hdr +
> - le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
> -
> - adev->psp.dtm_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->dtm.fw_version);
> - adev->psp.dtm_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->dtm.size_bytes);
> - adev->psp.dtm_context.context.bin_desc.start_addr =
> - (uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr +
> - le32_to_cpu(ta_hdr->dtm.offset_bytes);
> -
> - adev->psp.securedisplay_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->securedisplay.fw_version);
> - adev->psp.securedisplay_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->securedisplay.size_bytes);
> - adev->psp.securedisplay_context.context.bin_desc.start_addr =
> - (uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr +
> - le32_to_cpu(ta_hdr->securedisplay.offset_bytes);
> -
> - adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
> - }
> -
> - return 0;
> -
> -out2:
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> -out:
> - if (err) {
> - dev_err(adev->dev,
> - "psp v10.0: Failed to load firmware \"%s\"\n",
> - fw_name);
> - }
> + return err;
>
> - return err;
> + return psp_init_ta_microcode(psp, ucode_prefix);
> }
>
> static int psp_v10_0_ring_create(struct psp_context *psp,
> diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> index bd3e3e23a939..21d20ca2377a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/psp_v11_0.c
> @@ -89,9 +89,8 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
> {
> struct amdgpu_device *adev = psp->adev;
> const char *chip_name;
> - char fw_name[PSP_FW_NAME_LEN];
> + char ucode_prefix[30];
> int err = 0;
> - const struct ta_firmware_header_v1_0 *ta_hdr;
>
> DRM_DEBUG("\n");
>
> @@ -129,6 +128,7 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
> default:
> BUG();
> }
> + amdgpu_ucode_ip_version_decode(adev, MP0_HWIP, ucode_prefix, sizeof(ucode_prefix));
>
>
> switch (adev->ip_versions[MP0_HWIP][0]) {
> @@ -140,35 +140,9 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
> err = psp_init_asd_microcode(psp, chip_name);
> if (err)
> return err;
> - snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ta.bin", chip_name);
> - err = request_firmware(&adev->psp.ta_fw, fw_name, adev->dev);
> - if (err) {
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> - dev_info(adev->dev,
> - "psp v11.0: Failed to load firmware \"%s\"\n", fw_name);
> - } else {
> - err = amdgpu_ucode_validate(adev->psp.ta_fw);
> - if (err)
> - goto out2;
> -
> - ta_hdr = (const struct ta_firmware_header_v1_0 *)adev->psp.ta_fw->data;
> - adev->psp.xgmi_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->xgmi.fw_version);
> - adev->psp.xgmi_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->xgmi.size_bytes);
> - adev->psp.xgmi_context.context.bin_desc.start_addr =
> - (uint8_t *)ta_hdr +
> - le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
> - adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
> - adev->psp.ras_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->ras.fw_version);
> - adev->psp.ras_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->ras.size_bytes);
> - adev->psp.ras_context.context.bin_desc.start_addr =
> - (uint8_t *)adev->psp.xgmi_context.context.bin_desc.start_addr +
> - le32_to_cpu(ta_hdr->ras.offset_bytes);
> - }
> + err = psp_init_ta_microcode(psp, ucode_prefix);
> + if (err)
> + return err;
> break;
> case IP_VERSION(11, 0, 0):
> case IP_VERSION(11, 0, 5):
> @@ -179,39 +153,9 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
> err = psp_init_asd_microcode(psp, chip_name);
> if (err)
> return err;
> - snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ta.bin", chip_name);
> - err = request_firmware(&adev->psp.ta_fw, fw_name, adev->dev);
> - if (err) {
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> - dev_info(adev->dev,
> - "psp v11.0: Failed to load firmware \"%s\"\n", fw_name);
> - } else {
> - err = amdgpu_ucode_validate(adev->psp.ta_fw);
> - if (err)
> - goto out2;
> -
> - ta_hdr = (const struct ta_firmware_header_v1_0 *)adev->psp.ta_fw->data;
> - adev->psp.hdcp_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->hdcp.fw_version);
> - adev->psp.hdcp_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->hdcp.size_bytes);
> - adev->psp.hdcp_context.context.bin_desc.start_addr =
> - (uint8_t *)ta_hdr +
> - le32_to_cpu(
> - ta_hdr->header.ucode_array_offset_bytes);
> -
> - adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
> -
> - adev->psp.dtm_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->dtm.fw_version);
> - adev->psp.dtm_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->dtm.size_bytes);
> - adev->psp.dtm_context.context.bin_desc.start_addr =
> - (uint8_t *)adev->psp.hdcp_context.context
> - .bin_desc.start_addr +
> - le32_to_cpu(ta_hdr->dtm.offset_bytes);
> - }
> + err = psp_init_ta_microcode(psp, ucode_prefix);
> + if (err)
> + return err;
> break;
> case IP_VERSION(11, 0, 7):
> case IP_VERSION(11, 0, 11):
> @@ -237,11 +181,6 @@ static int psp_v11_0_init_microcode(struct psp_context *psp)
> }
>
> return 0;
> -
> -out2:
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> - return err;
> }
>
> static int psp_v11_0_wait_for_bootloader(struct psp_context *psp)
> diff --git a/drivers/gpu/drm/amd/amdgpu/psp_v12_0.c b/drivers/gpu/drm/amd/amdgpu/psp_v12_0.c
> index 8ed2281b6557..634fa2822d8a 100644
> --- a/drivers/gpu/drm/amd/amdgpu/psp_v12_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/psp_v12_0.c
> @@ -49,9 +49,8 @@ static int psp_v12_0_init_microcode(struct psp_context *psp)
> {
> struct amdgpu_device *adev = psp->adev;
> const char *chip_name;
> - char fw_name[30];
> + char ucode_prefix[30];
> int err = 0;
> - const struct ta_firmware_header_v1_0 *ta_hdr;
> DRM_DEBUG("\n");
>
> switch (adev->asic_type) {
> @@ -64,67 +63,12 @@ static int psp_v12_0_init_microcode(struct psp_context *psp)
> default:
> BUG();
> }
> + amdgpu_ucode_ip_version_decode(adev, MP0_HWIP, ucode_prefix, sizeof(ucode_prefix));
>
> err = psp_init_asd_microcode(psp, chip_name);
> if (err)
> return err;
> -
> - snprintf(fw_name, sizeof(fw_name), "amdgpu/%s_ta.bin", chip_name);
> - err = request_firmware(&adev->psp.ta_fw, fw_name, adev->dev);
> - if (err) {
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> - dev_info(adev->dev,
> - "psp v12.0: Failed to load firmware \"%s\"\n",
> - fw_name);
> - } else {
> - err = amdgpu_ucode_validate(adev->psp.ta_fw);
> - if (err)
> - goto out;
> -
> - ta_hdr = (const struct ta_firmware_header_v1_0 *)
> - adev->psp.ta_fw->data;
> - adev->psp.hdcp_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->hdcp.fw_version);
> - adev->psp.hdcp_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->hdcp.size_bytes);
> - adev->psp.hdcp_context.context.bin_desc.start_addr =
> - (uint8_t *)ta_hdr +
> - le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
> -
> - adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
> -
> - adev->psp.dtm_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->dtm.fw_version);
> - adev->psp.dtm_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->dtm.size_bytes);
> - adev->psp.dtm_context.context.bin_desc.start_addr =
> - (uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr +
> - le32_to_cpu(ta_hdr->dtm.offset_bytes);
> -
> - if (adev->apu_flags & AMD_APU_IS_RENOIR) {
> - adev->psp.securedisplay_context.context.bin_desc.fw_version =
> - le32_to_cpu(ta_hdr->securedisplay.fw_version);
> - adev->psp.securedisplay_context.context.bin_desc.size_bytes =
> - le32_to_cpu(ta_hdr->securedisplay.size_bytes);
> - adev->psp.securedisplay_context.context.bin_desc.start_addr =
> - (uint8_t *)adev->psp.hdcp_context.context.bin_desc.start_addr +
> - le32_to_cpu(ta_hdr->securedisplay.offset_bytes);
> - }
> - }
> -
> - return 0;
> -
> -out:
> - release_firmware(adev->psp.ta_fw);
> - adev->psp.ta_fw = NULL;
> - if (err) {
> - dev_err(adev->dev,
> - "psp v12.0: Failed to load firmware \"%s\"\n",
> - fw_name);
> - }
> -
> - return err;
> + return psp_init_ta_microcode(psp, ucode_prefix);
> }
>
> static int psp_v12_0_bootloader_load_sysdrv(struct psp_context *psp)
next prev parent reply other threads:[~2023-01-05 13:22 UTC|newest]
Thread overview: 164+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-05 3:42 [PATCH v6 00/45] Recover from failure to probe GPU Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 01/45] drm/amd: Delay removal of the firmware framebuffer Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 02/45] drm/amd: Add a legacy mapping to "amdgpu_ucode_ip_version_decode" Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 03/45] drm/amd: Convert SMUv11 microcode to use `amdgpu_ucode_ip_version_decode` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 04/45] drm/amd: Convert SMUv13 " Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 05/45] drm/amd: Add a new helper for loading/validating microcode Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 5:07 ` Lazar, Lijo
2023-01-05 5:07 ` Lazar, Lijo
2023-01-05 5:07 ` Lazar, Lijo
2023-01-05 5:23 ` Mario Limonciello
2023-01-05 5:23 ` Mario Limonciello
2023-01-05 5:23 ` Mario Limonciello
2023-01-05 5:29 ` Lazar, Lijo
2023-01-05 5:29 ` Lazar, Lijo
2023-01-05 5:29 ` Lazar, Lijo
2023-01-05 5:37 ` Mario Limonciello
2023-01-05 5:37 ` Mario Limonciello
2023-01-05 5:37 ` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 06/45] drm/amd: Use `amdgpu_ucode_request` helper for SDMA Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 07/45] drm/amd: Convert SDMA to use `amdgpu_ucode_ip_version_decode` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 08/45] drm/amd: Make SDMA firmware load failures less noisy Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 09/45] drm/amd: Use `amdgpu_ucode_*` helpers for VCN Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 10/45] drm/amd: Load VCN microcode during early_init Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 11/45] drm/amd: Load MES " Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 12/45] drm/amd: Use `amdgpu_ucode_*` helpers for MES Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 13/45] drm/amd: Remove superfluous assignment for `adev->mes.adev` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 14/45] drm/amd: Use `amdgpu_ucode_*` helpers for GFX9 Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 15/45] drm/amd: Load GFX9 microcode during early_init Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 16/45] drm/amd: Use `amdgpu_ucode_*` helpers for GFX10 Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 17/45] drm/amd: Load GFX10 microcode during early_init Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 18/45] drm/amd: Use `amdgpu_ucode_*` helpers for GFX11 Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 19/45] drm/amd: Load GFX11 microcode during early_init Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 20/45] drm/amd: Parse both v1 and v2 TA microcode headers using same function Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 13:22 ` Lazar, Lijo [this message]
2023-01-05 13:22 ` Lazar, Lijo
2023-01-05 13:22 ` Lazar, Lijo
2023-01-05 16:04 ` Limonciello, Mario
2023-01-05 16:04 ` Limonciello, Mario
2023-01-05 16:04 ` Limonciello, Mario
2023-01-05 16:11 ` Lazar, Lijo
2023-01-05 16:11 ` Lazar, Lijo
2023-01-05 3:42 ` [PATCH v6 21/45] drm/amd: Avoid BUG() for case of SRIOV missing IP version Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 22/45] drm/amd: Load PSP microcode during early_init Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 23/45] drm/amd: Use `amdgpu_ucode_*` helpers for PSP Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 24/45] drm/amd/display: Load DMUB microcode during early_init Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` [PATCH v6 25/45] drm/amd: Use `amdgpu_ucode_release` helper for DMUB Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 3:42 ` Mario Limonciello
2023-01-05 17:17 ` Harry Wentland
2023-01-05 17:17 ` Harry Wentland
2023-01-05 17:17 ` Harry Wentland
2023-01-05 3:43 ` [PATCH v6 26/45] drm/amd: Use `amdgpu_ucode_*` helpers for SMU Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 27/45] drm/amd: Load SMU microcode during early_init Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 28/45] drm/amd: Optimize SRIOV switch/case for PSP microcode load Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 29/45] drm/amd: Use `amdgpu_ucode_*` helpers for GFX6 Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 30/45] drm/amd: Use `amdgpu_ucode_*` helpers for GFX7 Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 31/45] drm/amd: Use `amdgpu_ucode_*` helpers for GFX8 Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 32/45] drm/amd: Use `amdgpu_ucode_*` helpers for GMC6 Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 33/45] drm/amd: Use `amdgpu_ucode_*` helpers for GMC7 Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 34/45] drm/amd: Use `amdgpu_ucode_*` helpers for GMC8 Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 35/45] drm/amd: Use `amdgpu_ucode_*` helpers for SDMA2.4 Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 36/45] drm/amd: Use `amdgpu_ucode_*` helpers for SDMA3.0 Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 37/45] drm/amd: Use `amdgpu_ucode_*` helpers for SDMA on CIK Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 38/45] drm/amd: Use `amdgpu_ucode_*` helpers for UVD Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 39/45] drm/amd: Use `amdgpu_ucode_*` helpers for VCE Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 40/45] drm/amd: Use `amdgpu_ucode_*` helpers for CGS Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 41/45] drm/amd: Use `amdgpu_ucode_*` helpers for GPU info bin Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 42/45] drm/amd: Use `amdgpu_ucode_*` helpers for DMCU Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 17:18 ` Harry Wentland
2023-01-05 17:18 ` Harry Wentland
2023-01-05 17:18 ` Harry Wentland
2023-01-05 3:43 ` [PATCH v6 43/45] drm/amd: Use `amdgpu_ucode_release` helper for powerplay Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 44/45] drm/amd: Use `amdgpu_ucode_release` helper for si Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` [PATCH v6 45/45] drm/amd: make amdgpu_ucode_validate static Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
2023-01-05 3:43 ` Mario Limonciello
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