From: Ian Campbell <ian.campbell@citrix.com>
To: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Cc: "Vijay Kilari" <vijay.kilari@gmail.com>,
"Manish Jaggi" <mjaggi@caviumnetworks.com>,
"Prasun Kapoor" <Prasun.kapoor@caviumnetworks.com>,
"Kumar, Vijaya" <Vijaya.Kumar@caviumnetworks.com>,
"xen-devel@lists.xen.org" <xen-devel@lists.xen.org>,
"Julien Grall" <julien.grall@citrix.com>,
"Stefano Stabellini" <stefano.stabellini@citrix.com>,
"Kulkarni, Ganapatrao" <Ganapatrao.Kulkarni@caviumnetworks.com>,
"Roger Pau Monné" <roger.pau@citrix.com>
Subject: Re: PCI Passthrough ARM Design : Draft1
Date: Wed, 17 Jun 2015 15:26:10 +0100 [thread overview]
Message-ID: <1434551170.13744.400.camel@citrix.com> (raw)
In-Reply-To: <alpine.DEB.2.02.1506171515000.21829@kaball.uk.xensource.com>
On Wed, 2015-06-17 at 15:18 +0100, Stefano Stabellini wrote:
> On Wed, 17 Jun 2015, Ian Campbell wrote:
> > On Wed, 2015-06-17 at 14:40 +0100, Stefano Stabellini wrote:
> > > On Wed, 17 Jun 2015, Ian Campbell wrote:
> > > > On Wed, 2015-06-17 at 13:53 +0100, Stefano Stabellini wrote:
> > > > > On Wed, 17 Jun 2015, Ian Campbell wrote:
> > > > > > On Tue, 2015-06-16 at 18:16 +0100, Stefano Stabellini wrote:
> > > > > > > I wrote this before reading the rest of the thread with your alternative
> > > > > > > suggestion. Both approaches can work, maybe it is true that having the
> > > > > > > guest requesting mappings is better. And we should certainly do the same
> > > > > > > thing for PVH and ARM guests.
> > > > > > >
> > > > > > > If we have the guest requesting the mapping, obviously the hypercall
> > > > > > > implementation should check whether mapping the memory region has been
> > > > > > > previously allowed by the toolstack, that should still call
> > > > > > > xc_domain_iomem_permission.
> > > > > >
> > > > > > Whoever makes the initial decision/setup we still need to decide what to
> > > > > > do about reads and writes to the device's BAR registers. Who deals with
> > > > > > these and how, and if writes are allowed and if so how is this then
> > > > > > reflected in the guest p2m.
> > > > > >
> > > > > > I would very much prefer ARM and x86 PVH to use the same approach to
> > > > > > this.
> > > > > >
> > > > > > For x86 HVM I believe QEMU takes care of this, by emulating the
> > > > > > reads/writes to CFG space and making hypercalls (domctls?) to update the
> > > > > > p2m. There is no QEMU to do this in the ARM or x86 PVH cases.
> > > > > >
> > > > > > For x86 PV I believe pciback deals with the register reads/writes but it
> > > > > > doesn't need to do anything wrt the p2m because that is a guest internal
> > > > > > construct. This obviously doesn't apply to ARM or x86 PVH either since
> > > > > > the p2m is managed by Xen in both those cases.
> > > > > >
> > > > > > So it seems that neither of the existing solutions are a good match for
> > > > > > either ARM or x86 PVH.
> > > > > >
> > > > > > _If_ it were permissible to implement all BAR registers as r/o then this
> > > > > > might simplify things, however I suspect this is not something we can
> > > > > > get away with in the general case (i.e. a driver for a given PCI device
> > > > > > _knows_ that BAR<N> is writeable...).
> > > > > >
> > > > > > So I think we do need to allow guest writes to the BAR registers. I
> > > > > > think it would be a bit strange (or even open potentially subtle
> > > > > > (security?) issues) to require the guest to write the BAR register and
> > > > > > to update the p2m to match as well.
> > > > >
> > > > > Why would it be a security risk?
> > > >
> > > > No idea, it seemed like a vague possibility. I did say "(security?)" not
> > > > "SECURITY" ;-)
> > > >
> > > > > I don't think it is important that the
> > > > > interface between pcifront and pciback refrects the hardware interface.
> > > > > But it is important that the interface is documented and complies to the
> > > > > expected behaviour.
> > > > >
> > > > > I think that if we go with XENMEM_add_to_physmap_range, it would be OK
> > > > > for pcifront to both write to the vBAR (actually writing to the ring to
> > > > > pciback), then call XENMEM_add_to_physmap_range.
> > > > >
> > > > > On the other hand, if we go with XEN_DOMCTL_memory_mapping, I would make
> > > > > the virtual BAR read-only, that is less preferable but still acceptable,
> > > > > as long as we document it.
> > > >
> > > > Given that this appears to be how pv pci works today I think this turns
> > > > out to be preferable and saves us having to argue the toss about who
> > > > should do the p2m updates on a BAR update.
> > > >
> > > > Which would point towards the toolstack doing the layout and telling
> > > > pciback somehow what the bars for each device are and that's it.
> > > >
> > > > (making most of the rest of your reply moot, if you think its really
> > > > important to let guests move BARs about I can go through it again)
> > >
> > > I think is unimportant, in fact having the guest setup the mappings was
> > > my original suggestion.
> >
> > I can't reconcile the two halves of this statement, are you saying you
> > are still in favour of the guest dealing with the mappings or not?
>
> Sorry!
>
> I do not think is important to let guests move BARs. In fact having the
> toolstack doing the layout was my original suggestion and I still think
> can work correctly.
Ah, so s/guest/toolstack/ on the statement above makes it consistent,
phew!
> I don't have a strong feeling on whether it should be the toolstack or
> the guest to do the mapping. It can work either way. I would certainly
> avoid having Dom0 do the mapping.
I think it should be the toolstack. Allow the guest to do it means
implementing writeable BARs which is a much bigger yakk to shave and it
doesn't seem to be necessary.
Ian
next prev parent reply other threads:[~2015-06-17 14:26 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-06-08 7:52 PCI Passthrough ARM Design : Draft1 Manish Jaggi
2015-06-09 14:42 ` Jaggi, Manish
2015-06-09 15:58 ` Ian Campbell
2015-06-10 12:45 ` Ian Campbell
2015-06-10 19:21 ` Julien Grall
2015-06-11 8:56 ` Ian Campbell
2015-06-11 11:25 ` Julien Grall
2015-06-11 12:02 ` Ian Campbell
2015-06-16 16:13 ` Stefano Stabellini
2015-06-16 16:21 ` Roger Pau Monné
2015-06-16 17:11 ` Manish Jaggi
2015-06-16 17:28 ` Stefano Stabellini
2015-06-16 17:46 ` Manish Jaggi
2015-06-17 12:58 ` Stefano Stabellini
2015-06-17 13:43 ` Ian Campbell
2015-06-17 14:14 ` Manish Jaggi
2015-06-17 14:29 ` Ian Campbell
2015-06-17 14:35 ` Stefano Stabellini
2015-06-22 18:33 ` Konrad Rzeszutek Wilk
2015-06-23 8:44 ` Ian Campbell
2015-06-23 14:11 ` Konrad Rzeszutek Wilk
2015-06-25 7:44 ` Manish Jaggi
2015-06-25 9:11 ` Ian Campbell
2015-06-25 11:59 ` Manish Jaggi
2015-06-25 12:21 ` Ian Campbell
2015-06-25 17:26 ` Konrad Rzeszutek Wilk
2015-06-26 2:07 ` Manish Jaggi
2015-06-26 7:32 ` Ian Campbell
2015-06-26 8:50 ` Manish Jaggi
2015-06-26 9:09 ` Ian Campbell
2015-06-26 11:57 ` Manish Jaggi
2015-06-26 12:41 ` Ian Campbell
2015-06-26 13:28 ` Konrad Rzeszutek Wilk
2015-06-26 13:47 ` Ian Campbell
2015-06-26 13:52 ` Konrad Rzeszutek Wilk
2015-06-16 17:16 ` Stefano Stabellini
2015-06-17 10:08 ` Ian Campbell
2015-06-17 12:11 ` Julien Grall
2015-06-17 12:21 ` Ian Campbell
2015-06-17 12:53 ` Stefano Stabellini
2015-06-17 12:57 ` Julien Grall
2015-06-17 13:32 ` Ian Campbell
2015-06-17 13:40 ` Stefano Stabellini
2015-06-17 13:56 ` Ian Campbell
2015-06-17 14:18 ` Stefano Stabellini
2015-06-17 14:26 ` Ian Campbell [this message]
2015-06-22 18:31 ` Konrad Rzeszutek Wilk
2015-06-11 9:05 ` Roger Pau Monné
2015-06-11 12:04 ` Ian Campbell
2015-06-16 16:17 ` Stefano Stabellini
2015-06-11 21:38 ` Manish Jaggi
2015-06-12 8:32 ` Ian Campbell
2015-06-12 11:41 ` Julien Grall
2015-06-12 11:52 ` Ian Campbell
2015-06-16 5:42 ` Manish Jaggi
2015-06-16 7:02 ` Roger Pau Monné
2015-06-16 10:42 ` Julien Grall
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