Re: [PATCH 2/2] drm/i915/skl: Adding DDI_E power well domain

["Vivi, Rodrigo" <rodrigo.vivi@intel.com>]

On Mon, 2015-08-17 at 01:50 +0000, Zhang, Xiong Y wrote:
> Sorry, but I don't get how this enables power_well_2 as well. I just 
> see it enabling ddi A/E as the other. 
>  
> Maybe Paulo or Imre are the best one to review this.
>  
> On Thu, Aug 13, 2015 at 2:54 AM Xiong Zhang <xiong.y.zhang@intel.com> 
> wrote:
> From B spec, DDI_E port belong to PowerWell 2, but
> DDI_E share the powerwell_req/staus register bit with
> DDI_A which belong to DDI_A_E_POWER_WELL.
> 
> In order to communicate with the connector on DDI-E, both
> DDI_A_E_POWER_WELL and POWER_WELL_2 must be enabled.
> 
> Currently intel_dp_power_get(DDI_E) only enable
> DDI_A_E_POWER_WELL, this patch will not only enable
> DDI_a_E_POWER_WELL but also enable POWER_WELL_2.
> 
> This patch also fix the DDI-E hotplug function.
> 
> Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_debugfs.c     | 2 ++
>  drivers/gpu/drm/i915/i915_drv.h         | 1 +
>  drivers/gpu/drm/i915/intel_display.c    | 3 ++-
>  drivers/gpu/drm/i915/intel_runtime_pm.c | 2 ++
>  4 files changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index 86734be..5523b6e 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2564,6 +2564,8 @@ static const char *power_domain_str(enum 
> intel_display_power_domain domain)
>                 return "PORT_DDI_D_2_LANES";
>         case POWER_DOMAIN_PORT_DDI_D_4_LANES:
>                 return "PORT_DDI_D_4_LANES";
> +       case POWER_DOMAIN_PORT_DDI_E_2_LANES:
> +               return "PORT_DDI_E_2_LANES";
>         case POWER_DOMAIN_PORT_DSI:
>                 return "PORT_DSI";
>         case POWER_DOMAIN_PORT_CRT:
> diff --git a/drivers/gpu/drm/i915/i915_drv.h 
> b/drivers/gpu/drm/i915/i915_drv.h
> index b157865..ee71f90 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -182,6 +182,7 @@ enum intel_display_power_domain {
>         POWER_DOMAIN_PORT_DDI_C_4_LANES,
>         POWER_DOMAIN_PORT_DDI_D_2_LANES,
>         POWER_DOMAIN_PORT_DDI_D_4_LANES,
> +       POWER_DOMAIN_PORT_DDI_E_2_LANES,
>         POWER_DOMAIN_PORT_DSI,
>         POWER_DOMAIN_PORT_CRT,
>         POWER_DOMAIN_PORT_OTHER,
> diff --git a/drivers/gpu/drm/i915/intel_display.c 
> b/drivers/gpu/drm/i915/intel_display.c
> index 801187c..ccd3f0b 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -5150,7 +5150,6 @@ static enum intel_display_power_domain 
> port_to_power_domain(enum port port)
>  {
>         switch (port) {
>         case PORT_A:
> -       case PORT_E:
>                 return POWER_DOMAIN_PORT_DDI_A_4_LANES;
>         case PORT_B:
>                 return POWER_DOMAIN_PORT_DDI_B_4_LANES;
> @@ -5158,6 +5157,8 @@ static enum intel_display_power_domain 
> port_to_power_domain(enum port port)
>                 return POWER_DOMAIN_PORT_DDI_C_4_LANES;
>         case PORT_D:
>                 return POWER_DOMAIN_PORT_DDI_D_4_LANES;
> +       case PORT_E:
> +               return POWER_DOMAIN_PORT_DDI_E_2_LANES;
>         default:
>                 WARN_ON_ONCE(1);
>                 return POWER_DOMAIN_PORT_OTHER;
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c 
> b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 821644d..af7fdb3 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -297,6 +297,7 @@ static void hsw_set_power_well(struct 
> drm_i915_private *dev_priv,
>         BIT(POWER_DOMAIN_PORT_DDI_C_4_LANES) |          \
>         BIT(POWER_DOMAIN_PORT_DDI_D_2_LANES) |          \
>         BIT(POWER_DOMAIN_PORT_DDI_D_4_LANES) |          \
> +       BIT(POWER_DOMAIN_PORT_DDI_E_2_LANES)
> [Zhang, Xiong Y] this line put DDI_E_2_LANES into 
> SKL_DISPLAY_POWERWELL_2_POWER_DOMAINS, but the git format-patch 
> doesn’t show
> #define SKL_DISPLAY_POWERWELL_2_POWER_DOMAINS. So it isn’t easy to 
> review this.

ops, sorry, I had missed that indeed.

looks the right thing to do so,
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> |          \
>         BIT(POWER_DOMAIN_AUX_B) |                       \
>         BIT(POWER_DOMAIN_AUX_C) |                       \
>         BIT(POWER_DOMAIN_AUX_D) |                       \
> @@ -316,6 +317,7 @@ static void hsw_set_power_well(struct 
> drm_i915_private *dev_priv,
>  #define SKL_DISPLAY_DDI_A_E_POWER_DOMAINS (            \
>         BIT(POWER_DOMAIN_PORT_DDI_A_2_LANES) |          \
>         BIT(POWER_DOMAIN_PORT_DDI_A_4_LANES) |          \
> +       BIT(POWER_DOMAIN_PORT_DDI_E_2_LANES) |          \
>         BIT(POWER_DOMAIN_INIT))
>  #define SKL_DISPLAY_DDI_B_POWER_DOMAINS (              \
>         BIT(POWER_DOMAIN_PORT_DDI_B_2_LANES) |          \
> --
> 2.1.4
> 
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