From: James Bottomley <James.Bottomley@HansenPartnership.com>
To: John David Anglin <dave.anglin@bell.net>
Cc: linux-parisc List <linux-parisc@vger.kernel.org>,
Helge Deller <deller@gmx.de>
Subject: Re: [PATCH v2][RFC] parisc: Change L1_CACHE_BYTES to 16
Date: Sun, 27 Sep 2015 09:17:36 -0700 [thread overview]
Message-ID: <1443370656.2222.3.camel@HansenPartnership.com> (raw)
In-Reply-To: <32A3BF6F-B243-4AD4-9AE9-A5F9DAE0270A@bell.net>
On Sun, 2015-09-27 at 12:07 -0400, John David Anglin wrote:
> On 2015-09-26, at 11:38 AM, John David Anglin wrote:
>
> > The attached change reduces L1_CACHE_BYTES from 32 on PA1.1 and 64 on PA2.0 to 16.
> >
> > This is based on examination of the L1 cache design for the PA-8700 processor where it can
> > be seen the processor loads two double words per cycle. This line length is consistent with the
> > original alignment requirement for the ldcw instruction.
> >
> > Thus, we need to distinguish between the L1 and L2 (SMP) cache line lengths.
> >
> > The attached change bumps SMP_CACHE_BYTES to 128 bytes as this is the line length used
> > on PA-8800 and PA-8900 processors. This increases the overall kernel size somewhat but seems
> > logically correct.
>
>
> Slight tweak to previous. This version only bumps SMP_CACHE_BYTES when CONFIG_SMP
> is defined.
What makes you think we need SMP_CACHE_BYTES to be different from
L1_CACHE_BYTES? No other architecture does this. The theory that gives
us two defines was that some SMP systems would arbitrate for memory at
geater than cache line offsets but, in practise, none does because
that's the level at which the cross CPU memory ownership model works
anyway.
James
next prev parent reply other threads:[~2015-09-27 16:17 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-26 15:38 [PATCH][RFC] parisc: Change L1_CACHE_BYTES to 16 John David Anglin
2015-09-27 16:07 ` [PATCH v2][RFC] " John David Anglin
2015-09-27 16:17 ` James Bottomley [this message]
2015-09-27 16:46 ` John David Anglin
2015-10-15 0:32 ` [PATCH v3] " John David Anglin
2015-10-22 11:38 ` Aw: " Helge Deller
2015-10-22 11:53 ` Helge Deller
2015-10-22 14:35 ` James Bottomley
2015-10-22 14:53 ` John David Anglin
2015-10-22 20:00 ` CONFIG_XPS depends on L1_CACHE_BYTES being greater than sizeof(struct xps_map) Helge Deller
2015-10-22 20:00 ` Helge Deller
2015-10-22 21:37 ` Tom Herbert
2015-10-22 21:37 ` Tom Herbert
2015-10-23 19:21 ` Helge Deller
2015-10-23 19:21 ` Helge Deller
2015-10-23 22:16 ` Tom Herbert
2015-10-23 22:16 ` Tom Herbert
2015-10-22 21:50 ` Eric Dumazet
2015-10-22 21:50 ` Eric Dumazet
2015-10-23 19:25 ` Helge Deller
2015-10-23 19:25 ` Helge Deller
2015-10-23 20:03 ` Eric Dumazet
2015-10-23 21:08 ` Helge Deller
2015-10-23 21:09 ` Helge Deller
2015-10-23 21:38 ` Eric Dumazet
2015-10-23 22:00 ` Alexander Duyck
2015-10-23 22:17 ` Helge Deller
2015-10-23 22:40 ` Alexander Duyck
2015-10-24 14:43 ` Helge Deller
2015-10-25 5:41 ` Alexander Duyck
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