From: Ian Campbell <ian.campbell@citrix.com>
To: Julien Grall <julien.grall@citrix.com>, xen-devel@lists.xenproject.org
Cc: Vijaya.Kumar@caviumnetworks.com, stefano.stabellini@citrix.com,
manish.jaggi@caviumnetworks.com, vijay.kilari@gmail.com
Subject: Re: [PATCH v1 5/8] xen/arm: vgic: Optimize the way to store GICD_IPRIORITYR in the rank
Date: Tue, 29 Sep 2015 11:56:39 +0100 [thread overview]
Message-ID: <1443524199.16718.43.camel@citrix.com> (raw)
In-Reply-To: <56097475.7070600@citrix.com>
On Mon, 2015-09-28 at 18:10 +0100, Julien Grall wrote:
> Hi Ian,
>
> On 28/09/15 11:50, Ian Campbell wrote:
> > > diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
> > > index c013200..2787507 100644
> > > --- a/xen/arch/arm/vgic-v3.c
> > > +++ b/xen/arch/arm/vgic-v3.c
> > > @@ -430,18 +430,26 @@ static int
> > > __vgic_v3_distr_common_mmio_write(const char *name, struct vcpu *v,
> > > return 0;
> > >
> > > case GICD_IPRIORITYR ... GICD_IPRIORITYRN:
> > > + {
> > > + uint32_t ipriorityr;
> > > +
> > > if ( dabt.size != DABT_BYTE && dabt.size != DABT_WORD ) goto
> > > bad_width;
> > > rank = vgic_rank_offset(v, 8, reg - GICD_IPRIORITYR,
> > > DABT_WORD);
> > > - if ( rank == NULL ) goto write_ignore;
> > > + if ( rank == NULL) goto write_ignore;
> > > +
> > > vgic_lock_rank(v, rank, flags);
> > > if ( dabt.size == DABT_WORD )
> > > - rank->ipriority[REG_RANK_INDEX(8, reg - GICD_IPRIORITYR,
> > > - DABT_WORD)] = r;
> > > + ipriorityr = r;
> > > else
> > > - vgic_byte_write(&rank->ipriority[REG_RANK_INDEX(8,
> > > - reg - GICD_IPRIORITYR, DABT_WORD)], r, reg);
> > > + {
> > > + ipriorityr = vgic_generate_ipriorityr(rank, reg -
> > > GICD_IPRIORITYR);
> > > + vgic_byte_write(&ipriorityr, r, reg);
> > > + }
> > > + vgic_store_ipriorityr(rank, reg - GICD_IPRIORITYR,
> > > ipriorityr);
> >
> > Given the underlying change to the datastructure I think you should
> > instead
> > supply a helper to set the priority of a given IRQ and use that for the
> > DABT_BYTE case.
> >
> > For the DABT_WORD case your existing store helper would become 4 calls
> > to
> > the byte helper.
> >
> > That would be better than generating the full 32-bit value, masking in
> > the
> > updated byte and then deconstructing the word again.
>
> We discussed it IRL, so I will summarize here for everyone IRL.
>
> In a follow-up patch (#7), the code to emulate IPRIORITYR will call
> vgic_reg32_write which is a generic helper to handle any access size.
> The goal is to drop any access size handling in the code. After patch
> #7, the code will look like:
>
> if ( dabt.size != DABT_BYTE && dabt.size != DABT_WORD ) goto bad_width;
> rank = vgic_rank_offset(v, 8, reg - GICD_IPRIORITYR, DABT_WORD);
> if ( rank == NULL) goto write_ignore;
>
> vgic_lock_rank(v, rank, flags);
> ipriorityr = vgic_generate_ipriorityr(rank, reg - GICD_IPRIORITYR);
> vgic_reg32_write(&ipriorityr, r, info);
> vgic_store_ipriorityr(rank, reg - GICD_IPRIORITYR, ipriorityr);
> vgic_unlock_rank(v, rank, flags);
>
> Introducing code path depending on access size means possibly more buggy
> code. Note that we already hit a lot of wrong access size in the
> emulation. So I would prefer to keep the code as generic as possible
> even if it means a small impact on emulating byte access.
Agreed, given this context that makes sense.
[...]
> > union {
> > uint32_t ipriorityr[8];
> > uint8_t priority[32];
> > }
> >
> > Get us the best of both worlds, or are we stymied by endianess?
>
> The support of big-endian in Xen should be generic. I.e we deal with the
> endianess before calling the handlers, so the handler will always have
> the value in the hypervisor endianess.
>
> Note that I've got a support for big-endian but never had the chance to
> upstream it.
>
> I think, as long as Xen stays in little endian, we would have no issue
> with your solution.
I wasn't concerned about Xen being big-endian, but rather about whether
ipriorityr[0] is the same byte as priority[0]&0xff or if it was actually
priority[0]>>24 in little endian mode. I wasn't feeling very well on Monday
so I didn't try to think about it too hard.
Ian.
next prev parent reply other threads:[~2015-09-29 10:56 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-25 14:51 [PATCH v1 0/8] xen/arm: vgic: Support 32-bit access for 64-bit register Julien Grall
2015-09-25 14:51 ` [PATCH v1 1/8] xen/arm: io: remove mmio_check_t typedef Julien Grall
2015-09-25 16:33 ` Ian Campbell
2015-09-25 14:51 ` [PATCH v1 2/8] xen/arm: io: Extend write/read handler to pass the register in parameter Julien Grall
2015-09-25 16:36 ` Ian Campbell
2015-09-28 16:35 ` Julien Grall
2015-09-29 10:51 ` Ian Campbell
2015-09-29 11:00 ` Julien Grall
2015-09-29 11:09 ` Ian Campbell
2015-09-25 14:51 ` [PATCH v1 3/8] xen/arm: Support sign-extension for every read access Julien Grall
2015-09-25 16:44 ` Ian Campbell
2015-09-28 16:42 ` Julien Grall
2015-09-29 11:01 ` Ian Campbell
2015-09-29 11:07 ` Julien Grall
2015-09-28 18:22 ` Julien Grall
2015-09-29 11:03 ` Ian Campbell
2015-09-29 11:13 ` Julien Grall
2015-09-29 13:13 ` Ian Campbell
2015-09-29 13:16 ` Julien Grall
2015-09-25 14:51 ` [PATCH v1 4/8] xen/arm: vgic: ctlr stores a 32-bit hardware register so use uint32_t Julien Grall
2015-09-25 16:45 ` Ian Campbell
2015-09-25 14:51 ` [PATCH v1 5/8] xen/arm: vgic: Optimize the way to store GICD_IPRIORITYR in the rank Julien Grall
2015-09-28 10:50 ` Ian Campbell
2015-09-28 17:10 ` Julien Grall
2015-09-29 10:56 ` Ian Campbell [this message]
2015-09-28 10:52 ` Ian Campbell
2015-09-28 16:43 ` Julien Grall
2015-09-25 14:51 ` [PATCH v1 6/8] xen/arm: vgic: Optimize the way to store the target vCPU " Julien Grall
2015-09-29 13:07 ` Ian Campbell
2015-09-29 13:36 ` Julien Grall
2015-09-29 14:23 ` Ian Campbell
2015-09-30 18:11 ` Julien Grall
2015-10-01 8:30 ` Ian Campbell
2015-09-25 14:51 ` [PATCH v1 7/8] xen/arm: vgic: Introduce helpers to read/write/clear/set vGIC register Julien Grall
2015-09-29 13:23 ` Ian Campbell
2015-09-29 13:48 ` Julien Grall
2015-09-29 14:24 ` Ian Campbell
2015-10-02 9:36 ` Julien Grall
2015-09-25 14:51 ` [PATCH v1 8/8] xen/arm: vgic-v3: Support 32-bit access for 64-bit registers Julien Grall
2015-09-29 13:27 ` Ian Campbell
-- strict thread matches above, loose matches on Subject: below --
2015-09-25 14:50 [PATCH v1 0/8] xen/arm: vgic: Support 32-bit access for 64-bit register Julien Grall
2015-09-25 14:51 ` [PATCH v1 5/8] xen/arm: vgic: Optimize the way to store GICD_IPRIORITYR in the rank Julien Grall
2015-09-25 14:51 ` Julien Grall
2015-09-25 14:51 ` Julien Grall
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