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From: Ian Campbell <ian.campbell@citrix.com>
To: Julien Grall <julien.grall@citrix.com>, xen-devel@lists.xenproject.org
Cc: Vijaya.Kumar@caviumnetworks.com, stefano.stabellini@citrix.com,
	manish.jaggi@caviumnetworks.com, vijay.kilari@gmail.com
Subject: Re: [PATCH v1 3/8] xen/arm: Support sign-extension for every read access
Date: Tue, 29 Sep 2015 12:03:49 +0100	[thread overview]
Message-ID: <1443524629.16718.49.camel@citrix.com> (raw)
In-Reply-To: <56098549.2080503@citrix.com>

On Mon, 2015-09-28 at 19:22 +0100, Julien Grall wrote:
> On 25/09/15 17:44, Ian Campbell wrote:
> > On Fri, 2015-09-25 at 15:51 +0100, Julien Grall wrote:
> > I think you meant s/bit sign/sign bit/ but more correct would be "Sign
> > extend if required".
> > 
> > > +     * Note that we expect the read handler to have zeroed the bit
> > > +     * unused in the register.
> > 
> > "... to have zeroed the unused bits in the register".
> > 
> > But I think "unused" is a bit misleading, you mean the ones outside the
> > requested access size, those bits are still "used" IYSWIM. I can't
> > think of
> > a terse term for "outside the requested access size I'm afraid.
> 
> I will switch to "Note that we expect the read handler to have zeroed
> the bits outside the requested access size."
> 
> > 
> > Did you confirm that all existing handlers meet this requirement?
> 
> Yes, we always do *r in the existing handlers.
> 
> > Perhaps an ASSERT would be handy?
> 
> What about:
> 
> ASSERT((*r & ((~0UL) >> (BITS_PER_LONG - size))) == 0)

Is that not backwards, e.g for size = 8, then 

~0UL >> (32-8) == 0xffffffff >> 24 == 0xff, so you end up checking that the
lowest byte is zero, but that's the one you expected to change.

Or is it, couldn't we be updating a byte in the middle of the word?

Probably figuring out the correct assertion is more hassle than it is
worth..


> 
> Regards,
> 

  reply	other threads:[~2015-09-29 11:03 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-25 14:51 [PATCH v1 0/8] xen/arm: vgic: Support 32-bit access for 64-bit register Julien Grall
2015-09-25 14:51 ` [PATCH v1 1/8] xen/arm: io: remove mmio_check_t typedef Julien Grall
2015-09-25 16:33   ` Ian Campbell
2015-09-25 14:51 ` [PATCH v1 2/8] xen/arm: io: Extend write/read handler to pass the register in parameter Julien Grall
2015-09-25 16:36   ` Ian Campbell
2015-09-28 16:35     ` Julien Grall
2015-09-29 10:51       ` Ian Campbell
2015-09-29 11:00         ` Julien Grall
2015-09-29 11:09           ` Ian Campbell
2015-09-25 14:51 ` [PATCH v1 3/8] xen/arm: Support sign-extension for every read access Julien Grall
2015-09-25 16:44   ` Ian Campbell
2015-09-28 16:42     ` Julien Grall
2015-09-29 11:01       ` Ian Campbell
2015-09-29 11:07         ` Julien Grall
2015-09-28 18:22     ` Julien Grall
2015-09-29 11:03       ` Ian Campbell [this message]
2015-09-29 11:13         ` Julien Grall
2015-09-29 13:13           ` Ian Campbell
2015-09-29 13:16             ` Julien Grall
2015-09-25 14:51 ` [PATCH v1 4/8] xen/arm: vgic: ctlr stores a 32-bit hardware register so use uint32_t Julien Grall
2015-09-25 16:45   ` Ian Campbell
2015-09-25 14:51 ` [PATCH v1 5/8] xen/arm: vgic: Optimize the way to store GICD_IPRIORITYR in the rank Julien Grall
2015-09-28 10:50   ` Ian Campbell
2015-09-28 17:10     ` Julien Grall
2015-09-29 10:56       ` Ian Campbell
2015-09-28 10:52   ` Ian Campbell
2015-09-28 16:43     ` Julien Grall
2015-09-25 14:51 ` [PATCH v1 6/8] xen/arm: vgic: Optimize the way to store the target vCPU " Julien Grall
2015-09-29 13:07   ` Ian Campbell
2015-09-29 13:36     ` Julien Grall
2015-09-29 14:23       ` Ian Campbell
2015-09-30 18:11         ` Julien Grall
2015-10-01  8:30           ` Ian Campbell
2015-09-25 14:51 ` [PATCH v1 7/8] xen/arm: vgic: Introduce helpers to read/write/clear/set vGIC register Julien Grall
2015-09-29 13:23   ` Ian Campbell
2015-09-29 13:48     ` Julien Grall
2015-09-29 14:24       ` Ian Campbell
2015-10-02  9:36         ` Julien Grall
2015-09-25 14:51 ` [PATCH v1 8/8] xen/arm: vgic-v3: Support 32-bit access for 64-bit registers Julien Grall
2015-09-29 13:27   ` Ian Campbell
  -- strict thread matches above, loose matches on Subject: below --
2015-09-25 14:50 [PATCH v1 0/8] xen/arm: vgic: Support 32-bit access for 64-bit register Julien Grall
2015-09-25 14:51 ` [PATCH v1 3/8] xen/arm: Support sign-extension for every read access Julien Grall
2015-09-25 14:51   ` Julien Grall
2015-09-25 14:51   ` Julien Grall

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