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From: Scott Wood <scottwood@freescale.com>
To: Li Yang <leoli@freescale.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org,
	Shaohui Xie <Shaohui.Xie@freescale.com>,
	Arnd Bergmann <arnd@arndb.de>,
	Huan Wang <alison.wang@freescale.com>,
	Sharma Bhupesh <bhupesh.sharma@freescale.com>,
	Catalin Marinas <Catalin.Marinas@arm.com>,
	Olof Johansson <olof@lixom.net>,
	Singh Jaiprakash <jaiprakash.singh@freescale.com>,
	Stuart Yoder <stuart.yoder@freescale.com>,
	Will Deacon <will.deacon@arm.com>,
	"Lian M.H." <Minghuan.Lian@freescale.com>,
	Liu Gang <Gang.Liu@freescale.com>,
	Rob Herring <robherring2@gmail.com>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Badola Nikhil-B46172 <nikhil.badola@freescale.com>,
	Bhupesh SHARMA <bhupesh.linux@gmail.com>,
	"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"Lu Y.B." <yangbo.lu@freescale.com>
Subject: Re: [PATCH v2 07/10] dts/ls2085a: Update DTSI to add support of various peripherals
Date: Thu, 1 Oct 2015 16:58:57 -0500	[thread overview]
Message-ID: <1443736737.5336.158.camel@freescale.com> (raw)
In-Reply-To: <CADRPPNRz-yM_48HvHYv3r31u_b_tHkAjg5H5r+V2mE2=oJTGDA@mail.gmail.com>

On Thu, 2015-10-01 at 16:42 -0500, Li Yang wrote:
> On Thu, Oct 1, 2015 at 3:05 PM, Stuart Yoder <stuart.yoder@freescale.com> 
> wrote:
> > Hi Rob,
> > 
> > Had a question about your comments on the patch below.
> > 
> > You singled out 3 nodes (gic,uart,clockgen) and said "This should be 
> > under a bus node."
> > 
> > What is special about those 3 nodes types?  There are a bunch of other 
> > memory
> > mapped SoC devices as well in the DTS.
> > 
> > I skimmed the dts files under arch/arm64 and it looks like most have a 
> > simple-bus
> > SoC node like this where SoC devices are under:
> > 
> >         soc {
> >                 #address-cells = <2>;
> >                 #size-cells = <2>;
> >                 compatible = "simple-bus";
> >                 ranges;
> > 
> > Is that what you are looking for-- for all SoC devices?
> 
> I think the key is to have the soc node and have all the on-chip
> devices defined underneath it.
> 
> I read the following from the booting-without-of.txt document:
> 
>   f) the /soc<SOCname> node
> 
>   This node is used to represent a system-on-a-chip (SoC) and must be
>   present if the processor is a SoC. The top-level soc node contains
>   information that is global to all devices on the SoC. The node name
>   should contain a unit address for the SoC, which is the base address
>   of the memory-mapped register set for the SoC. The name of an SoC
>   node should start with "soc", and the remainder of the name should
>   represent the part number for the soc.  For example, the MPC8540's
>   soc node would be called "soc8540".
> 
> A lot of device trees didn't follow the soc<SOCname> naming scheme and
> just used "soc" as the node name.  I am not sure if we want to enforce
> the naming in the future or update the document to make it more relax.

Update the document.  Having the SoC name in the node name was a pain, which 
is why we don't do it anymore.  Ideally, this text should be moved into a 
binding for Freescale PPC/LS SoCs.  It really doesn't have the broad 
applicability that this historical document suggests, and even on our SoCs it 
doesn't represent the entire SoC.  It represents CCSR/IMMR.

-Scott


_______________________________________________
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WARNING: multiple messages have this Message-ID (diff)
From: scottwood@freescale.com (Scott Wood)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 07/10] dts/ls2085a: Update DTSI to add support of various peripherals
Date: Thu, 1 Oct 2015 16:58:57 -0500	[thread overview]
Message-ID: <1443736737.5336.158.camel@freescale.com> (raw)
In-Reply-To: <CADRPPNRz-yM_48HvHYv3r31u_b_tHkAjg5H5r+V2mE2=oJTGDA@mail.gmail.com>

On Thu, 2015-10-01 at 16:42 -0500, Li Yang wrote:
> On Thu, Oct 1, 2015 at 3:05 PM, Stuart Yoder <stuart.yoder@freescale.com> 
> wrote:
> > Hi Rob,
> > 
> > Had a question about your comments on the patch below.
> > 
> > You singled out 3 nodes (gic,uart,clockgen) and said "This should be 
> > under a bus node."
> > 
> > What is special about those 3 nodes types?  There are a bunch of other 
> > memory
> > mapped SoC devices as well in the DTS.
> > 
> > I skimmed the dts files under arch/arm64 and it looks like most have a 
> > simple-bus
> > SoC node like this where SoC devices are under:
> > 
> >         soc {
> >                 #address-cells = <2>;
> >                 #size-cells = <2>;
> >                 compatible = "simple-bus";
> >                 ranges;
> > 
> > Is that what you are looking for-- for all SoC devices?
> 
> I think the key is to have the soc node and have all the on-chip
> devices defined underneath it.
> 
> I read the following from the booting-without-of.txt document:
> 
>   f) the /soc<SOCname> node
> 
>   This node is used to represent a system-on-a-chip (SoC) and must be
>   present if the processor is a SoC. The top-level soc node contains
>   information that is global to all devices on the SoC. The node name
>   should contain a unit address for the SoC, which is the base address
>   of the memory-mapped register set for the SoC. The name of an SoC
>   node should start with "soc", and the remainder of the name should
>   represent the part number for the soc.  For example, the MPC8540's
>   soc node would be called "soc8540".
> 
> A lot of device trees didn't follow the soc<SOCname> naming scheme and
> just used "soc" as the node name.  I am not sure if we want to enforce
> the naming in the future or update the document to make it more relax.

Update the document.  Having the SoC name in the node name was a pain, which 
is why we don't do it anymore.  Ideally, this text should be moved into a 
binding for Freescale PPC/LS SoCs.  It really doesn't have the broad 
applicability that this historical document suggests, and even on our SoCs it 
doesn't represent the entire SoC.  It represents CCSR/IMMR.

-Scott

WARNING: multiple messages have this Message-ID (diff)
From: Scott Wood <scottwood@freescale.com>
To: Li Yang <leoli@freescale.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org,
	Shaohui Xie <Shaohui.Xie@freescale.com>,
	Arnd Bergmann <arnd@arndb.de>,
	Huan Wang <alison.wang@freescale.com>,
	Sharma Bhupesh <bhupesh.sharma@freescale.com>,
	Catalin Marinas <Catalin.Marinas@arm.com>,
	Olof Johansson <olof@lixom.net>,
	Singh Jaiprakash <jaiprakash.singh@freescale.com>,
	Stuart Yoder <stuart.yoder@freescale.com>,
	Will Deacon <will.deacon@arm.com>,
	"Lian M.H." <Minghuan.Lian@freescale.com>,
	Liu Gang <Gang.Liu@freescale.com>,
	Rob Herring <robherring2@gmail.com>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Badola Nikhil-B46172 <nikhil.badola@freescale.com>,
	Bhupesh SHARMA <bhupesh.linux@gmail.com>,
	"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"Lu Y.B." <yangbo.lu@freescale.com>
Subject: Re: [PATCH v2 07/10] dts/ls2085a: Update DTSI to add support of various peripherals
Date: Thu, 1 Oct 2015 16:58:57 -0500	[thread overview]
Message-ID: <1443736737.5336.158.camel@freescale.com> (raw)
In-Reply-To: <CADRPPNRz-yM_48HvHYv3r31u_b_tHkAjg5H5r+V2mE2=oJTGDA@mail.gmail.com>

On Thu, 2015-10-01 at 16:42 -0500, Li Yang wrote:
> On Thu, Oct 1, 2015 at 3:05 PM, Stuart Yoder <stuart.yoder@freescale.com> 
> wrote:
> > Hi Rob,
> > 
> > Had a question about your comments on the patch below.
> > 
> > You singled out 3 nodes (gic,uart,clockgen) and said "This should be 
> > under a bus node."
> > 
> > What is special about those 3 nodes types?  There are a bunch of other 
> > memory
> > mapped SoC devices as well in the DTS.
> > 
> > I skimmed the dts files under arch/arm64 and it looks like most have a 
> > simple-bus
> > SoC node like this where SoC devices are under:
> > 
> >         soc {
> >                 #address-cells = <2>;
> >                 #size-cells = <2>;
> >                 compatible = "simple-bus";
> >                 ranges;
> > 
> > Is that what you are looking for-- for all SoC devices?
> 
> I think the key is to have the soc node and have all the on-chip
> devices defined underneath it.
> 
> I read the following from the booting-without-of.txt document:
> 
>   f) the /soc<SOCname> node
> 
>   This node is used to represent a system-on-a-chip (SoC) and must be
>   present if the processor is a SoC. The top-level soc node contains
>   information that is global to all devices on the SoC. The node name
>   should contain a unit address for the SoC, which is the base address
>   of the memory-mapped register set for the SoC. The name of an SoC
>   node should start with "soc", and the remainder of the name should
>   represent the part number for the soc.  For example, the MPC8540's
>   soc node would be called "soc8540".
> 
> A lot of device trees didn't follow the soc<SOCname> naming scheme and
> just used "soc" as the node name.  I am not sure if we want to enforce
> the naming in the future or update the document to make it more relax.

Update the document.  Having the SoC name in the node name was a pain, which 
is why we don't do it anymore.  Ideally, this text should be moved into a 
binding for Freescale PPC/LS SoCs.  It really doesn't have the broad 
applicability that this historical document suggests, and even on our SoCs it 
doesn't represent the entire SoC.  It represents CCSR/IMMR.

-Scott

  reply	other threads:[~2015-10-01 21:58 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-09-04  7:05 [PATCH v2 07/10] dts/ls2085a: Update DTSI to add support of various peripherals Bhupesh Sharma
2015-09-04  7:05 ` Bhupesh Sharma
2015-09-04  7:05 ` [PATCH v2 08/10] dts/ls2085a: Update Simulator DTS " Bhupesh Sharma
2015-09-04  7:05   ` Bhupesh Sharma
2015-09-04 21:31   ` Li Yang
2015-09-04 21:31     ` Li Yang
2015-09-05  8:15     ` Sharma Bhupesh
2015-09-05  8:15       ` Sharma Bhupesh
2015-09-04  7:05 ` [PATCH v2 09/10] dts/ls2080a: Add DTS support for LS2080a QDS & RDB boards Bhupesh Sharma
2015-09-04  7:05   ` Bhupesh Sharma
2015-09-04  7:05 ` [PATCH v2 10/10] dts/Makefile: Add build support for LS2080a QDS & RDB board DTS Bhupesh Sharma
2015-09-04  7:05   ` Bhupesh Sharma
2015-09-04 10:54 ` [PATCH v2 07/10] dts/ls2085a: Update DTSI to add support of various peripherals Marc Zyngier
2015-09-04 10:54   ` Marc Zyngier
2015-09-09  3:58   ` Sharma Bhupesh
2015-09-09  3:58     ` Sharma Bhupesh
2015-09-04 21:02 ` Li Yang
2015-09-04 21:02   ` Li Yang
2015-09-05  8:37   ` Sharma Bhupesh
2015-09-05  8:37     ` Sharma Bhupesh
2015-09-05  8:37     ` Sharma Bhupesh
2015-09-06 20:57     ` Rob Herring
2015-09-06 20:57       ` Rob Herring
2015-09-06 21:03       ` Sharma Bhupesh
2015-09-06 21:03         ` Sharma Bhupesh
2015-09-06 21:03         ` Sharma Bhupesh
2015-09-07 20:58         ` Rob Herring
2015-09-07 20:58           ` Rob Herring
2015-09-07 20:58           ` Rob Herring
2015-09-09  3:55           ` Sharma Bhupesh
2015-09-09  3:55             ` Sharma Bhupesh
2015-09-09  3:55             ` Sharma Bhupesh
2015-09-04 21:15 ` Rob Herring
2015-09-04 21:15   ` Rob Herring
2015-09-28 10:03   ` Bhupesh SHARMA
2015-09-28 10:03     ` Bhupesh SHARMA
2015-09-28 13:44     ` Rob Herring
2015-09-28 13:44       ` Rob Herring
     [not found]   ` <CALRxmdC9ZzGiw6CVnVTqhH1xvA-P9s8cpYbk8DoVq7CodFS0VA@mail.gmail.com>
2015-10-01 20:05     ` Stuart Yoder
2015-10-01 20:05       ` Stuart Yoder
2015-10-01 21:42       ` Li Yang
2015-10-01 21:42         ` Li Yang
2015-10-01 21:58         ` Scott Wood [this message]
2015-10-01 21:58           ` Scott Wood
2015-10-01 21:58           ` Scott Wood
2015-10-01 22:41           ` Li Yang
2015-10-01 22:41             ` Li Yang
2015-10-01 23:18             ` Scott Wood
2015-10-01 23:18               ` Scott Wood
2015-10-01 23:18               ` Scott Wood

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