From: vinod.koul@intel.com (Koul, Vinod)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory Access Engine driver support
Date: Mon, 5 Oct 2015 14:10:03 +0000 [thread overview]
Message-ID: <1444054201.3579.22.camel@intel.com> (raw)
In-Reply-To: <C246CAC1457055469EF09E3A7AC4E11A4A4EC176@XAP-PVEXMBX01.xlnx.xilinx.com>
On Mon, 2015-10-05 at 13:50 +0000, Appana Durga Kedareswara Rao wrote:
> >
> > On Mon, Sep 07, 2015 at 06:03:18PM +0530, Kedareswara rao Appana wrote:
> > > This is the driver for the AXI Central Direct Memory Access (AXI
> > > CDMA) core, which is a soft Xilinx IP core that provides
> > > high-bandwidth Direct Memory Access (DMA) between a memory-mapped
> > > source address and a memory-mapped destination address.
> >
> > Where is the 1/2 here ? I have only this one in my mails..
>
> You are there in the 1/2 not the dmaengine at vger.kernel.org.
The threading is broken in your patch series. ON searching I found the 1/2. Please
make sure patch series are threaded properly.
--
~Vinod
WARNING: multiple messages have this Message-ID (diff)
From: "Koul, Vinod" <vinod.koul@intel.com>
To: "appana.durga.rao@xilinx.com" <appana.durga.rao@xilinx.com>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"anirudh@xilinx.com" <anirudh@xilinx.com>,
"michals@xilinx.com" <michals@xilinx.com>,
"Williams, Dan J" <dan.j.williams@intel.com>,
"sorenb@xilinx.com" <sorenb@xilinx.com>,
"dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"arnd@arndb.de" <arnd@arndb.de>
Subject: Re: [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory Access Engine driver support
Date: Mon, 5 Oct 2015 14:10:03 +0000 [thread overview]
Message-ID: <1444054201.3579.22.camel@intel.com> (raw)
In-Reply-To: <C246CAC1457055469EF09E3A7AC4E11A4A4EC176@XAP-PVEXMBX01.xlnx.xilinx.com>
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[-- Attachment #1: Type: text/plain; charset="utf-8", Size: 856 bytes --]
On Mon, 2015-10-05 at 13:50 +0000, Appana Durga Kedareswara Rao wrote:
> >
> > On Mon, Sep 07, 2015 at 06:03:18PM +0530, Kedareswara rao Appana wrote:
> > > This is the driver for the AXI Central Direct Memory Access (AXI
> > > CDMA) core, which is a soft Xilinx IP core that provides
> > > high-bandwidth Direct Memory Access (DMA) between a memory-mapped
> > > source address and a memory-mapped destination address.
> >
> > Where is the 1/2 here ? I have only this one in my mails..
>
> You are there in the 1/2 not the dmaengine@vger.kernel.org.
The threading is broken in your patch series. ON searching I found the 1/2. Please
make sure patch series are threaded properly.
--
~Vinod
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next prev parent reply other threads:[~2015-10-05 14:10 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-09-07 12:33 [PATCH v6 2/2] dmaengine: Add Xilinx AXI Central Direct Memory Access Engine driver support Kedareswara rao Appana
2015-09-07 12:33 ` Kedareswara rao Appana
2015-10-05 13:39 ` Vinod Koul
2015-10-05 13:39 ` Vinod Koul
2015-10-05 13:50 ` Appana Durga Kedareswara Rao
2015-10-05 13:50 ` Appana Durga Kedareswara Rao
2015-10-05 14:10 ` Koul, Vinod [this message]
2015-10-05 14:10 ` Koul, Vinod
2015-10-05 14:19 ` Appana Durga Kedareswara Rao
2015-10-05 14:19 ` Appana Durga Kedareswara Rao
2015-10-05 15:18 ` Vinod Koul
2015-10-05 15:18 ` Vinod Koul
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