From: Ian Campbell <ian.campbell@citrix.com>
To: Julien Grall <julien.grall@citrix.com>, xen-devel@lists.xenproject.org
Cc: stefano.stabellini@eu.citrix.com
Subject: Re: [PATCH 2/9] xen/arm: vgic-v3: Only emulate identification registers requested by the spec
Date: Mon, 16 Nov 2015 13:27:36 +0000 [thread overview]
Message-ID: <1447680456.27871.89.camel@citrix.com> (raw)
In-Reply-To: <1447415672-31633-3-git-send-email-julien.grall@citrix.com>
On Fri, 2015-11-13 at 11:54 +0000, Julien Grall wrote:
> Most of the identification registers space contains implementation
> defined registers (see 8.1.13 in ARM IHI 0069A) and only GIC{D,R}_PIDR2
> is required to be implemented.
I think you mean s/requested/required/ in the subject too?
>
> Currently the emulation of those registers mimic the ARM implementation,
> but it's untrue to say that we properly emulate a such implementation.
>
> Keep only GIC{D,R}_PIDR2 implemented with the "implementationd defined
"implementation"
> bits" to zero and the ArchRev field (bits[7:4]) to 0x3 as we emulate a
> GICv3.
>
> Note that the emulation of the range wasn't valid anyway because the
> registers are split in 2 sets (PIDR4-PIDR7 and PIDR0-PIDR2).
>
> Signed-off-by: Julien Grall <julien.grall@citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
next prev parent reply other threads:[~2015-11-16 13:28 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-13 11:54 [PATCH 0/9] xen/arm: Bunch of fixes for the vGIC emulation Julien Grall
2015-11-13 11:54 ` [PATCH 1/9] xen/arm: vgic-v3: Use the correct offset GICR_IGRPMODR0 Julien Grall
2015-11-16 13:20 ` Ian Campbell
2015-11-13 11:54 ` [PATCH 2/9] xen/arm: vgic-v3: Only emulate identification registers requested by the spec Julien Grall
2015-11-16 13:27 ` Ian Campbell [this message]
2015-11-18 16:46 ` Julien Grall
2015-11-13 11:54 ` [PATCH 3/9] xen/arm: vgic: Properly emulate the full register Julien Grall
2015-11-16 13:29 ` Ian Campbell
2015-11-13 11:54 ` [PATCH 4/9] xen/arm: vgic-v3: Remove GICR_MOVALLR and GICR_MOVLPIR Julien Grall
2015-11-16 13:33 ` Ian Campbell
2015-11-18 16:58 ` Julien Grall
2015-11-13 11:54 ` [PATCH 5/9] xen/arm: vgic: Re-order the register emulations to match the memory map Julien Grall
2015-11-16 13:35 ` Ian Campbell
2015-11-13 11:54 ` [PATCH 6/9] xen/arm: vgic-v3: Emulate read to GICD_ICACTIVER<n> Julien Grall
2015-11-16 13:36 ` Ian Campbell
2015-11-13 11:54 ` [PATCH 7/9] xen/arm: vgic-v3: Remove spurious return in GICR_INVALLR Julien Grall
2015-11-16 13:36 ` Ian Campbell
2015-11-13 11:54 ` [PATCH 8/9] xen/arm: vgic-v3: Don't implement write-only register read as zero Julien Grall
2015-11-16 13:37 ` Ian Campbell
2015-11-13 11:54 ` [PATCH 9/9] xen/arm: vgic-v3: Make clear that GICD_*SPI_* registers are reserved Julien Grall
2015-11-16 13:39 ` Ian Campbell
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