From: andrew-ct chen <andrew-ct.chen-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
To: Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>
Cc: Tiffany Lin <tiffany.lin-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>,
Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>,
Ian Campbell
<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
Catalin Marinas <catalin.marinas-5wv7dgnIgG8@public.gmane.org>,
Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>,
Mauro Carvalho Chehab
<mchehab-JPH+aEBZ4P+UEJcrhfAQsw@public.gmane.org>,
Matthias Brugger
<matthias.bgg-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Daniel Kurtz <djkurtz-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>,
Sascha Hauer <s.hauer-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>,
Hongzhou Yang
<hongzhou.yang-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>,
Hans Verkuil
<hans.verkuil-FYB4Gu1CFyUAvxtiuMwx3w@public.gmane.org>,
Laurent Pinchart
<laurent.pinchart-ryLnwIuWjnjg/C1BVhZhaw@public.gmane.org>,
Sakari Ailus <sakari.ailus-X3B1VOXEql0@public.gmane.org>,
Geert Uytterhoeven
<geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org>,
Mikhail Ulyanov
<mikhail.ulyanov-M4DtvfQ/ZS1MRgGoP+s0PdBPR1lH4CV8@public.gmane.org>,
Fabien Dessenne <fabien.dessenne-qxv4g6HH51o@public.gmane.org>,
Arnd Bergmann <arnd-r2nGTMty4D4@public.gmane.org>,
Darren Etheridge <detheridge-l0cyMroinI0@public.gmane.org>,
Peter Griffin
<peter.griffin-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>,
Benoit Parr
Subject: Re: [RESEND RFC/PATCH 1/8] dt-bindings: Add a binding for Mediatek Video Processor Unit
Date: Thu, 19 Nov 2015 10:47:10 +0800 [thread overview]
Message-ID: <1447901230.6731.3.camel@mtksdaap41> (raw)
In-Reply-To: <20151117141320.GJ12586@leverpostej>
On Tue, 2015-11-17 at 14:13 +0000, Mark Rutland wrote:
> On Tue, Nov 17, 2015 at 08:54:38PM +0800, Tiffany Lin wrote:
> > From: Andrew-CT Chen <andrew-ct.chen-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
> >
> > Add a DT binding documentation of Video Processor Unit for the
> > MT8173 SoC from Mediatek.
> >
> > Signed-off-by: Andrew-CT Chen <andrew-ct.chen-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
> > ---
> > .../devicetree/bindings/media/mediatek-vpu.txt | 27 ++++++++++++++++++++
> > 1 file changed, 27 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/media/mediatek-vpu.txt
> >
> > diff --git a/Documentation/devicetree/bindings/media/mediatek-vpu.txt b/Documentation/devicetree/bindings/media/mediatek-vpu.txt
> > new file mode 100644
> > index 0000000..99a4e5e
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/mediatek-vpu.txt
> > @@ -0,0 +1,27 @@
> > +* Mediatek Video Processor Unit
> > +
> > +Video Processor Unit is a HW video controller. It controls HW Codec including
> > +H.264/VP8/VP9 Decode, H.264/VP8 Encode and Image Processor (scale/rotate/color convert).
> > +
> > +Required properties:
> > + - compatible: "mediatek,mt8173-vpu"
> > + - reg: Must contain an entry for each entry in reg-names.
> > + - reg-names: Must include the following entries:
> > + "sram": SRAM base
> > + "cfg_reg": Main configuration registers base
> > + - interrupts: interrupt number to the cpu.
> > + - clocks : clock name from clock manager
> > + - clock-names: the clocks of the VPU H/W
>
> You need to explicitly define the set of clock-names you expect here.
>
> Mark.
Sorry, only one clock to enable VPU hardware.
We will modify to
- clocks : must contain one entry for each clock-names.
- clock-names : must be "main", It is the main clock of VPU.
Thanks..
>
> > + - iommus : phandle and IOMMU spcifier for the IOMMU that serves the VPU.
> > +
> > +Example:
> > + vpu: vpu@10020000 {
> > + compatible = "mediatek,mt8173-vpu";
> > + reg = <0 0x10020000 0 0x30000>,
> > + <0 0x10050000 0 0x100>;
> > + reg-names = "sram", "cfg_reg";
> > + interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&topckgen TOP_SCP_SEL>;
> > + clock-names = "main";
> > + iommus = <&iommu M4U_PORT_VENC_RCPU>;
> > + };
> > --
> > 1.7.9.5
> >
--
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WARNING: multiple messages have this Message-ID (diff)
From: andrew-ct.chen@mediatek.com (andrew-ct chen)
To: linux-arm-kernel@lists.infradead.org
Subject: [RESEND RFC/PATCH 1/8] dt-bindings: Add a binding for Mediatek Video Processor Unit
Date: Thu, 19 Nov 2015 10:47:10 +0800 [thread overview]
Message-ID: <1447901230.6731.3.camel@mtksdaap41> (raw)
In-Reply-To: <20151117141320.GJ12586@leverpostej>
On Tue, 2015-11-17 at 14:13 +0000, Mark Rutland wrote:
> On Tue, Nov 17, 2015 at 08:54:38PM +0800, Tiffany Lin wrote:
> > From: Andrew-CT Chen <andrew-ct.chen@mediatek.com>
> >
> > Add a DT binding documentation of Video Processor Unit for the
> > MT8173 SoC from Mediatek.
> >
> > Signed-off-by: Andrew-CT Chen <andrew-ct.chen@mediatek.com>
> > ---
> > .../devicetree/bindings/media/mediatek-vpu.txt | 27 ++++++++++++++++++++
> > 1 file changed, 27 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/media/mediatek-vpu.txt
> >
> > diff --git a/Documentation/devicetree/bindings/media/mediatek-vpu.txt b/Documentation/devicetree/bindings/media/mediatek-vpu.txt
> > new file mode 100644
> > index 0000000..99a4e5e
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/mediatek-vpu.txt
> > @@ -0,0 +1,27 @@
> > +* Mediatek Video Processor Unit
> > +
> > +Video Processor Unit is a HW video controller. It controls HW Codec including
> > +H.264/VP8/VP9 Decode, H.264/VP8 Encode and Image Processor (scale/rotate/color convert).
> > +
> > +Required properties:
> > + - compatible: "mediatek,mt8173-vpu"
> > + - reg: Must contain an entry for each entry in reg-names.
> > + - reg-names: Must include the following entries:
> > + "sram": SRAM base
> > + "cfg_reg": Main configuration registers base
> > + - interrupts: interrupt number to the cpu.
> > + - clocks : clock name from clock manager
> > + - clock-names: the clocks of the VPU H/W
>
> You need to explicitly define the set of clock-names you expect here.
>
> Mark.
Sorry, only one clock to enable VPU hardware.
We will modify to
- clocks : must contain one entry for each clock-names.
- clock-names : must be "main", It is the main clock of VPU.
Thanks..
>
> > + - iommus : phandle and IOMMU spcifier for the IOMMU that serves the VPU.
> > +
> > +Example:
> > + vpu: vpu at 10020000 {
> > + compatible = "mediatek,mt8173-vpu";
> > + reg = <0 0x10020000 0 0x30000>,
> > + <0 0x10050000 0 0x100>;
> > + reg-names = "sram", "cfg_reg";
> > + interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&topckgen TOP_SCP_SEL>;
> > + clock-names = "main";
> > + iommus = <&iommu M4U_PORT_VENC_RCPU>;
> > + };
> > --
> > 1.7.9.5
> >
WARNING: multiple messages have this Message-ID (diff)
From: andrew-ct chen <andrew-ct.chen@mediatek.com>
To: Mark Rutland <mark.rutland@arm.com>
Cc: Tiffany Lin <tiffany.lin@mediatek.com>,
Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>,
"Catalin Marinas" <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>,
"Mauro Carvalho Chehab" <mchehab@osg.samsung.com>,
Matthias Brugger <matthias.bgg@gmail.com>,
Daniel Kurtz <djkurtz@chromium.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Hongzhou Yang <hongzhou.yang@mediatek.com>,
"Hans Verkuil" <hans.verkuil@cisco.com>,
Laurent Pinchart <laurent.pinchart@ideasonboard.com>,
Sakari Ailus <sakari.ailus@iki.fi>,
Geert Uytterhoeven <geert@linux-m68k.org>,
Mikhail Ulyanov <mikhail.ulyanov@cogentembedded.com>,
Fabien Dessenne <fabien.dessenne@st.com>,
Arnd Bergmann <arnd@arndb.de>,
Darren Etheridge <detheridge@ti.com>,
Peter Griffin <peter.griffin@linaro.org>,
"Benoit Parrot" <bparrot@ti.com>,
Eddie Huang <eddie.huang@mediatek.com>,
"Yingjoe Chen" <yingjoe.chen@mediatek.com>,
James Liao <jamesjj.liao@mediatek.com>,
Daniel Hsiao <daniel.hsiao@mediatek.com>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-media@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>
Subject: Re: [RESEND RFC/PATCH 1/8] dt-bindings: Add a binding for Mediatek Video Processor Unit
Date: Thu, 19 Nov 2015 10:47:10 +0800 [thread overview]
Message-ID: <1447901230.6731.3.camel@mtksdaap41> (raw)
In-Reply-To: <20151117141320.GJ12586@leverpostej>
On Tue, 2015-11-17 at 14:13 +0000, Mark Rutland wrote:
> On Tue, Nov 17, 2015 at 08:54:38PM +0800, Tiffany Lin wrote:
> > From: Andrew-CT Chen <andrew-ct.chen@mediatek.com>
> >
> > Add a DT binding documentation of Video Processor Unit for the
> > MT8173 SoC from Mediatek.
> >
> > Signed-off-by: Andrew-CT Chen <andrew-ct.chen@mediatek.com>
> > ---
> > .../devicetree/bindings/media/mediatek-vpu.txt | 27 ++++++++++++++++++++
> > 1 file changed, 27 insertions(+)
> > create mode 100644 Documentation/devicetree/bindings/media/mediatek-vpu.txt
> >
> > diff --git a/Documentation/devicetree/bindings/media/mediatek-vpu.txt b/Documentation/devicetree/bindings/media/mediatek-vpu.txt
> > new file mode 100644
> > index 0000000..99a4e5e
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/media/mediatek-vpu.txt
> > @@ -0,0 +1,27 @@
> > +* Mediatek Video Processor Unit
> > +
> > +Video Processor Unit is a HW video controller. It controls HW Codec including
> > +H.264/VP8/VP9 Decode, H.264/VP8 Encode and Image Processor (scale/rotate/color convert).
> > +
> > +Required properties:
> > + - compatible: "mediatek,mt8173-vpu"
> > + - reg: Must contain an entry for each entry in reg-names.
> > + - reg-names: Must include the following entries:
> > + "sram": SRAM base
> > + "cfg_reg": Main configuration registers base
> > + - interrupts: interrupt number to the cpu.
> > + - clocks : clock name from clock manager
> > + - clock-names: the clocks of the VPU H/W
>
> You need to explicitly define the set of clock-names you expect here.
>
> Mark.
Sorry, only one clock to enable VPU hardware.
We will modify to
- clocks : must contain one entry for each clock-names.
- clock-names : must be "main", It is the main clock of VPU.
Thanks..
>
> > + - iommus : phandle and IOMMU spcifier for the IOMMU that serves the VPU.
> > +
> > +Example:
> > + vpu: vpu@10020000 {
> > + compatible = "mediatek,mt8173-vpu";
> > + reg = <0 0x10020000 0 0x30000>,
> > + <0 0x10050000 0 0x100>;
> > + reg-names = "sram", "cfg_reg";
> > + interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&topckgen TOP_SCP_SEL>;
> > + clock-names = "main";
> > + iommus = <&iommu M4U_PORT_VENC_RCPU>;
> > + };
> > --
> > 1.7.9.5
> >
next prev parent reply other threads:[~2015-11-19 2:47 UTC|newest]
Thread overview: 81+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-11-17 12:54 [RESEND RFC/PATCH 0/8] Add MT8173 Video Encoder Driver and VPU Driver Tiffany Lin
2015-11-17 12:54 ` Tiffany Lin
2015-11-17 12:54 ` Tiffany Lin
2015-11-17 12:54 ` [RESEND RFC/PATCH 2/8] arm64: dts: mediatek: Add node for Mediatek Video Processor Unit Tiffany Lin
2015-11-17 12:54 ` Tiffany Lin
2015-11-17 12:54 ` Tiffany Lin
[not found] ` <1447764885-23100-1-git-send-email-tiffany.lin-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
2015-11-17 12:54 ` [RESEND RFC/PATCH 1/8] dt-bindings: Add a binding " Tiffany Lin
2015-11-17 12:54 ` Tiffany Lin
2015-11-17 12:54 ` Tiffany Lin
2015-11-17 14:13 ` Mark Rutland
2015-11-17 14:13 ` Mark Rutland
2015-11-17 14:13 ` Mark Rutland
2015-11-19 2:47 ` andrew-ct chen [this message]
2015-11-19 2:47 ` andrew-ct chen
2015-11-19 2:47 ` andrew-ct chen
2015-11-17 12:54 ` [RESEND RFC/PATCH 3/8] media: platform: mtk-vpu: Support Mediatek VPU Tiffany Lin
2015-11-17 12:54 ` Tiffany Lin
2015-11-17 12:54 ` Tiffany Lin
[not found] ` <1447764885-23100-4-git-send-email-tiffany.lin-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
2015-11-25 16:11 ` Daniel Thompson
2015-11-25 16:11 ` Daniel Thompson
2015-11-25 16:11 ` Daniel Thompson
[not found] ` <5655DDB4.2080002-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2015-11-27 12:10 ` andrew-ct chen
2015-11-27 12:10 ` andrew-ct chen
2015-11-27 12:10 ` andrew-ct chen
2015-11-27 12:21 ` Daniel Thompson
2015-11-27 12:21 ` Daniel Thompson
2015-11-27 12:21 ` Daniel Thompson
[not found] ` <56584AC5.7020704-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2015-11-30 11:43 ` andrew-ct chen
2015-11-30 11:43 ` andrew-ct chen
2015-11-30 11:43 ` andrew-ct chen
2015-11-30 15:36 ` Daniel Thompson
2015-11-30 15:36 ` Daniel Thompson
2015-11-30 15:36 ` Daniel Thompson
[not found] ` <CAMTL27G8WRTTGCtU9pXpp1-inyzZE9Jat1SkOiX5HMG5E-eFzw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-12-01 14:31 ` andrew-ct chen
2015-12-01 14:31 ` andrew-ct chen
2015-12-01 14:31 ` andrew-ct chen
2015-11-17 12:54 ` [RESEND RFC/PATCH 4/8] dt-bindings: Add a binding for Mediatek Video Encoder Tiffany Lin
2015-11-17 12:54 ` Tiffany Lin
2015-11-17 12:54 ` Tiffany Lin
2015-11-17 19:41 ` Rob Herring
2015-11-17 19:41 ` Rob Herring
2015-11-17 19:41 ` Rob Herring
2015-11-18 6:21 ` tiffany lin
2015-11-18 7:09 ` tiffany lin
2015-11-18 7:09 ` tiffany lin
2015-11-18 7:09 ` tiffany lin
2015-11-17 12:54 ` [RESEND RFC/PATCH 5/8] arm64: dts: mediatek: Add Video Encoder for MT8173 Tiffany Lin
2015-11-17 12:54 ` Tiffany Lin
2015-11-17 12:54 ` Tiffany Lin
2015-11-19 7:40 ` [RESEND RFC/PATCH 0/8] Add MT8173 Video Encoder Driver and VPU Driver Hans Verkuil
2015-11-19 7:40 ` Hans Verkuil
2015-11-19 7:40 ` Hans Verkuil
2015-11-17 12:54 ` [RESEND RFC/PATCH 6/8] media: platform: mtk-vcodec: Add Mediatek V4L2 Video Encoder Driver Tiffany Lin
2015-11-17 12:54 ` Tiffany Lin
[not found] ` <1447764885-23100-7-git-send-email-tiffany.lin-NuS5LvNUpcJWk0Htik3J/w@public.gmane.org>
2015-11-27 16:34 ` Daniel Thompson
2015-11-27 16:34 ` Daniel Thompson
2015-11-27 16:34 ` Daniel Thompson
[not found] ` <56588622.8060600-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
2015-11-30 11:39 ` tiffany lin
2015-11-30 11:39 ` tiffany lin
2015-11-30 11:39 ` tiffany lin
2015-11-30 14:58 ` Daniel Thompson
2015-11-30 14:58 ` Daniel Thompson
2015-11-30 14:58 ` Daniel Thompson
[not found] ` <CAMTL27FchgtJZS4YpVge-x+TstnVHmG1aAnaOV32qCU3zMUbAQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2015-12-01 10:42 ` tiffany lin
2015-12-01 10:42 ` tiffany lin
2015-12-01 10:42 ` tiffany lin
2015-12-01 15:42 ` Daniel Thompson
2015-12-01 15:42 ` Daniel Thompson
2015-12-01 15:42 ` Daniel Thompson
2015-12-02 13:08 ` tiffany lin
2015-12-02 13:08 ` tiffany lin
2015-12-02 13:08 ` tiffany lin
2015-12-02 16:02 ` Daniel Thompson
2015-12-02 16:02 ` Daniel Thompson
2015-12-02 16:02 ` Daniel Thompson
2015-11-17 12:54 ` [RESEND RFC/PATCH 7/8] media: platform: mtk-vcodec: Add Mediatek VP8 " Tiffany Lin
2015-11-17 12:54 ` Tiffany Lin
2015-11-17 12:54 ` Tiffany Lin
2015-11-17 12:54 ` [RESEND RFC/PATCH 8/8] media: platform: mtk-vcodec: Add Mediatek H264 " Tiffany Lin
2015-11-17 12:54 ` Tiffany Lin
2015-11-17 12:54 ` Tiffany Lin
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