[U-Boot] [PATCH 1/7] net: phy: micrel: Configure KSZ9021/KSZ9031 skew from OF

[Chin Liang See <clsee@altera.com>]

On Sat, 2015-12-05 at 21:41 +0100, Marek Vasut wrote:
> Add code to process the KSZ9021/KSZ9031 OF props if they are present
> and configure skew registers based on the information from the OF.
> This code is only enabled if the DM support for ethernet is also
> enabled.
> 

Nice as I noticed the value in dts was not used previously.


> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Joe Hershberger <joe.hershberger@ni.com>
> Cc: Chin Liang See <clsee@altera.com>
> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
> ---
>  drivers/net/phy/micrel.c | 127
> ++++++++++++++++++++++++++++++++++++++++++++++-
>  1 file changed, 126 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
> index 5e49666..a379230 100644
> --- a/drivers/net/phy/micrel.c
> +++ b/drivers/net/phy/micrel.c
> @@ -9,9 +9,14 @@
>   */
>  #include <config.h>
>  #include <common.h>
> +#include <dm.h>
> +#include <errno.h>
> +#include <fdtdec.h>
>  #include <micrel.h>
>  #include <phy.h>
>  
> +DECLARE_GLOBAL_DATA_PTR;
> +
>  static struct phy_driver KSZ804_driver = {
>  	.name = "Micrel KSZ804",
>  	.uid = 0x221510,
> @@ -174,6 +179,58 @@ static int ksz90xx_startup(struct phy_device
> *phydev)
>  	return 0;
>  }
>  
> +/* Common OF config bits for KSZ9021 and KSZ9031 */
> +#if defined(CONFIG_PHY_MICREL_KSZ9021) ||
> defined(CONFIG_PHY_MICREL_KSZ9031)
> +#ifdef CONFIG_DM_ETH
> +struct ksz90x1_ofcfg {
> +	u16		reg;
> +	u16		devad;
> +	const char	**grp;
> +	u16		grpsz;
> +};
> +
> +static const char *ksz90x1_rxd_grp[] =
> +	{ "rxd0-skew-ps", "rxd1-skew-ps", "rxd2-skew-ps", "rxd3-skew
> -ps" };
> +static const char *ksz90x1_txd_grp[] =
> +	{ "txd0-skew-ps", "txd1-skew-ps", "txd2-skew-ps", "txd3-skew
> -ps" };
> +
> +static int ksz90x1_of_config_group(struct phy_device *phydev,
> +				   struct ksz90x1_ofcfg *ofcfg)
> +{
> +	struct udevice *dev = phydev->dev;
> +	struct phy_driver *drv = phydev->drv;
> +	const int ps_to_regval = 200;
> +	int val[4];
> +	int i, changed = 0;
> +	u16 regval = 0;
> +
> +	if (!drv || !drv->writeext)
> +		return -EOPNOTSUPP;
> +
> +	for (i = 0; i < ofcfg->grpsz; i++) {
> +		val[i] = fdtdec_get_uint(gd->fdt_blob, dev
> ->of_offset,
> +					 ofcfg->grp[i], -1);
> +		if (val[i] == -1) {
> +			/* Default register value for KSZ9021 */
> +			regval |= 0x7 << (4 * i);

I noticed the KSZ9031 clock skew is having 5 bit with default value 0xF
instead 0x7. Probably this default value and bit width should part of
structure?


> +		} else {
> +			changed = 1;	/* Value was changed in
> OF */
> +			/* Calculate the register value and fix
> corner cases */
> +			if (val[i] > ps_to_regval * 0xf)
> +				regval |= 0xf << (4 * i);
> +			else
> +				regval |= (val[i] / ps_to_regval) <<
> (4 * i);

Same as above where 9031 clock skew field is 5 bit.

Thanks
Chin Liang