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From: Marek Vasut <marex@denx.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/7] net: phy: micrel: Configure KSZ9021/KSZ9031 skew from OF
Date: Mon, 7 Dec 2015 13:21:05 +0100	[thread overview]
Message-ID: <201512071321.05478.marex@denx.de> (raw)
In-Reply-To: <1449482421.2061.3.camel@altera.com>

On Monday, December 07, 2015 at 11:00:21 AM, Chin Liang See wrote:
> On Sat, 2015-12-05 at 21:41 +0100, Marek Vasut wrote:
> > Add code to process the KSZ9021/KSZ9031 OF props if they are present
> > and configure skew registers based on the information from the OF.
> > This code is only enabled if the DM support for ethernet is also
> > enabled.
> 
> Nice as I noticed the value in dts was not used previously.

The more important thing is that after these patchsets, it's only the DTS that 
is used, the hard-coded values are gone.

> > Signed-off-by: Marek Vasut <marex@denx.de>
> > Cc: Joe Hershberger <joe.hershberger@ni.com>
> > Cc: Chin Liang See <clsee@altera.com>
> > Cc: Dinh Nguyen <dinguyen@opensource.altera.com>

[...]

> > +	for (i = 0; i < ofcfg->grpsz; i++) {
> > +		val[i] = fdtdec_get_uint(gd->fdt_blob, dev
> > ->of_offset,
> > +					 ofcfg->grp[i], -1);
> > +		if (val[i] == -1) {
> > +			/* Default register value for KSZ9021 */
> > +			regval |= 0x7 << (4 * i);
> 
> I noticed the KSZ9031 clock skew is having 5 bit with default value 0xF
> instead 0x7. Probably this default value and bit width should part of
> structure?

Ew, this might need some more thinking then. Nice catch.

Best regards,
Marek Vasut

  reply	other threads:[~2015-12-07 12:21 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-12-05 20:41 [U-Boot] [PATCH 1/7] net: phy: micrel: Configure KSZ9021/KSZ9031 skew from OF Marek Vasut
2015-12-05 20:41 ` [U-Boot] [PATCH 2/7] arm: socfpga: socrates: Add missing PHY skew config Marek Vasut
2015-12-07  7:00   ` Chin Liang See
2015-12-05 20:41 ` [U-Boot] [PATCH 3/7] arm: socfpga: arria5-socdk: Remove Micrel PHY configuration Marek Vasut
2015-12-07 12:10   ` Chin Liang See
2015-12-05 20:41 ` [U-Boot] [PATCH 4/7] arm: socfpga: cyclone5-socdk: " Marek Vasut
2015-12-07 12:12   ` Chin Liang See
2015-12-05 20:41 ` [U-Boot] [PATCH 5/7] arm: socfpga: de0_nano: " Marek Vasut
2015-12-07 12:13   ` Chin Liang See
2015-12-05 20:41 ` [U-Boot] [PATCH 6/7] arm: socfpga: sockit: " Marek Vasut
2015-12-07 12:14   ` Chin Liang See
2015-12-05 20:41 ` [U-Boot] [PATCH 7/7] arm: socfpga: socrates: " Marek Vasut
2015-12-07 12:14   ` Chin Liang See
2015-12-07 10:00 ` [U-Boot] [PATCH 1/7] net: phy: micrel: Configure KSZ9021/KSZ9031 skew from OF Chin Liang See
2015-12-07 12:21   ` Marek Vasut [this message]
2015-12-07 13:18 ` [U-Boot] [PATCH V2 " Marek Vasut
2015-12-07 13:39   ` Chin Liang See

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