diff for duplicates of <1453711341.2521.206.camel@linux.intel.com> diff --git a/a/1.txt b/N1/1.txt index 691de60..b2ad7ee 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,5 +1,5 @@ -On Sun, 2016-01-24@19:21 +0000, Mans Rullgard wrote: -> From: Andy Shevchenko <andriy.shevchenko at linux.intel.com> +On Sun, 2016-01-24 at 19:21 +0000, Mans Rullgard wrote: +> From: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > > There are several changes are done here: > @@ -19,8 +19,8 @@ On Sun, 2016-01-24@19:21 +0000, Mans Rullgard wrote: > > ?- While here, replace dwc_fast_ffs() by __ffs(). > -> Signed-off-by: Andy Shevchenko <andriy.shevchenko at linux.intel.com> -> Signed-off-by: Mans Rullgard <mans at mansr.com> +> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> +> Signed-off-by: Mans Rullgard <mans@mansr.com> > --- > This patch changes the DT binding, so it should probably be amended > for @@ -322,5 +322,5 @@ to support SPEAr SoCs. > ?#endif /* _PLATFORM_DATA_DMA_DW_H */ -- -Andy Shevchenko <andriy.shevchenko at linux.intel.com> +Andy Shevchenko <andriy.shevchenko@linux.intel.com> Intel Finland Oy diff --git a/a/content_digest b/N1/content_digest index c30e2f0..3df680b 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -3,11 +3,11 @@ "From\0andriy.shevchenko@linux.intel.com (Andy Shevchenko)\0" "Subject\0[PATCH 07/15] dmaengine: dw: revisit data_width property\0" "Date\0Mon, 25 Jan 2016 10:42:21 +0200\0" - "To\0linux-snps-arc@lists.infradead.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" - "On Sun, 2016-01-24@19:21 +0000, Mans Rullgard wrote:\n" - "> From: Andy Shevchenko <andriy.shevchenko at linux.intel.com>\n" + "On Sun, 2016-01-24 at 19:21 +0000, Mans Rullgard wrote:\n" + "> From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>\n" "> \n" "> There are several changes are done here:\n" "> \n" @@ -27,8 +27,8 @@ "> \n" "> ?- While here, replace dwc_fast_ffs() by __ffs().\n" "> \n" - "> Signed-off-by: Andy Shevchenko <andriy.shevchenko at linux.intel.com>\n" - "> Signed-off-by: Mans Rullgard <mans at mansr.com>\n" + "> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>\n" + "> Signed-off-by: Mans Rullgard <mans@mansr.com>\n" "> ---\n" "> This patch changes the DT binding, so it should probably be amended\n" "> for\n" @@ -330,7 +330,7 @@ "> ?#endif /* _PLATFORM_DATA_DMA_DW_H */\n" "\n" "-- \n" - "Andy Shevchenko <andriy.shevchenko at linux.intel.com>\n" + "Andy Shevchenko <andriy.shevchenko@linux.intel.com>\n" Intel Finland Oy -c92e696dd1f95840f5e5b093951a8ffe6cb667b2a28ba86ba2c023ec5e36824c +3fe66f559f9222e3f0883a9763fe1f9e4df6229fda5df436c5cddabf564d0b1e
diff --git a/a/1.txt b/N2/1.txt index 691de60..b009a89 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,30 +1,30 @@ -On Sun, 2016-01-24@19:21 +0000, Mans Rullgard wrote: -> From: Andy Shevchenko <andriy.shevchenko at linux.intel.com> +On Sun, 2016-01-24 at 19:21 +0000, Mans Rullgard wrote: +> From: Andy Shevchenko <andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> > > There are several changes are done here: > -> ?- Convert the property to be in bytes +> - Convert the property to be in bytes > -> ???Much more convenient than keeping encoded value. +> Much more convenient than keeping encoded value. > -> ?- Use one value for all AHB masters for now +> - Use one value for all AHB masters for now > -> ???It seems in practice we have no controllers where masters have +> It seems in practice we have no controllers where masters have > different -> ???data bus width, we still might return to distinct values when +> data bus width, we still might return to distinct values when > there is a use -> ???case. +> case. > -> ?- Rename data_width to data-width in the device tree bindings. +> - Rename data_width to data-width in the device tree bindings. > -> ?- While here, replace dwc_fast_ffs() by __ffs(). +> - While here, replace dwc_fast_ffs() by __ffs(). > -> Signed-off-by: Andy Shevchenko <andriy.shevchenko at linux.intel.com> -> Signed-off-by: Mans Rullgard <mans at mansr.com> +> Signed-off-by: Andy Shevchenko <andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> +> Signed-off-by: Mans Rullgard <mans-2StjZFpD7GcAvxtiuMwx3w@public.gmane.org> > --- > This patch changes the DT binding, so it should probably be amended > for -> compatibility with old device trees.??I've included it as is since I +> compatibility with old device trees. I've included it as is since I > think > the change as such is good. @@ -42,15 +42,15 @@ I any case Viresh might comment on this since it was his code regarding to support SPEAr SoCs. > --- -> ?Documentation/devicetree/bindings/dma/snps-dma.txt |??5 ++- -> ?arch/arc/boot/dts/abilis_tb10x.dtsi????????????????|??2 +- -> ?arch/arm/boot/dts/spear13xx.dtsi???????????????????|??4 +-- -> ?drivers/dma/dw/core.c??????????????????????????????| 40 +++--------- +> Documentation/devicetree/bindings/dma/snps-dma.txt | 5 ++- +> arch/arc/boot/dts/abilis_tb10x.dtsi | 2 +- +> arch/arm/boot/dts/spear13xx.dtsi | 4 +-- +> drivers/dma/dw/core.c | 40 +++--------- > ---------- -> ?drivers/dma/dw/platform.c??????????????????????????|??8 ++--- -> ?drivers/dma/dw/regs.h??????????????????????????????|??2 +- -> ?include/linux/platform_data/dma-dw.h???????????????|??5 ++- -> ?7 files changed, 16 insertions(+), 50 deletions(-) +> drivers/dma/dw/platform.c | 8 ++--- +> drivers/dma/dw/regs.h | 2 +- +> include/linux/platform_data/dma-dw.h | 5 ++- +> 7 files changed, 16 insertions(+), 50 deletions(-) > > diff --git a/Documentation/devicetree/bindings/dma/snps-dma.txt > b/Documentation/devicetree/bindings/dma/snps-dma.txt @@ -58,26 +58,26 @@ to support SPEAr SoCs. > --- a/Documentation/devicetree/bindings/dma/snps-dma.txt > +++ b/Documentation/devicetree/bindings/dma/snps-dma.txt > @@ -13,8 +13,7 @@ Required properties: -> ?- chan_priority: priority of channels. 0 (default): increase from +> - chan_priority: priority of channels. 0 (default): increase from > chan 0->n, 1: -> ???increase from chan n->0 -> ?- block_size: Maximum block size supported by the controller +> increase from chan n->0 +> - block_size: Maximum block size supported by the controller > -- data_width: Maximum data width supported by hardware per AHB > master -> -??(0 - 8bits, 1 - 16bits, ..., 5 - 256bits) +> - (0 - 8bits, 1 - 16bits, ..., 5 - 256bits) > +- data-width: Maximum data width supported by hardware (in bytes) -> ? -> ? -> ?Optional properties: +> +> +> Optional properties: > @@ -38,7 +37,7 @@ Example: -> ? chan_allocation_order = <1>; -> ? chan_priority = <1>; -> ? block_size = <0xfff>; +> chan_allocation_order = <1>; +> chan_priority = <1>; +> block_size = <0xfff>; > - data_width = <3 3>; > + data-width = <8>; -> ? }; -> ? -> ?DMA clients connected to the Designware DMA controller must use the +> }; +> +> DMA clients connected to the Designware DMA controller must use the > format > diff --git a/arch/arc/boot/dts/abilis_tb10x.dtsi > b/arch/arc/boot/dts/abilis_tb10x.dtsi @@ -85,54 +85,54 @@ to support SPEAr SoCs. > --- a/arch/arc/boot/dts/abilis_tb10x.dtsi > +++ b/arch/arc/boot/dts/abilis_tb10x.dtsi > @@ -112,7 +112,7 @@ -> ? chan_allocation_order = <0>; -> ? chan_priority = <1>; -> ? block_size = <0x7ff>; +> chan_allocation_order = <0>; +> chan_priority = <1>; +> block_size = <0x7ff>; > - data_width = <2>; > + data-width = <4>; -> ? clocks = <&ahb_clk>; -> ? clock-names = "hclk"; -> ? }; +> clocks = <&ahb_clk>; +> clock-names = "hclk"; +> }; > diff --git a/arch/arm/boot/dts/spear13xx.dtsi > b/arch/arm/boot/dts/spear13xx.dtsi > index 14594ce8c18a..474b66fa6a32 100644 > --- a/arch/arm/boot/dts/spear13xx.dtsi > +++ b/arch/arm/boot/dts/spear13xx.dtsi > @@ -117,7 +117,7 @@ -> ? chan_priority = <1>; -> ? block_size = <0xfff>; -> ? dma-masters = <2>; +> chan_priority = <1>; +> block_size = <0xfff>; +> dma-masters = <2>; > - data_width = <3 3>; > + data-width = <8>; -> ? }; -> ? -> ? dma at eb000000 { +> }; +> +> dma@eb000000 { > @@ -133,7 +133,7 @@ -> ? chan_allocation_order = <1>; -> ? chan_priority = <1>; -> ? block_size = <0xfff>; +> chan_allocation_order = <1>; +> chan_priority = <1>; +> block_size = <0xfff>; > - data_width = <3 3>; > + data-width = <8>; -> ? }; -> ? -> ? fsmc: flash at b0000000 { +> }; +> +> fsmc: flash@b0000000 { > diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c > index 140ea59ec882..28278e4c77ad 100644 > --- a/drivers/dma/dw/core.c > +++ b/drivers/dma/dw/core.c > @@ -168,21 +168,6 @@ static void dwc_initialize(struct dw_dma_chan > *dwc) -> ? -> ?/*---------------------------------------------------------------- +> +> /*---------------------------------------------------------------- > ------*/ -> ? +> > -static inline unsigned int dwc_fast_ffs(unsigned long long v) > -{ > - /* -> - ?* We can be a lot more clever here, but this should take +> - * We can be a lot more clever here, but this should take > care -> - ?* of the most common optimization. -> - ?*/ +> - * of the most common optimization. +> - */ > - if (!(v & 7)) > - return 3; > - else if (!(v & 3)) @@ -142,94 +142,94 @@ to support SPEAr SoCs. > - return 0; > -} > - -> ?static inline void dwc_dump_chan_regs(struct dw_dma_chan *dwc) -> ?{ -> ? dev_err(chan2dev(&dwc->chan), +> static inline void dwc_dump_chan_regs(struct dw_dma_chan *dwc) +> { +> dev_err(chan2dev(&dwc->chan), > @@ -712,7 +697,6 @@ dwc_prep_dma_memcpy(struct dma_chan *chan, > dma_addr_t dest, dma_addr_t src, -> ? size_t offset; -> ? unsigned int src_width; -> ? unsigned int dst_width; +> size_t offset; +> unsigned int src_width; +> unsigned int dst_width; > - unsigned int data_width; -> ? u32 ctllo; -> ? -> ? dev_vdbg(chan2dev(chan), +> u32 ctllo; +> +> dev_vdbg(chan2dev(chan), > @@ -726,10 +710,7 @@ dwc_prep_dma_memcpy(struct dma_chan *chan, > dma_addr_t dest, dma_addr_t src, -> ? -> ? dwc->direction = DMA_MEM_TO_MEM; -> ? +> +> dwc->direction = DMA_MEM_TO_MEM; +> > - data_width = dw->data_width[dwc->m_master]; > - > - src_width = dst_width = min_t(unsigned int, data_width, -> - ??????dwc_fast_ffs(src | dest | +> - dwc_fast_ffs(src | dest | > len)); > + src_width = dst_width = __ffs(dw->data_width | src | dest | > len); -> ? -> ? ctllo = DWC_DEFAULT_CTLLO(chan) -> ? | DWC_CTLL_DST_WIDTH(dst_width) +> +> ctllo = DWC_DEFAULT_CTLLO(chan) +> | DWC_CTLL_DST_WIDTH(dst_width) > @@ -792,7 +773,6 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct > scatterlist *sgl, -> ? dma_addr_t reg; -> ? unsigned int reg_width; -> ? unsigned int mem_width; +> dma_addr_t reg; +> unsigned int reg_width; +> unsigned int mem_width; > - unsigned int data_width; -> ? unsigned int i; -> ? struct scatterlist *sg; -> ? size_t total_len = 0; +> unsigned int i; +> struct scatterlist *sg; +> size_t total_len = 0; > @@ -818,8 +798,6 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct > scatterlist *sgl, -> ? ctllo |= sconfig->device_fc ? +> ctllo |= sconfig->device_fc ? > DWC_CTLL_FC(DW_DMA_FC_P_M2P) : -> ? DWC_CTLL_FC(DW_DMA_FC_D_M2P); -> ? +> DWC_CTLL_FC(DW_DMA_FC_D_M2P); +> > - data_width = dw->data_width[dwc->m_master]; > - -> ? for_each_sg(sgl, sg, sg_len, i) { -> ? struct dw_desc *desc; -> ? u32 len, dlen, mem; +> for_each_sg(sgl, sg, sg_len, i) { +> struct dw_desc *desc; +> u32 len, dlen, mem; > @@ -827,8 +805,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct > scatterlist *sgl, -> ? mem = sg_dma_address(sg); -> ? len = sg_dma_len(sg); -> ? +> mem = sg_dma_address(sg); +> len = sg_dma_len(sg); +> > - mem_width = min_t(unsigned int, -> - ??data_width, +> - data_width, > dwc_fast_ffs(mem | len)); > + mem_width = __ffs(dw->data_width | mem | > len); -> ? -> ?slave_sg_todev_fill_desc: -> ? desc = dwc_desc_get(dwc); +> +> slave_sg_todev_fill_desc: +> desc = dwc_desc_get(dwc); > @@ -874,8 +851,6 @@ slave_sg_todev_fill_desc: -> ? ctllo |= sconfig->device_fc ? +> ctllo |= sconfig->device_fc ? > DWC_CTLL_FC(DW_DMA_FC_P_P2M) : -> ? DWC_CTLL_FC(DW_DMA_FC_D_P2M); -> ? +> DWC_CTLL_FC(DW_DMA_FC_D_P2M); +> > - data_width = dw->data_width[dwc->m_master]; > - -> ? for_each_sg(sgl, sg, sg_len, i) { -> ? struct dw_desc *desc; -> ? u32 len, dlen, mem; +> for_each_sg(sgl, sg, sg_len, i) { +> struct dw_desc *desc; +> u32 len, dlen, mem; > @@ -883,8 +858,7 @@ slave_sg_todev_fill_desc: -> ? mem = sg_dma_address(sg); -> ? len = sg_dma_len(sg); -> ? +> mem = sg_dma_address(sg); +> len = sg_dma_len(sg); +> > - mem_width = min_t(unsigned int, -> - ??data_width, +> - data_width, > dwc_fast_ffs(mem | len)); > + mem_width = __ffs(dw->data_width | mem | > len); -> ? -> ?slave_sg_fromdev_fill_desc: -> ? desc = dwc_desc_get(dwc); +> +> slave_sg_fromdev_fill_desc: +> desc = dwc_desc_get(dwc); > @@ -1531,10 +1505,7 @@ int dw_dma_probe(struct dw_dma_chip *chip, > struct dw_dma_platform_data *pdata) -> ? /* Get hardware configuration parameters */ -> ? pdata->nr_channels = (dw_params >> DW_PARAMS_NR_CHAN +> /* Get hardware configuration parameters */ +> pdata->nr_channels = (dw_params >> DW_PARAMS_NR_CHAN > & 7) + 1; -> ? pdata->nr_masters = (dw_params >> +> pdata->nr_masters = (dw_params >> > DW_PARAMS_NR_MASTER & 3) + 1; > - for (i = 0; i < pdata->nr_masters; i++) { > - pdata->data_width[i] = @@ -238,61 +238,61 @@ to support SPEAr SoCs. > - } > + pdata->data_width = 4 << (dw_params >> > DW_PARAMS_DATA_WIDTH(0) & 3); -> ? max_blk_size = dma_readl(dw, MAX_BLK_SIZE); -> ? -> ? /* Fill platform data with the default values */ +> max_blk_size = dma_readl(dw, MAX_BLK_SIZE); +> +> /* Fill platform data with the default values */ > @@ -1556,8 +1527,7 @@ int dw_dma_probe(struct dw_dma_chip *chip, > struct dw_dma_platform_data *pdata) -> ? -> ? /* Get hardware configuration parameters */ -> ? dw->nr_masters = pdata->nr_masters; +> +> /* Get hardware configuration parameters */ +> dw->nr_masters = pdata->nr_masters; > - for (i = 0; i < dw->nr_masters; i++) > - dw->data_width[i] = pdata->data_width[i]; > + dw->data_width = pdata->data_width; -> ? -> ? /* Calculate all channel mask before DMA setup */ -> ? dw->all_chan_mask = (1 << pdata->nr_channels) - 1; +> +> /* Calculate all channel mask before DMA setup */ +> dw->all_chan_mask = (1 << pdata->nr_channels) - 1; > diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c > index d3e1abcebd7f..89d0461f5dcc 100644 > --- a/drivers/dma/dw/platform.c > +++ b/drivers/dma/dw/platform.c > @@ -102,8 +102,8 @@ dw_dma_parse_dt(struct platform_device *pdev) -> ?{ -> ? struct device_node *np = pdev->dev.of_node; -> ? struct dw_dma_platform_data *pdata; +> { +> struct device_node *np = pdev->dev.of_node; +> struct dw_dma_platform_data *pdata; > - u32 tmp, arr[DW_DMA_MAX_NR_MASTERS]; -> ? u32 nr_channels; +> u32 nr_channels; > + u32 tmp; -> ? -> ? if (!np) { -> ? dev_err(&pdev->dev, "Missing DT data\n"); +> +> if (!np) { +> dev_err(&pdev->dev, "Missing DT data\n"); > @@ -138,10 +138,8 @@ dw_dma_parse_dt(struct platform_device *pdev) -> ? pdata->nr_masters = tmp; -> ? } -> ? +> pdata->nr_masters = tmp; +> } +> > - if (!of_property_read_u32_array(np, "data_width", arr, > - pdata->nr_masters)) > - for (tmp = 0; tmp < pdata->nr_masters; tmp++) > - pdata->data_width[tmp] = arr[tmp]; > + if (!of_property_read_u32(np, "data-width", &tmp)) > + pdata->data_width = tmp; -> ? -> ? return pdata; -> ?} +> +> return pdata; +> } > diff --git a/drivers/dma/dw/regs.h b/drivers/dma/dw/regs.h > index e4b277565165..87bc97fca084 100644 > --- a/drivers/dma/dw/regs.h > +++ b/drivers/dma/dw/regs.h > @@ -285,7 +285,7 @@ struct dw_dma { -> ? -> ? /* hardware configuration */ -> ? unsigned char nr_masters; +> +> /* hardware configuration */ +> unsigned char nr_masters; > - unsigned char data_width[DW_DMA_MAX_NR_MASTER > S]; > + unsigned char data_width; -> ?}; -> ? -> ?static inline struct dw_dma_regs __iomem *__dw_regs(struct dw_dma +> }; +> +> static inline struct dw_dma_regs __iomem *__dw_regs(struct dw_dma > *dw) > diff --git a/include/linux/platform_data/dma-dw.h > b/include/linux/platform_data/dma-dw.h @@ -300,27 +300,32 @@ to support SPEAr SoCs. > --- a/include/linux/platform_data/dma-dw.h > +++ b/include/linux/platform_data/dma-dw.h > @@ -42,8 +42,7 @@ struct dw_dma_slave { -> ? * @chan_priority: Set channel priority increasing from 0 to 7 or 7 +> * @chan_priority: Set channel priority increasing from 0 to 7 or 7 > to 0. -> ? * @block_size: Maximum block size supported by the controller -> ? * @nr_masters: Number of AHB masters supported by the controller +> * @block_size: Maximum block size supported by the controller +> * @nr_masters: Number of AHB masters supported by the controller > - * @data_width: Maximum data width supported by hardware per AHB > master > - * (0 - 8bits, 1 - 16bits, ..., 5 - 256bits) > + * @data_width: Maximum data width supported by hardware (in bytes) -> ? */ -> ?struct dw_dma_platform_data { -> ? unsigned int nr_channels; +> */ +> struct dw_dma_platform_data { +> unsigned int nr_channels; > @@ -57,7 +56,7 @@ struct dw_dma_platform_data { -> ? unsigned char chan_priority; -> ? unsigned short block_size; -> ? unsigned char nr_masters; +> unsigned char chan_priority; +> unsigned short block_size; +> unsigned char nr_masters; > - unsigned char data_width[DW_DMA_MAX_NR_MASTERS]; > + unsigned char data_width; -> ?}; -> ? -> ?#endif /* _PLATFORM_DATA_DMA_DW_H */ +> }; +> +> #endif /* _PLATFORM_DATA_DMA_DW_H */ -- -Andy Shevchenko <andriy.shevchenko at linux.intel.com> +Andy Shevchenko <andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org> Intel Finland Oy + +-- +To unsubscribe from this list: send the line "unsubscribe devicetree" in +the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N2/content_digest index c30e2f0..4b42ae3 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,38 +1,54 @@ "ref\01453663322-14474-1-git-send-email-mans@mansr.com\0" "ref\01453663322-14474-8-git-send-email-mans@mansr.com\0" - "From\0andriy.shevchenko@linux.intel.com (Andy Shevchenko)\0" - "Subject\0[PATCH 07/15] dmaengine: dw: revisit data_width property\0" + "ref\01453663322-14474-8-git-send-email-mans-2StjZFpD7GcAvxtiuMwx3w@public.gmane.org\0" + "From\0Andy Shevchenko <andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>\0" + "Subject\0Re: [PATCH 07/15] dmaengine: dw: revisit data_width property\0" "Date\0Mon, 25 Jan 2016 10:42:21 +0200\0" - "To\0linux-snps-arc@lists.infradead.org\0" + "To\0Mans Rullgard <mans-2StjZFpD7GcAvxtiuMwx3w@public.gmane.org>" + Viresh Kumar <vireshk-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> + Vinod Koul <vinod.koul-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> + linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + " dmaengine-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0" + "Cc\0Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>" + Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org> + Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org> + Ian Campbell <ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org> + Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> + Vineet Gupta <vgupta-HKixBCOQz3hWk0Htik3J/w@public.gmane.org> + Russell King <linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org> + Dan Williams <dan.j.williams-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org> + devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + linux-snps-arc-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org + " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\0" "\00:1\0" "b\0" - "On Sun, 2016-01-24@19:21 +0000, Mans Rullgard wrote:\n" - "> From: Andy Shevchenko <andriy.shevchenko at linux.intel.com>\n" + "On Sun, 2016-01-24 at 19:21 +0000, Mans Rullgard wrote:\n" + "> From: Andy Shevchenko <andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>\n" "> \n" "> There are several changes are done here:\n" "> \n" - "> ?- Convert the property to be in bytes\n" + "> \302\240- Convert the property to be in bytes\n" "> \n" - "> ???Much more convenient than keeping encoded value.\n" + "> \302\240\302\240\302\240Much more convenient than keeping encoded value.\n" "> \n" - "> ?- Use one value for all AHB masters for now\n" + "> \302\240- Use one value for all AHB masters for now\n" "> \n" - "> ???It seems in practice we have no controllers where masters have\n" + "> \302\240\302\240\302\240It seems in practice we have no controllers where masters have\n" "> different\n" - "> ???data bus width, we still might return to distinct values when\n" + "> \302\240\302\240\302\240data bus width, we still might return to distinct values when\n" "> there is a use\n" - "> ???case.\n" + "> \302\240\302\240\302\240case.\n" "> \n" - "> ?- Rename data_width to data-width in the device tree bindings.\n" + "> \302\240- Rename data_width to data-width in the device tree bindings.\n" "> \n" - "> ?- While here, replace dwc_fast_ffs() by __ffs().\n" + "> \302\240- While here, replace dwc_fast_ffs() by __ffs().\n" "> \n" - "> Signed-off-by: Andy Shevchenko <andriy.shevchenko at linux.intel.com>\n" - "> Signed-off-by: Mans Rullgard <mans at mansr.com>\n" + "> Signed-off-by: Andy Shevchenko <andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>\n" + "> Signed-off-by: Mans Rullgard <mans-2StjZFpD7GcAvxtiuMwx3w@public.gmane.org>\n" "> ---\n" "> This patch changes the DT binding, so it should probably be amended\n" "> for\n" - "> compatibility with old device trees.??I've included it as is since I\n" + "> compatibility with old device trees.\302\240\302\240I've included it as is since I\n" "> think\n" "> the change as such is good.\n" "\n" @@ -50,15 +66,15 @@ "to support SPEAr SoCs.\n" "\n" "> ---\n" - "> ?Documentation/devicetree/bindings/dma/snps-dma.txt |??5 ++-\n" - "> ?arch/arc/boot/dts/abilis_tb10x.dtsi????????????????|??2 +-\n" - "> ?arch/arm/boot/dts/spear13xx.dtsi???????????????????|??4 +--\n" - "> ?drivers/dma/dw/core.c??????????????????????????????| 40 +++---------\n" + "> \302\240Documentation/devicetree/bindings/dma/snps-dma.txt |\302\240\302\2405 ++-\n" + "> \302\240arch/arc/boot/dts/abilis_tb10x.dtsi\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2402 +-\n" + "> \302\240arch/arm/boot/dts/spear13xx.dtsi\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2404 +--\n" + "> \302\240drivers/dma/dw/core.c\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240| 40 +++---------\n" "> ----------\n" - "> ?drivers/dma/dw/platform.c??????????????????????????|??8 ++---\n" - "> ?drivers/dma/dw/regs.h??????????????????????????????|??2 +-\n" - "> ?include/linux/platform_data/dma-dw.h???????????????|??5 ++-\n" - "> ?7 files changed, 16 insertions(+), 50 deletions(-)\n" + "> \302\240drivers/dma/dw/platform.c\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2408 ++---\n" + "> \302\240drivers/dma/dw/regs.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2402 +-\n" + "> \302\240include/linux/platform_data/dma-dw.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2405 ++-\n" + "> \302\2407 files changed, 16 insertions(+), 50 deletions(-)\n" "> \n" "> diff --git a/Documentation/devicetree/bindings/dma/snps-dma.txt\n" "> b/Documentation/devicetree/bindings/dma/snps-dma.txt\n" @@ -66,26 +82,26 @@ "> --- a/Documentation/devicetree/bindings/dma/snps-dma.txt\n" "> +++ b/Documentation/devicetree/bindings/dma/snps-dma.txt\n" "> @@ -13,8 +13,7 @@ Required properties:\n" - "> ?- chan_priority: priority of channels. 0 (default): increase from\n" + "> \302\240- chan_priority: priority of channels. 0 (default): increase from\n" "> chan 0->n, 1:\n" - "> ???increase from chan n->0\n" - "> ?- block_size: Maximum block size supported by the controller\n" + "> \302\240\302\240\302\240increase from chan n->0\n" + "> \302\240- block_size: Maximum block size supported by the controller\n" "> -- data_width: Maximum data width supported by hardware per AHB\n" "> master\n" - "> -??(0 - 8bits, 1 - 16bits, ..., 5 - 256bits)\n" + "> -\302\240\302\240(0 - 8bits, 1 - 16bits, ..., 5 - 256bits)\n" "> +- data-width: Maximum data width supported by hardware (in bytes)\n" - "> ?\n" - "> ?\n" - "> ?Optional properties:\n" + "> \302\240\n" + "> \302\240\n" + "> \302\240Optional properties:\n" "> @@ -38,7 +37,7 @@ Example:\n" - "> ?\t\tchan_allocation_order = <1>;\n" - "> ?\t\tchan_priority = <1>;\n" - "> ?\t\tblock_size = <0xfff>;\n" + "> \302\240\t\tchan_allocation_order = <1>;\n" + "> \302\240\t\tchan_priority = <1>;\n" + "> \302\240\t\tblock_size = <0xfff>;\n" "> -\t\tdata_width = <3 3>;\n" "> +\t\tdata-width = <8>;\n" - "> ?\t};\n" - "> ?\n" - "> ?DMA clients connected to the Designware DMA controller must use the\n" + "> \302\240\t};\n" + "> \302\240\n" + "> \302\240DMA clients connected to the Designware DMA controller must use the\n" "> format\n" "> diff --git a/arch/arc/boot/dts/abilis_tb10x.dtsi\n" "> b/arch/arc/boot/dts/abilis_tb10x.dtsi\n" @@ -93,54 +109,54 @@ "> --- a/arch/arc/boot/dts/abilis_tb10x.dtsi\n" "> +++ b/arch/arc/boot/dts/abilis_tb10x.dtsi\n" "> @@ -112,7 +112,7 @@\n" - "> ?\t\t\tchan_allocation_order = <0>;\n" - "> ?\t\t\tchan_priority = <1>;\n" - "> ?\t\t\tblock_size = <0x7ff>;\n" + "> \302\240\t\t\tchan_allocation_order = <0>;\n" + "> \302\240\t\t\tchan_priority = <1>;\n" + "> \302\240\t\t\tblock_size = <0x7ff>;\n" "> -\t\t\tdata_width = <2>;\n" "> +\t\t\tdata-width = <4>;\n" - "> ?\t\t\tclocks = <&ahb_clk>;\n" - "> ?\t\t\tclock-names = \"hclk\";\n" - "> ?\t\t};\n" + "> \302\240\t\t\tclocks = <&ahb_clk>;\n" + "> \302\240\t\t\tclock-names = \"hclk\";\n" + "> \302\240\t\t};\n" "> diff --git a/arch/arm/boot/dts/spear13xx.dtsi\n" "> b/arch/arm/boot/dts/spear13xx.dtsi\n" "> index 14594ce8c18a..474b66fa6a32 100644\n" "> --- a/arch/arm/boot/dts/spear13xx.dtsi\n" "> +++ b/arch/arm/boot/dts/spear13xx.dtsi\n" "> @@ -117,7 +117,7 @@\n" - "> ?\t\t\tchan_priority = <1>;\n" - "> ?\t\t\tblock_size = <0xfff>;\n" - "> ?\t\t\tdma-masters = <2>;\n" + "> \302\240\t\t\tchan_priority = <1>;\n" + "> \302\240\t\t\tblock_size = <0xfff>;\n" + "> \302\240\t\t\tdma-masters = <2>;\n" "> -\t\t\tdata_width = <3 3>;\n" "> +\t\t\tdata-width = <8>;\n" - "> ?\t\t};\n" - "> ?\n" - "> ?\t\tdma at eb000000 {\n" + "> \302\240\t\t};\n" + "> \302\240\n" + "> \302\240\t\tdma@eb000000 {\n" "> @@ -133,7 +133,7 @@\n" - "> ?\t\t\tchan_allocation_order = <1>;\n" - "> ?\t\t\tchan_priority = <1>;\n" - "> ?\t\t\tblock_size = <0xfff>;\n" + "> \302\240\t\t\tchan_allocation_order = <1>;\n" + "> \302\240\t\t\tchan_priority = <1>;\n" + "> \302\240\t\t\tblock_size = <0xfff>;\n" "> -\t\t\tdata_width = <3 3>;\n" "> +\t\t\tdata-width = <8>;\n" - "> ?\t\t};\n" - "> ?\n" - "> ?\t\tfsmc: flash at b0000000 {\n" + "> \302\240\t\t};\n" + "> \302\240\n" + "> \302\240\t\tfsmc: flash@b0000000 {\n" "> diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c\n" "> index 140ea59ec882..28278e4c77ad 100644\n" "> --- a/drivers/dma/dw/core.c\n" "> +++ b/drivers/dma/dw/core.c\n" "> @@ -168,21 +168,6 @@ static void dwc_initialize(struct dw_dma_chan\n" "> *dwc)\n" - "> ?\n" - "> ?/*----------------------------------------------------------------\n" + "> \302\240\n" + "> \302\240/*----------------------------------------------------------------\n" "> ------*/\n" - "> ?\n" + "> \302\240\n" "> -static inline unsigned int dwc_fast_ffs(unsigned long long v)\n" "> -{\n" "> -\t/*\n" - "> -\t?* We can be a lot more clever here, but this should take\n" + "> -\t\302\240* We can be a lot more clever here, but this should take\n" "> care\n" - "> -\t?* of the most common optimization.\n" - "> -\t?*/\n" + "> -\t\302\240* of the most common optimization.\n" + "> -\t\302\240*/\n" "> -\tif (!(v & 7))\n" "> -\t\treturn 3;\n" "> -\telse if (!(v & 3))\n" @@ -150,94 +166,94 @@ "> -\treturn 0;\n" "> -}\n" "> -\n" - "> ?static inline void dwc_dump_chan_regs(struct dw_dma_chan *dwc)\n" - "> ?{\n" - "> ?\tdev_err(chan2dev(&dwc->chan),\n" + "> \302\240static inline void dwc_dump_chan_regs(struct dw_dma_chan *dwc)\n" + "> \302\240{\n" + "> \302\240\tdev_err(chan2dev(&dwc->chan),\n" "> @@ -712,7 +697,6 @@ dwc_prep_dma_memcpy(struct dma_chan *chan,\n" "> dma_addr_t dest, dma_addr_t src,\n" - "> ?\tsize_t\t\t\toffset;\n" - "> ?\tunsigned int\t\tsrc_width;\n" - "> ?\tunsigned int\t\tdst_width;\n" + "> \302\240\tsize_t\t\t\toffset;\n" + "> \302\240\tunsigned int\t\tsrc_width;\n" + "> \302\240\tunsigned int\t\tdst_width;\n" "> -\tunsigned int\t\tdata_width;\n" - "> ?\tu32\t\t\tctllo;\n" - "> ?\n" - "> ?\tdev_vdbg(chan2dev(chan),\n" + "> \302\240\tu32\t\t\tctllo;\n" + "> \302\240\n" + "> \302\240\tdev_vdbg(chan2dev(chan),\n" "> @@ -726,10 +710,7 @@ dwc_prep_dma_memcpy(struct dma_chan *chan,\n" "> dma_addr_t dest, dma_addr_t src,\n" - "> ?\n" - "> ?\tdwc->direction = DMA_MEM_TO_MEM;\n" - "> ?\n" + "> \302\240\n" + "> \302\240\tdwc->direction = DMA_MEM_TO_MEM;\n" + "> \302\240\n" "> -\tdata_width = dw->data_width[dwc->m_master];\n" "> -\n" "> -\tsrc_width = dst_width = min_t(unsigned int, data_width,\n" - "> -\t\t\t\t??????dwc_fast_ffs(src | dest |\n" + "> -\t\t\t\t\302\240\302\240\302\240\302\240\302\240\302\240dwc_fast_ffs(src | dest |\n" "> len));\n" "> +\tsrc_width = dst_width = __ffs(dw->data_width | src | dest |\n" "> len);\n" - "> ?\n" - "> ?\tctllo = DWC_DEFAULT_CTLLO(chan)\n" - "> ?\t\t\t| DWC_CTLL_DST_WIDTH(dst_width)\n" + "> \302\240\n" + "> \302\240\tctllo = DWC_DEFAULT_CTLLO(chan)\n" + "> \302\240\t\t\t| DWC_CTLL_DST_WIDTH(dst_width)\n" "> @@ -792,7 +773,6 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct\n" "> scatterlist *sgl,\n" - "> ?\tdma_addr_t\t\treg;\n" - "> ?\tunsigned int\t\treg_width;\n" - "> ?\tunsigned int\t\tmem_width;\n" + "> \302\240\tdma_addr_t\t\treg;\n" + "> \302\240\tunsigned int\t\treg_width;\n" + "> \302\240\tunsigned int\t\tmem_width;\n" "> -\tunsigned int\t\tdata_width;\n" - "> ?\tunsigned int\t\ti;\n" - "> ?\tstruct scatterlist\t*sg;\n" - "> ?\tsize_t\t\t\ttotal_len = 0;\n" + "> \302\240\tunsigned int\t\ti;\n" + "> \302\240\tstruct scatterlist\t*sg;\n" + "> \302\240\tsize_t\t\t\ttotal_len = 0;\n" "> @@ -818,8 +798,6 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct\n" "> scatterlist *sgl,\n" - "> ?\t\tctllo |= sconfig->device_fc ?\n" + "> \302\240\t\tctllo |= sconfig->device_fc ?\n" "> DWC_CTLL_FC(DW_DMA_FC_P_M2P) :\n" - "> ?\t\t\tDWC_CTLL_FC(DW_DMA_FC_D_M2P);\n" - "> ?\n" + "> \302\240\t\t\tDWC_CTLL_FC(DW_DMA_FC_D_M2P);\n" + "> \302\240\n" "> -\t\tdata_width = dw->data_width[dwc->m_master];\n" "> -\n" - "> ?\t\tfor_each_sg(sgl, sg, sg_len, i) {\n" - "> ?\t\t\tstruct dw_desc\t*desc;\n" - "> ?\t\t\tu32\t\tlen, dlen, mem;\n" + "> \302\240\t\tfor_each_sg(sgl, sg, sg_len, i) {\n" + "> \302\240\t\t\tstruct dw_desc\t*desc;\n" + "> \302\240\t\t\tu32\t\tlen, dlen, mem;\n" "> @@ -827,8 +805,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct\n" "> scatterlist *sgl,\n" - "> ?\t\t\tmem = sg_dma_address(sg);\n" - "> ?\t\t\tlen = sg_dma_len(sg);\n" - "> ?\n" + "> \302\240\t\t\tmem = sg_dma_address(sg);\n" + "> \302\240\t\t\tlen = sg_dma_len(sg);\n" + "> \302\240\n" "> -\t\t\tmem_width = min_t(unsigned int,\n" - "> -\t\t\t\t\t??data_width,\n" + "> -\t\t\t\t\t\302\240\302\240data_width,\n" "> dwc_fast_ffs(mem | len));\n" "> +\t\t\tmem_width = __ffs(dw->data_width | mem |\n" "> len);\n" - "> ?\n" - "> ?slave_sg_todev_fill_desc:\n" - "> ?\t\t\tdesc = dwc_desc_get(dwc);\n" + "> \302\240\n" + "> \302\240slave_sg_todev_fill_desc:\n" + "> \302\240\t\t\tdesc = dwc_desc_get(dwc);\n" "> @@ -874,8 +851,6 @@ slave_sg_todev_fill_desc:\n" - "> ?\t\tctllo |= sconfig->device_fc ?\n" + "> \302\240\t\tctllo |= sconfig->device_fc ?\n" "> DWC_CTLL_FC(DW_DMA_FC_P_P2M) :\n" - "> ?\t\t\tDWC_CTLL_FC(DW_DMA_FC_D_P2M);\n" - "> ?\n" + "> \302\240\t\t\tDWC_CTLL_FC(DW_DMA_FC_D_P2M);\n" + "> \302\240\n" "> -\t\tdata_width = dw->data_width[dwc->m_master];\n" "> -\n" - "> ?\t\tfor_each_sg(sgl, sg, sg_len, i) {\n" - "> ?\t\t\tstruct dw_desc\t*desc;\n" - "> ?\t\t\tu32\t\tlen, dlen, mem;\n" + "> \302\240\t\tfor_each_sg(sgl, sg, sg_len, i) {\n" + "> \302\240\t\t\tstruct dw_desc\t*desc;\n" + "> \302\240\t\t\tu32\t\tlen, dlen, mem;\n" "> @@ -883,8 +858,7 @@ slave_sg_todev_fill_desc:\n" - "> ?\t\t\tmem = sg_dma_address(sg);\n" - "> ?\t\t\tlen = sg_dma_len(sg);\n" - "> ?\n" + "> \302\240\t\t\tmem = sg_dma_address(sg);\n" + "> \302\240\t\t\tlen = sg_dma_len(sg);\n" + "> \302\240\n" "> -\t\t\tmem_width = min_t(unsigned int,\n" - "> -\t\t\t\t\t??data_width,\n" + "> -\t\t\t\t\t\302\240\302\240data_width,\n" "> dwc_fast_ffs(mem | len));\n" "> +\t\t\tmem_width = __ffs(dw->data_width | mem |\n" "> len);\n" - "> ?\n" - "> ?slave_sg_fromdev_fill_desc:\n" - "> ?\t\t\tdesc = dwc_desc_get(dwc);\n" + "> \302\240\n" + "> \302\240slave_sg_fromdev_fill_desc:\n" + "> \302\240\t\t\tdesc = dwc_desc_get(dwc);\n" "> @@ -1531,10 +1505,7 @@ int dw_dma_probe(struct dw_dma_chip *chip,\n" "> struct dw_dma_platform_data *pdata)\n" - "> ?\t\t/* Get hardware configuration parameters */\n" - "> ?\t\tpdata->nr_channels = (dw_params >> DW_PARAMS_NR_CHAN\n" + "> \302\240\t\t/* Get hardware configuration parameters */\n" + "> \302\240\t\tpdata->nr_channels = (dw_params >> DW_PARAMS_NR_CHAN\n" "> & 7) + 1;\n" - "> ?\t\tpdata->nr_masters = (dw_params >>\n" + "> \302\240\t\tpdata->nr_masters = (dw_params >>\n" "> DW_PARAMS_NR_MASTER & 3) + 1;\n" "> -\t\tfor (i = 0; i < pdata->nr_masters; i++) {\n" "> -\t\t\tpdata->data_width[i] =\n" @@ -246,61 +262,61 @@ "> -\t\t}\n" "> +\t\tpdata->data_width = 4 << (dw_params >>\n" "> DW_PARAMS_DATA_WIDTH(0) & 3);\n" - "> ?\t\tmax_blk_size = dma_readl(dw, MAX_BLK_SIZE);\n" - "> ?\n" - "> ?\t\t/* Fill platform data with the default values */\n" + "> \302\240\t\tmax_blk_size = dma_readl(dw, MAX_BLK_SIZE);\n" + "> \302\240\n" + "> \302\240\t\t/* Fill platform data with the default values */\n" "> @@ -1556,8 +1527,7 @@ int dw_dma_probe(struct dw_dma_chip *chip,\n" "> struct dw_dma_platform_data *pdata)\n" - "> ?\n" - "> ?\t/* Get hardware configuration parameters */\n" - "> ?\tdw->nr_masters = pdata->nr_masters;\n" + "> \302\240\n" + "> \302\240\t/* Get hardware configuration parameters */\n" + "> \302\240\tdw->nr_masters = pdata->nr_masters;\n" "> -\tfor (i = 0; i < dw->nr_masters; i++)\n" "> -\t\tdw->data_width[i] = pdata->data_width[i];\n" "> +\tdw->data_width = pdata->data_width;\n" - "> ?\n" - "> ?\t/* Calculate all channel mask before DMA setup */\n" - "> ?\tdw->all_chan_mask = (1 << pdata->nr_channels) - 1;\n" + "> \302\240\n" + "> \302\240\t/* Calculate all channel mask before DMA setup */\n" + "> \302\240\tdw->all_chan_mask = (1 << pdata->nr_channels) - 1;\n" "> diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c\n" "> index d3e1abcebd7f..89d0461f5dcc 100644\n" "> --- a/drivers/dma/dw/platform.c\n" "> +++ b/drivers/dma/dw/platform.c\n" "> @@ -102,8 +102,8 @@ dw_dma_parse_dt(struct platform_device *pdev)\n" - "> ?{\n" - "> ?\tstruct device_node *np = pdev->dev.of_node;\n" - "> ?\tstruct dw_dma_platform_data *pdata;\n" + "> \302\240{\n" + "> \302\240\tstruct device_node *np = pdev->dev.of_node;\n" + "> \302\240\tstruct dw_dma_platform_data *pdata;\n" "> -\tu32 tmp, arr[DW_DMA_MAX_NR_MASTERS];\n" - "> ?\tu32 nr_channels;\n" + "> \302\240\tu32 nr_channels;\n" "> +\tu32 tmp;\n" - "> ?\n" - "> ?\tif (!np) {\n" - "> ?\t\tdev_err(&pdev->dev, \"Missing DT data\\n\");\n" + "> \302\240\n" + "> \302\240\tif (!np) {\n" + "> \302\240\t\tdev_err(&pdev->dev, \"Missing DT data\\n\");\n" "> @@ -138,10 +138,8 @@ dw_dma_parse_dt(struct platform_device *pdev)\n" - "> ?\t\tpdata->nr_masters = tmp;\n" - "> ?\t}\n" - "> ?\n" + "> \302\240\t\tpdata->nr_masters = tmp;\n" + "> \302\240\t}\n" + "> \302\240\n" "> -\tif (!of_property_read_u32_array(np, \"data_width\", arr,\n" "> -\t\t\t\tpdata->nr_masters))\n" "> -\t\tfor (tmp = 0; tmp < pdata->nr_masters; tmp++)\n" "> -\t\t\tpdata->data_width[tmp] = arr[tmp];\n" "> +\tif (!of_property_read_u32(np, \"data-width\", &tmp))\n" "> +\t\tpdata->data_width = tmp;\n" - "> ?\n" - "> ?\treturn pdata;\n" - "> ?}\n" + "> \302\240\n" + "> \302\240\treturn pdata;\n" + "> \302\240}\n" "> diff --git a/drivers/dma/dw/regs.h b/drivers/dma/dw/regs.h\n" "> index e4b277565165..87bc97fca084 100644\n" "> --- a/drivers/dma/dw/regs.h\n" "> +++ b/drivers/dma/dw/regs.h\n" "> @@ -285,7 +285,7 @@ struct dw_dma {\n" - "> ?\n" - "> ?\t/* hardware configuration */\n" - "> ?\tunsigned char\t\tnr_masters;\n" + "> \302\240\n" + "> \302\240\t/* hardware configuration */\n" + "> \302\240\tunsigned char\t\tnr_masters;\n" "> -\tunsigned char\t\tdata_width[DW_DMA_MAX_NR_MASTER\n" "> S];\n" "> +\tunsigned char\t\tdata_width;\n" - "> ?};\n" - "> ?\n" - "> ?static inline struct dw_dma_regs __iomem *__dw_regs(struct dw_dma\n" + "> \302\240};\n" + "> \302\240\n" + "> \302\240static inline struct dw_dma_regs __iomem *__dw_regs(struct dw_dma\n" "> *dw)\n" "> diff --git a/include/linux/platform_data/dma-dw.h\n" "> b/include/linux/platform_data/dma-dw.h\n" @@ -308,29 +324,34 @@ "> --- a/include/linux/platform_data/dma-dw.h\n" "> +++ b/include/linux/platform_data/dma-dw.h\n" "> @@ -42,8 +42,7 @@ struct dw_dma_slave {\n" - "> ? * @chan_priority: Set channel priority increasing from 0 to 7 or 7\n" + "> \302\240 * @chan_priority: Set channel priority increasing from 0 to 7 or 7\n" "> to 0.\n" - "> ? * @block_size: Maximum block size supported by the controller\n" - "> ? * @nr_masters: Number of AHB masters supported by the controller\n" + "> \302\240 * @block_size: Maximum block size supported by the controller\n" + "> \302\240 * @nr_masters: Number of AHB masters supported by the controller\n" "> - * @data_width: Maximum data width supported by hardware per AHB\n" "> master\n" "> - *\t\t(0 - 8bits, 1 - 16bits, ..., 5 - 256bits)\n" "> + * @data_width: Maximum data width supported by hardware (in bytes)\n" - "> ? */\n" - "> ?struct dw_dma_platform_data {\n" - "> ?\tunsigned int\tnr_channels;\n" + "> \302\240 */\n" + "> \302\240struct dw_dma_platform_data {\n" + "> \302\240\tunsigned int\tnr_channels;\n" "> @@ -57,7 +56,7 @@ struct dw_dma_platform_data {\n" - "> ?\tunsigned char\tchan_priority;\n" - "> ?\tunsigned short\tblock_size;\n" - "> ?\tunsigned char\tnr_masters;\n" + "> \302\240\tunsigned char\tchan_priority;\n" + "> \302\240\tunsigned short\tblock_size;\n" + "> \302\240\tunsigned char\tnr_masters;\n" "> -\tunsigned char\tdata_width[DW_DMA_MAX_NR_MASTERS];\n" "> +\tunsigned char\tdata_width;\n" - "> ?};\n" - "> ?\n" - "> ?#endif /* _PLATFORM_DATA_DMA_DW_H */\n" + "> \302\240};\n" + "> \302\240\n" + "> \302\240#endif /* _PLATFORM_DATA_DMA_DW_H */\n" "\n" "-- \n" - "Andy Shevchenko <andriy.shevchenko at linux.intel.com>\n" - Intel Finland Oy + "Andy Shevchenko <andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>\n" + "Intel Finland Oy\n" + "\n" + "--\n" + "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" + "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + More majordomo info at http://vger.kernel.org/majordomo-info.html -c92e696dd1f95840f5e5b093951a8ffe6cb667b2a28ba86ba2c023ec5e36824c +ab595e8be9d011c0a5590a8bbc649bb76581054309a1759ee5736ae1bccdf889
diff --git a/a/1.txt b/N3/1.txt index 691de60..78f8f98 100644 --- a/a/1.txt +++ b/N3/1.txt @@ -1,30 +1,30 @@ -On Sun, 2016-01-24@19:21 +0000, Mans Rullgard wrote: -> From: Andy Shevchenko <andriy.shevchenko at linux.intel.com> +On Sun, 2016-01-24 at 19:21 +0000, Mans Rullgard wrote: +> From: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > > There are several changes are done here: > -> ?- Convert the property to be in bytes +> - Convert the property to be in bytes > -> ???Much more convenient than keeping encoded value. +> Much more convenient than keeping encoded value. > -> ?- Use one value for all AHB masters for now +> - Use one value for all AHB masters for now > -> ???It seems in practice we have no controllers where masters have +> It seems in practice we have no controllers where masters have > different -> ???data bus width, we still might return to distinct values when +> data bus width, we still might return to distinct values when > there is a use -> ???case. +> case. > -> ?- Rename data_width to data-width in the device tree bindings. +> - Rename data_width to data-width in the device tree bindings. > -> ?- While here, replace dwc_fast_ffs() by __ffs(). +> - While here, replace dwc_fast_ffs() by __ffs(). > -> Signed-off-by: Andy Shevchenko <andriy.shevchenko at linux.intel.com> -> Signed-off-by: Mans Rullgard <mans at mansr.com> +> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> +> Signed-off-by: Mans Rullgard <mans@mansr.com> > --- > This patch changes the DT binding, so it should probably be amended > for -> compatibility with old device trees.??I've included it as is since I +> compatibility with old device trees. I've included it as is since I > think > the change as such is good. @@ -42,15 +42,15 @@ I any case Viresh might comment on this since it was his code regarding to support SPEAr SoCs. > --- -> ?Documentation/devicetree/bindings/dma/snps-dma.txt |??5 ++- -> ?arch/arc/boot/dts/abilis_tb10x.dtsi????????????????|??2 +- -> ?arch/arm/boot/dts/spear13xx.dtsi???????????????????|??4 +-- -> ?drivers/dma/dw/core.c??????????????????????????????| 40 +++--------- +> Documentation/devicetree/bindings/dma/snps-dma.txt | 5 ++- +> arch/arc/boot/dts/abilis_tb10x.dtsi | 2 +- +> arch/arm/boot/dts/spear13xx.dtsi | 4 +-- +> drivers/dma/dw/core.c | 40 +++--------- > ---------- -> ?drivers/dma/dw/platform.c??????????????????????????|??8 ++--- -> ?drivers/dma/dw/regs.h??????????????????????????????|??2 +- -> ?include/linux/platform_data/dma-dw.h???????????????|??5 ++- -> ?7 files changed, 16 insertions(+), 50 deletions(-) +> drivers/dma/dw/platform.c | 8 ++--- +> drivers/dma/dw/regs.h | 2 +- +> include/linux/platform_data/dma-dw.h | 5 ++- +> 7 files changed, 16 insertions(+), 50 deletions(-) > > diff --git a/Documentation/devicetree/bindings/dma/snps-dma.txt > b/Documentation/devicetree/bindings/dma/snps-dma.txt @@ -58,26 +58,26 @@ to support SPEAr SoCs. > --- a/Documentation/devicetree/bindings/dma/snps-dma.txt > +++ b/Documentation/devicetree/bindings/dma/snps-dma.txt > @@ -13,8 +13,7 @@ Required properties: -> ?- chan_priority: priority of channels. 0 (default): increase from +> - chan_priority: priority of channels. 0 (default): increase from > chan 0->n, 1: -> ???increase from chan n->0 -> ?- block_size: Maximum block size supported by the controller +> increase from chan n->0 +> - block_size: Maximum block size supported by the controller > -- data_width: Maximum data width supported by hardware per AHB > master -> -??(0 - 8bits, 1 - 16bits, ..., 5 - 256bits) +> - (0 - 8bits, 1 - 16bits, ..., 5 - 256bits) > +- data-width: Maximum data width supported by hardware (in bytes) -> ? -> ? -> ?Optional properties: +> +> +> Optional properties: > @@ -38,7 +37,7 @@ Example: -> ? chan_allocation_order = <1>; -> ? chan_priority = <1>; -> ? block_size = <0xfff>; +> chan_allocation_order = <1>; +> chan_priority = <1>; +> block_size = <0xfff>; > - data_width = <3 3>; > + data-width = <8>; -> ? }; -> ? -> ?DMA clients connected to the Designware DMA controller must use the +> }; +> +> DMA clients connected to the Designware DMA controller must use the > format > diff --git a/arch/arc/boot/dts/abilis_tb10x.dtsi > b/arch/arc/boot/dts/abilis_tb10x.dtsi @@ -85,54 +85,54 @@ to support SPEAr SoCs. > --- a/arch/arc/boot/dts/abilis_tb10x.dtsi > +++ b/arch/arc/boot/dts/abilis_tb10x.dtsi > @@ -112,7 +112,7 @@ -> ? chan_allocation_order = <0>; -> ? chan_priority = <1>; -> ? block_size = <0x7ff>; +> chan_allocation_order = <0>; +> chan_priority = <1>; +> block_size = <0x7ff>; > - data_width = <2>; > + data-width = <4>; -> ? clocks = <&ahb_clk>; -> ? clock-names = "hclk"; -> ? }; +> clocks = <&ahb_clk>; +> clock-names = "hclk"; +> }; > diff --git a/arch/arm/boot/dts/spear13xx.dtsi > b/arch/arm/boot/dts/spear13xx.dtsi > index 14594ce8c18a..474b66fa6a32 100644 > --- a/arch/arm/boot/dts/spear13xx.dtsi > +++ b/arch/arm/boot/dts/spear13xx.dtsi > @@ -117,7 +117,7 @@ -> ? chan_priority = <1>; -> ? block_size = <0xfff>; -> ? dma-masters = <2>; +> chan_priority = <1>; +> block_size = <0xfff>; +> dma-masters = <2>; > - data_width = <3 3>; > + data-width = <8>; -> ? }; -> ? -> ? dma at eb000000 { +> }; +> +> dma@eb000000 { > @@ -133,7 +133,7 @@ -> ? chan_allocation_order = <1>; -> ? chan_priority = <1>; -> ? block_size = <0xfff>; +> chan_allocation_order = <1>; +> chan_priority = <1>; +> block_size = <0xfff>; > - data_width = <3 3>; > + data-width = <8>; -> ? }; -> ? -> ? fsmc: flash at b0000000 { +> }; +> +> fsmc: flash@b0000000 { > diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c > index 140ea59ec882..28278e4c77ad 100644 > --- a/drivers/dma/dw/core.c > +++ b/drivers/dma/dw/core.c > @@ -168,21 +168,6 @@ static void dwc_initialize(struct dw_dma_chan > *dwc) -> ? -> ?/*---------------------------------------------------------------- +> +> /*---------------------------------------------------------------- > ------*/ -> ? +> > -static inline unsigned int dwc_fast_ffs(unsigned long long v) > -{ > - /* -> - ?* We can be a lot more clever here, but this should take +> - * We can be a lot more clever here, but this should take > care -> - ?* of the most common optimization. -> - ?*/ +> - * of the most common optimization. +> - */ > - if (!(v & 7)) > - return 3; > - else if (!(v & 3)) @@ -142,94 +142,94 @@ to support SPEAr SoCs. > - return 0; > -} > - -> ?static inline void dwc_dump_chan_regs(struct dw_dma_chan *dwc) -> ?{ -> ? dev_err(chan2dev(&dwc->chan), +> static inline void dwc_dump_chan_regs(struct dw_dma_chan *dwc) +> { +> dev_err(chan2dev(&dwc->chan), > @@ -712,7 +697,6 @@ dwc_prep_dma_memcpy(struct dma_chan *chan, > dma_addr_t dest, dma_addr_t src, -> ? size_t offset; -> ? unsigned int src_width; -> ? unsigned int dst_width; +> size_t offset; +> unsigned int src_width; +> unsigned int dst_width; > - unsigned int data_width; -> ? u32 ctllo; -> ? -> ? dev_vdbg(chan2dev(chan), +> u32 ctllo; +> +> dev_vdbg(chan2dev(chan), > @@ -726,10 +710,7 @@ dwc_prep_dma_memcpy(struct dma_chan *chan, > dma_addr_t dest, dma_addr_t src, -> ? -> ? dwc->direction = DMA_MEM_TO_MEM; -> ? +> +> dwc->direction = DMA_MEM_TO_MEM; +> > - data_width = dw->data_width[dwc->m_master]; > - > - src_width = dst_width = min_t(unsigned int, data_width, -> - ??????dwc_fast_ffs(src | dest | +> - dwc_fast_ffs(src | dest | > len)); > + src_width = dst_width = __ffs(dw->data_width | src | dest | > len); -> ? -> ? ctllo = DWC_DEFAULT_CTLLO(chan) -> ? | DWC_CTLL_DST_WIDTH(dst_width) +> +> ctllo = DWC_DEFAULT_CTLLO(chan) +> | DWC_CTLL_DST_WIDTH(dst_width) > @@ -792,7 +773,6 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct > scatterlist *sgl, -> ? dma_addr_t reg; -> ? unsigned int reg_width; -> ? unsigned int mem_width; +> dma_addr_t reg; +> unsigned int reg_width; +> unsigned int mem_width; > - unsigned int data_width; -> ? unsigned int i; -> ? struct scatterlist *sg; -> ? size_t total_len = 0; +> unsigned int i; +> struct scatterlist *sg; +> size_t total_len = 0; > @@ -818,8 +798,6 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct > scatterlist *sgl, -> ? ctllo |= sconfig->device_fc ? +> ctllo |= sconfig->device_fc ? > DWC_CTLL_FC(DW_DMA_FC_P_M2P) : -> ? DWC_CTLL_FC(DW_DMA_FC_D_M2P); -> ? +> DWC_CTLL_FC(DW_DMA_FC_D_M2P); +> > - data_width = dw->data_width[dwc->m_master]; > - -> ? for_each_sg(sgl, sg, sg_len, i) { -> ? struct dw_desc *desc; -> ? u32 len, dlen, mem; +> for_each_sg(sgl, sg, sg_len, i) { +> struct dw_desc *desc; +> u32 len, dlen, mem; > @@ -827,8 +805,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct > scatterlist *sgl, -> ? mem = sg_dma_address(sg); -> ? len = sg_dma_len(sg); -> ? +> mem = sg_dma_address(sg); +> len = sg_dma_len(sg); +> > - mem_width = min_t(unsigned int, -> - ??data_width, +> - data_width, > dwc_fast_ffs(mem | len)); > + mem_width = __ffs(dw->data_width | mem | > len); -> ? -> ?slave_sg_todev_fill_desc: -> ? desc = dwc_desc_get(dwc); +> +> slave_sg_todev_fill_desc: +> desc = dwc_desc_get(dwc); > @@ -874,8 +851,6 @@ slave_sg_todev_fill_desc: -> ? ctllo |= sconfig->device_fc ? +> ctllo |= sconfig->device_fc ? > DWC_CTLL_FC(DW_DMA_FC_P_P2M) : -> ? DWC_CTLL_FC(DW_DMA_FC_D_P2M); -> ? +> DWC_CTLL_FC(DW_DMA_FC_D_P2M); +> > - data_width = dw->data_width[dwc->m_master]; > - -> ? for_each_sg(sgl, sg, sg_len, i) { -> ? struct dw_desc *desc; -> ? u32 len, dlen, mem; +> for_each_sg(sgl, sg, sg_len, i) { +> struct dw_desc *desc; +> u32 len, dlen, mem; > @@ -883,8 +858,7 @@ slave_sg_todev_fill_desc: -> ? mem = sg_dma_address(sg); -> ? len = sg_dma_len(sg); -> ? +> mem = sg_dma_address(sg); +> len = sg_dma_len(sg); +> > - mem_width = min_t(unsigned int, -> - ??data_width, +> - data_width, > dwc_fast_ffs(mem | len)); > + mem_width = __ffs(dw->data_width | mem | > len); -> ? -> ?slave_sg_fromdev_fill_desc: -> ? desc = dwc_desc_get(dwc); +> +> slave_sg_fromdev_fill_desc: +> desc = dwc_desc_get(dwc); > @@ -1531,10 +1505,7 @@ int dw_dma_probe(struct dw_dma_chip *chip, > struct dw_dma_platform_data *pdata) -> ? /* Get hardware configuration parameters */ -> ? pdata->nr_channels = (dw_params >> DW_PARAMS_NR_CHAN +> /* Get hardware configuration parameters */ +> pdata->nr_channels = (dw_params >> DW_PARAMS_NR_CHAN > & 7) + 1; -> ? pdata->nr_masters = (dw_params >> +> pdata->nr_masters = (dw_params >> > DW_PARAMS_NR_MASTER & 3) + 1; > - for (i = 0; i < pdata->nr_masters; i++) { > - pdata->data_width[i] = @@ -238,61 +238,61 @@ to support SPEAr SoCs. > - } > + pdata->data_width = 4 << (dw_params >> > DW_PARAMS_DATA_WIDTH(0) & 3); -> ? max_blk_size = dma_readl(dw, MAX_BLK_SIZE); -> ? -> ? /* Fill platform data with the default values */ +> max_blk_size = dma_readl(dw, MAX_BLK_SIZE); +> +> /* Fill platform data with the default values */ > @@ -1556,8 +1527,7 @@ int dw_dma_probe(struct dw_dma_chip *chip, > struct dw_dma_platform_data *pdata) -> ? -> ? /* Get hardware configuration parameters */ -> ? dw->nr_masters = pdata->nr_masters; +> +> /* Get hardware configuration parameters */ +> dw->nr_masters = pdata->nr_masters; > - for (i = 0; i < dw->nr_masters; i++) > - dw->data_width[i] = pdata->data_width[i]; > + dw->data_width = pdata->data_width; -> ? -> ? /* Calculate all channel mask before DMA setup */ -> ? dw->all_chan_mask = (1 << pdata->nr_channels) - 1; +> +> /* Calculate all channel mask before DMA setup */ +> dw->all_chan_mask = (1 << pdata->nr_channels) - 1; > diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c > index d3e1abcebd7f..89d0461f5dcc 100644 > --- a/drivers/dma/dw/platform.c > +++ b/drivers/dma/dw/platform.c > @@ -102,8 +102,8 @@ dw_dma_parse_dt(struct platform_device *pdev) -> ?{ -> ? struct device_node *np = pdev->dev.of_node; -> ? struct dw_dma_platform_data *pdata; +> { +> struct device_node *np = pdev->dev.of_node; +> struct dw_dma_platform_data *pdata; > - u32 tmp, arr[DW_DMA_MAX_NR_MASTERS]; -> ? u32 nr_channels; +> u32 nr_channels; > + u32 tmp; -> ? -> ? if (!np) { -> ? dev_err(&pdev->dev, "Missing DT data\n"); +> +> if (!np) { +> dev_err(&pdev->dev, "Missing DT data\n"); > @@ -138,10 +138,8 @@ dw_dma_parse_dt(struct platform_device *pdev) -> ? pdata->nr_masters = tmp; -> ? } -> ? +> pdata->nr_masters = tmp; +> } +> > - if (!of_property_read_u32_array(np, "data_width", arr, > - pdata->nr_masters)) > - for (tmp = 0; tmp < pdata->nr_masters; tmp++) > - pdata->data_width[tmp] = arr[tmp]; > + if (!of_property_read_u32(np, "data-width", &tmp)) > + pdata->data_width = tmp; -> ? -> ? return pdata; -> ?} +> +> return pdata; +> } > diff --git a/drivers/dma/dw/regs.h b/drivers/dma/dw/regs.h > index e4b277565165..87bc97fca084 100644 > --- a/drivers/dma/dw/regs.h > +++ b/drivers/dma/dw/regs.h > @@ -285,7 +285,7 @@ struct dw_dma { -> ? -> ? /* hardware configuration */ -> ? unsigned char nr_masters; +> +> /* hardware configuration */ +> unsigned char nr_masters; > - unsigned char data_width[DW_DMA_MAX_NR_MASTER > S]; > + unsigned char data_width; -> ?}; -> ? -> ?static inline struct dw_dma_regs __iomem *__dw_regs(struct dw_dma +> }; +> +> static inline struct dw_dma_regs __iomem *__dw_regs(struct dw_dma > *dw) > diff --git a/include/linux/platform_data/dma-dw.h > b/include/linux/platform_data/dma-dw.h @@ -300,27 +300,27 @@ to support SPEAr SoCs. > --- a/include/linux/platform_data/dma-dw.h > +++ b/include/linux/platform_data/dma-dw.h > @@ -42,8 +42,7 @@ struct dw_dma_slave { -> ? * @chan_priority: Set channel priority increasing from 0 to 7 or 7 +> * @chan_priority: Set channel priority increasing from 0 to 7 or 7 > to 0. -> ? * @block_size: Maximum block size supported by the controller -> ? * @nr_masters: Number of AHB masters supported by the controller +> * @block_size: Maximum block size supported by the controller +> * @nr_masters: Number of AHB masters supported by the controller > - * @data_width: Maximum data width supported by hardware per AHB > master > - * (0 - 8bits, 1 - 16bits, ..., 5 - 256bits) > + * @data_width: Maximum data width supported by hardware (in bytes) -> ? */ -> ?struct dw_dma_platform_data { -> ? unsigned int nr_channels; +> */ +> struct dw_dma_platform_data { +> unsigned int nr_channels; > @@ -57,7 +56,7 @@ struct dw_dma_platform_data { -> ? unsigned char chan_priority; -> ? unsigned short block_size; -> ? unsigned char nr_masters; +> unsigned char chan_priority; +> unsigned short block_size; +> unsigned char nr_masters; > - unsigned char data_width[DW_DMA_MAX_NR_MASTERS]; > + unsigned char data_width; -> ?}; -> ? -> ?#endif /* _PLATFORM_DATA_DMA_DW_H */ +> }; +> +> #endif /* _PLATFORM_DATA_DMA_DW_H */ -- -Andy Shevchenko <andriy.shevchenko at linux.intel.com> +Andy Shevchenko <andriy.shevchenko@linux.intel.com> Intel Finland Oy diff --git a/a/content_digest b/N3/content_digest index c30e2f0..79ea887 100644 --- a/a/content_digest +++ b/N3/content_digest @@ -1,38 +1,53 @@ "ref\01453663322-14474-1-git-send-email-mans@mansr.com\0" "ref\01453663322-14474-8-git-send-email-mans@mansr.com\0" - "From\0andriy.shevchenko@linux.intel.com (Andy Shevchenko)\0" - "Subject\0[PATCH 07/15] dmaengine: dw: revisit data_width property\0" + "From\0Andy Shevchenko <andriy.shevchenko@linux.intel.com>\0" + "Subject\0Re: [PATCH 07/15] dmaengine: dw: revisit data_width property\0" "Date\0Mon, 25 Jan 2016 10:42:21 +0200\0" - "To\0linux-snps-arc@lists.infradead.org\0" + "To\0Mans Rullgard <mans@mansr.com>" + Viresh Kumar <vireshk@kernel.org> + Vinod Koul <vinod.koul@intel.com> + linux-kernel@vger.kernel.org + " dmaengine@vger.kernel.org\0" + "Cc\0Rob Herring <robh+dt@kernel.org>" + Pawel Moll <pawel.moll@arm.com> + Mark Rutland <mark.rutland@arm.com> + Ian Campbell <ijc+devicetree@hellion.org.uk> + Kumar Gala <galak@codeaurora.org> + Vineet Gupta <vgupta@synopsys.com> + Russell King <linux@arm.linux.org.uk> + Dan Williams <dan.j.williams@intel.com> + devicetree@vger.kernel.org + linux-snps-arc@lists.infradead.org + " linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" - "On Sun, 2016-01-24@19:21 +0000, Mans Rullgard wrote:\n" - "> From: Andy Shevchenko <andriy.shevchenko at linux.intel.com>\n" + "On Sun, 2016-01-24 at 19:21 +0000, Mans Rullgard wrote:\n" + "> From: Andy Shevchenko <andriy.shevchenko@linux.intel.com>\n" "> \n" "> There are several changes are done here:\n" "> \n" - "> ?- Convert the property to be in bytes\n" + "> \302\240- Convert the property to be in bytes\n" "> \n" - "> ???Much more convenient than keeping encoded value.\n" + "> \302\240\302\240\302\240Much more convenient than keeping encoded value.\n" "> \n" - "> ?- Use one value for all AHB masters for now\n" + "> \302\240- Use one value for all AHB masters for now\n" "> \n" - "> ???It seems in practice we have no controllers where masters have\n" + "> \302\240\302\240\302\240It seems in practice we have no controllers where masters have\n" "> different\n" - "> ???data bus width, we still might return to distinct values when\n" + "> \302\240\302\240\302\240data bus width, we still might return to distinct values when\n" "> there is a use\n" - "> ???case.\n" + "> \302\240\302\240\302\240case.\n" "> \n" - "> ?- Rename data_width to data-width in the device tree bindings.\n" + "> \302\240- Rename data_width to data-width in the device tree bindings.\n" "> \n" - "> ?- While here, replace dwc_fast_ffs() by __ffs().\n" + "> \302\240- While here, replace dwc_fast_ffs() by __ffs().\n" "> \n" - "> Signed-off-by: Andy Shevchenko <andriy.shevchenko at linux.intel.com>\n" - "> Signed-off-by: Mans Rullgard <mans at mansr.com>\n" + "> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>\n" + "> Signed-off-by: Mans Rullgard <mans@mansr.com>\n" "> ---\n" "> This patch changes the DT binding, so it should probably be amended\n" "> for\n" - "> compatibility with old device trees.??I've included it as is since I\n" + "> compatibility with old device trees.\302\240\302\240I've included it as is since I\n" "> think\n" "> the change as such is good.\n" "\n" @@ -50,15 +65,15 @@ "to support SPEAr SoCs.\n" "\n" "> ---\n" - "> ?Documentation/devicetree/bindings/dma/snps-dma.txt |??5 ++-\n" - "> ?arch/arc/boot/dts/abilis_tb10x.dtsi????????????????|??2 +-\n" - "> ?arch/arm/boot/dts/spear13xx.dtsi???????????????????|??4 +--\n" - "> ?drivers/dma/dw/core.c??????????????????????????????| 40 +++---------\n" + "> \302\240Documentation/devicetree/bindings/dma/snps-dma.txt |\302\240\302\2405 ++-\n" + "> \302\240arch/arc/boot/dts/abilis_tb10x.dtsi\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2402 +-\n" + "> \302\240arch/arm/boot/dts/spear13xx.dtsi\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2404 +--\n" + "> \302\240drivers/dma/dw/core.c\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240| 40 +++---------\n" "> ----------\n" - "> ?drivers/dma/dw/platform.c??????????????????????????|??8 ++---\n" - "> ?drivers/dma/dw/regs.h??????????????????????????????|??2 +-\n" - "> ?include/linux/platform_data/dma-dw.h???????????????|??5 ++-\n" - "> ?7 files changed, 16 insertions(+), 50 deletions(-)\n" + "> \302\240drivers/dma/dw/platform.c\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2408 ++---\n" + "> \302\240drivers/dma/dw/regs.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2402 +-\n" + "> \302\240include/linux/platform_data/dma-dw.h\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240|\302\240\302\2405 ++-\n" + "> \302\2407 files changed, 16 insertions(+), 50 deletions(-)\n" "> \n" "> diff --git a/Documentation/devicetree/bindings/dma/snps-dma.txt\n" "> b/Documentation/devicetree/bindings/dma/snps-dma.txt\n" @@ -66,26 +81,26 @@ "> --- a/Documentation/devicetree/bindings/dma/snps-dma.txt\n" "> +++ b/Documentation/devicetree/bindings/dma/snps-dma.txt\n" "> @@ -13,8 +13,7 @@ Required properties:\n" - "> ?- chan_priority: priority of channels. 0 (default): increase from\n" + "> \302\240- chan_priority: priority of channels. 0 (default): increase from\n" "> chan 0->n, 1:\n" - "> ???increase from chan n->0\n" - "> ?- block_size: Maximum block size supported by the controller\n" + "> \302\240\302\240\302\240increase from chan n->0\n" + "> \302\240- block_size: Maximum block size supported by the controller\n" "> -- data_width: Maximum data width supported by hardware per AHB\n" "> master\n" - "> -??(0 - 8bits, 1 - 16bits, ..., 5 - 256bits)\n" + "> -\302\240\302\240(0 - 8bits, 1 - 16bits, ..., 5 - 256bits)\n" "> +- data-width: Maximum data width supported by hardware (in bytes)\n" - "> ?\n" - "> ?\n" - "> ?Optional properties:\n" + "> \302\240\n" + "> \302\240\n" + "> \302\240Optional properties:\n" "> @@ -38,7 +37,7 @@ Example:\n" - "> ?\t\tchan_allocation_order = <1>;\n" - "> ?\t\tchan_priority = <1>;\n" - "> ?\t\tblock_size = <0xfff>;\n" + "> \302\240\t\tchan_allocation_order = <1>;\n" + "> \302\240\t\tchan_priority = <1>;\n" + "> \302\240\t\tblock_size = <0xfff>;\n" "> -\t\tdata_width = <3 3>;\n" "> +\t\tdata-width = <8>;\n" - "> ?\t};\n" - "> ?\n" - "> ?DMA clients connected to the Designware DMA controller must use the\n" + "> \302\240\t};\n" + "> \302\240\n" + "> \302\240DMA clients connected to the Designware DMA controller must use the\n" "> format\n" "> diff --git a/arch/arc/boot/dts/abilis_tb10x.dtsi\n" "> b/arch/arc/boot/dts/abilis_tb10x.dtsi\n" @@ -93,54 +108,54 @@ "> --- a/arch/arc/boot/dts/abilis_tb10x.dtsi\n" "> +++ b/arch/arc/boot/dts/abilis_tb10x.dtsi\n" "> @@ -112,7 +112,7 @@\n" - "> ?\t\t\tchan_allocation_order = <0>;\n" - "> ?\t\t\tchan_priority = <1>;\n" - "> ?\t\t\tblock_size = <0x7ff>;\n" + "> \302\240\t\t\tchan_allocation_order = <0>;\n" + "> \302\240\t\t\tchan_priority = <1>;\n" + "> \302\240\t\t\tblock_size = <0x7ff>;\n" "> -\t\t\tdata_width = <2>;\n" "> +\t\t\tdata-width = <4>;\n" - "> ?\t\t\tclocks = <&ahb_clk>;\n" - "> ?\t\t\tclock-names = \"hclk\";\n" - "> ?\t\t};\n" + "> \302\240\t\t\tclocks = <&ahb_clk>;\n" + "> \302\240\t\t\tclock-names = \"hclk\";\n" + "> \302\240\t\t};\n" "> diff --git a/arch/arm/boot/dts/spear13xx.dtsi\n" "> b/arch/arm/boot/dts/spear13xx.dtsi\n" "> index 14594ce8c18a..474b66fa6a32 100644\n" "> --- a/arch/arm/boot/dts/spear13xx.dtsi\n" "> +++ b/arch/arm/boot/dts/spear13xx.dtsi\n" "> @@ -117,7 +117,7 @@\n" - "> ?\t\t\tchan_priority = <1>;\n" - "> ?\t\t\tblock_size = <0xfff>;\n" - "> ?\t\t\tdma-masters = <2>;\n" + "> \302\240\t\t\tchan_priority = <1>;\n" + "> \302\240\t\t\tblock_size = <0xfff>;\n" + "> \302\240\t\t\tdma-masters = <2>;\n" "> -\t\t\tdata_width = <3 3>;\n" "> +\t\t\tdata-width = <8>;\n" - "> ?\t\t};\n" - "> ?\n" - "> ?\t\tdma at eb000000 {\n" + "> \302\240\t\t};\n" + "> \302\240\n" + "> \302\240\t\tdma@eb000000 {\n" "> @@ -133,7 +133,7 @@\n" - "> ?\t\t\tchan_allocation_order = <1>;\n" - "> ?\t\t\tchan_priority = <1>;\n" - "> ?\t\t\tblock_size = <0xfff>;\n" + "> \302\240\t\t\tchan_allocation_order = <1>;\n" + "> \302\240\t\t\tchan_priority = <1>;\n" + "> \302\240\t\t\tblock_size = <0xfff>;\n" "> -\t\t\tdata_width = <3 3>;\n" "> +\t\t\tdata-width = <8>;\n" - "> ?\t\t};\n" - "> ?\n" - "> ?\t\tfsmc: flash at b0000000 {\n" + "> \302\240\t\t};\n" + "> \302\240\n" + "> \302\240\t\tfsmc: flash@b0000000 {\n" "> diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c\n" "> index 140ea59ec882..28278e4c77ad 100644\n" "> --- a/drivers/dma/dw/core.c\n" "> +++ b/drivers/dma/dw/core.c\n" "> @@ -168,21 +168,6 @@ static void dwc_initialize(struct dw_dma_chan\n" "> *dwc)\n" - "> ?\n" - "> ?/*----------------------------------------------------------------\n" + "> \302\240\n" + "> \302\240/*----------------------------------------------------------------\n" "> ------*/\n" - "> ?\n" + "> \302\240\n" "> -static inline unsigned int dwc_fast_ffs(unsigned long long v)\n" "> -{\n" "> -\t/*\n" - "> -\t?* We can be a lot more clever here, but this should take\n" + "> -\t\302\240* We can be a lot more clever here, but this should take\n" "> care\n" - "> -\t?* of the most common optimization.\n" - "> -\t?*/\n" + "> -\t\302\240* of the most common optimization.\n" + "> -\t\302\240*/\n" "> -\tif (!(v & 7))\n" "> -\t\treturn 3;\n" "> -\telse if (!(v & 3))\n" @@ -150,94 +165,94 @@ "> -\treturn 0;\n" "> -}\n" "> -\n" - "> ?static inline void dwc_dump_chan_regs(struct dw_dma_chan *dwc)\n" - "> ?{\n" - "> ?\tdev_err(chan2dev(&dwc->chan),\n" + "> \302\240static inline void dwc_dump_chan_regs(struct dw_dma_chan *dwc)\n" + "> \302\240{\n" + "> \302\240\tdev_err(chan2dev(&dwc->chan),\n" "> @@ -712,7 +697,6 @@ dwc_prep_dma_memcpy(struct dma_chan *chan,\n" "> dma_addr_t dest, dma_addr_t src,\n" - "> ?\tsize_t\t\t\toffset;\n" - "> ?\tunsigned int\t\tsrc_width;\n" - "> ?\tunsigned int\t\tdst_width;\n" + "> \302\240\tsize_t\t\t\toffset;\n" + "> \302\240\tunsigned int\t\tsrc_width;\n" + "> \302\240\tunsigned int\t\tdst_width;\n" "> -\tunsigned int\t\tdata_width;\n" - "> ?\tu32\t\t\tctllo;\n" - "> ?\n" - "> ?\tdev_vdbg(chan2dev(chan),\n" + "> \302\240\tu32\t\t\tctllo;\n" + "> \302\240\n" + "> \302\240\tdev_vdbg(chan2dev(chan),\n" "> @@ -726,10 +710,7 @@ dwc_prep_dma_memcpy(struct dma_chan *chan,\n" "> dma_addr_t dest, dma_addr_t src,\n" - "> ?\n" - "> ?\tdwc->direction = DMA_MEM_TO_MEM;\n" - "> ?\n" + "> \302\240\n" + "> \302\240\tdwc->direction = DMA_MEM_TO_MEM;\n" + "> \302\240\n" "> -\tdata_width = dw->data_width[dwc->m_master];\n" "> -\n" "> -\tsrc_width = dst_width = min_t(unsigned int, data_width,\n" - "> -\t\t\t\t??????dwc_fast_ffs(src | dest |\n" + "> -\t\t\t\t\302\240\302\240\302\240\302\240\302\240\302\240dwc_fast_ffs(src | dest |\n" "> len));\n" "> +\tsrc_width = dst_width = __ffs(dw->data_width | src | dest |\n" "> len);\n" - "> ?\n" - "> ?\tctllo = DWC_DEFAULT_CTLLO(chan)\n" - "> ?\t\t\t| DWC_CTLL_DST_WIDTH(dst_width)\n" + "> \302\240\n" + "> \302\240\tctllo = DWC_DEFAULT_CTLLO(chan)\n" + "> \302\240\t\t\t| DWC_CTLL_DST_WIDTH(dst_width)\n" "> @@ -792,7 +773,6 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct\n" "> scatterlist *sgl,\n" - "> ?\tdma_addr_t\t\treg;\n" - "> ?\tunsigned int\t\treg_width;\n" - "> ?\tunsigned int\t\tmem_width;\n" + "> \302\240\tdma_addr_t\t\treg;\n" + "> \302\240\tunsigned int\t\treg_width;\n" + "> \302\240\tunsigned int\t\tmem_width;\n" "> -\tunsigned int\t\tdata_width;\n" - "> ?\tunsigned int\t\ti;\n" - "> ?\tstruct scatterlist\t*sg;\n" - "> ?\tsize_t\t\t\ttotal_len = 0;\n" + "> \302\240\tunsigned int\t\ti;\n" + "> \302\240\tstruct scatterlist\t*sg;\n" + "> \302\240\tsize_t\t\t\ttotal_len = 0;\n" "> @@ -818,8 +798,6 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct\n" "> scatterlist *sgl,\n" - "> ?\t\tctllo |= sconfig->device_fc ?\n" + "> \302\240\t\tctllo |= sconfig->device_fc ?\n" "> DWC_CTLL_FC(DW_DMA_FC_P_M2P) :\n" - "> ?\t\t\tDWC_CTLL_FC(DW_DMA_FC_D_M2P);\n" - "> ?\n" + "> \302\240\t\t\tDWC_CTLL_FC(DW_DMA_FC_D_M2P);\n" + "> \302\240\n" "> -\t\tdata_width = dw->data_width[dwc->m_master];\n" "> -\n" - "> ?\t\tfor_each_sg(sgl, sg, sg_len, i) {\n" - "> ?\t\t\tstruct dw_desc\t*desc;\n" - "> ?\t\t\tu32\t\tlen, dlen, mem;\n" + "> \302\240\t\tfor_each_sg(sgl, sg, sg_len, i) {\n" + "> \302\240\t\t\tstruct dw_desc\t*desc;\n" + "> \302\240\t\t\tu32\t\tlen, dlen, mem;\n" "> @@ -827,8 +805,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct\n" "> scatterlist *sgl,\n" - "> ?\t\t\tmem = sg_dma_address(sg);\n" - "> ?\t\t\tlen = sg_dma_len(sg);\n" - "> ?\n" + "> \302\240\t\t\tmem = sg_dma_address(sg);\n" + "> \302\240\t\t\tlen = sg_dma_len(sg);\n" + "> \302\240\n" "> -\t\t\tmem_width = min_t(unsigned int,\n" - "> -\t\t\t\t\t??data_width,\n" + "> -\t\t\t\t\t\302\240\302\240data_width,\n" "> dwc_fast_ffs(mem | len));\n" "> +\t\t\tmem_width = __ffs(dw->data_width | mem |\n" "> len);\n" - "> ?\n" - "> ?slave_sg_todev_fill_desc:\n" - "> ?\t\t\tdesc = dwc_desc_get(dwc);\n" + "> \302\240\n" + "> \302\240slave_sg_todev_fill_desc:\n" + "> \302\240\t\t\tdesc = dwc_desc_get(dwc);\n" "> @@ -874,8 +851,6 @@ slave_sg_todev_fill_desc:\n" - "> ?\t\tctllo |= sconfig->device_fc ?\n" + "> \302\240\t\tctllo |= sconfig->device_fc ?\n" "> DWC_CTLL_FC(DW_DMA_FC_P_P2M) :\n" - "> ?\t\t\tDWC_CTLL_FC(DW_DMA_FC_D_P2M);\n" - "> ?\n" + "> \302\240\t\t\tDWC_CTLL_FC(DW_DMA_FC_D_P2M);\n" + "> \302\240\n" "> -\t\tdata_width = dw->data_width[dwc->m_master];\n" "> -\n" - "> ?\t\tfor_each_sg(sgl, sg, sg_len, i) {\n" - "> ?\t\t\tstruct dw_desc\t*desc;\n" - "> ?\t\t\tu32\t\tlen, dlen, mem;\n" + "> \302\240\t\tfor_each_sg(sgl, sg, sg_len, i) {\n" + "> \302\240\t\t\tstruct dw_desc\t*desc;\n" + "> \302\240\t\t\tu32\t\tlen, dlen, mem;\n" "> @@ -883,8 +858,7 @@ slave_sg_todev_fill_desc:\n" - "> ?\t\t\tmem = sg_dma_address(sg);\n" - "> ?\t\t\tlen = sg_dma_len(sg);\n" - "> ?\n" + "> \302\240\t\t\tmem = sg_dma_address(sg);\n" + "> \302\240\t\t\tlen = sg_dma_len(sg);\n" + "> \302\240\n" "> -\t\t\tmem_width = min_t(unsigned int,\n" - "> -\t\t\t\t\t??data_width,\n" + "> -\t\t\t\t\t\302\240\302\240data_width,\n" "> dwc_fast_ffs(mem | len));\n" "> +\t\t\tmem_width = __ffs(dw->data_width | mem |\n" "> len);\n" - "> ?\n" - "> ?slave_sg_fromdev_fill_desc:\n" - "> ?\t\t\tdesc = dwc_desc_get(dwc);\n" + "> \302\240\n" + "> \302\240slave_sg_fromdev_fill_desc:\n" + "> \302\240\t\t\tdesc = dwc_desc_get(dwc);\n" "> @@ -1531,10 +1505,7 @@ int dw_dma_probe(struct dw_dma_chip *chip,\n" "> struct dw_dma_platform_data *pdata)\n" - "> ?\t\t/* Get hardware configuration parameters */\n" - "> ?\t\tpdata->nr_channels = (dw_params >> DW_PARAMS_NR_CHAN\n" + "> \302\240\t\t/* Get hardware configuration parameters */\n" + "> \302\240\t\tpdata->nr_channels = (dw_params >> DW_PARAMS_NR_CHAN\n" "> & 7) + 1;\n" - "> ?\t\tpdata->nr_masters = (dw_params >>\n" + "> \302\240\t\tpdata->nr_masters = (dw_params >>\n" "> DW_PARAMS_NR_MASTER & 3) + 1;\n" "> -\t\tfor (i = 0; i < pdata->nr_masters; i++) {\n" "> -\t\t\tpdata->data_width[i] =\n" @@ -246,61 +261,61 @@ "> -\t\t}\n" "> +\t\tpdata->data_width = 4 << (dw_params >>\n" "> DW_PARAMS_DATA_WIDTH(0) & 3);\n" - "> ?\t\tmax_blk_size = dma_readl(dw, MAX_BLK_SIZE);\n" - "> ?\n" - "> ?\t\t/* Fill platform data with the default values */\n" + "> \302\240\t\tmax_blk_size = dma_readl(dw, MAX_BLK_SIZE);\n" + "> \302\240\n" + "> \302\240\t\t/* Fill platform data with the default values */\n" "> @@ -1556,8 +1527,7 @@ int dw_dma_probe(struct dw_dma_chip *chip,\n" "> struct dw_dma_platform_data *pdata)\n" - "> ?\n" - "> ?\t/* Get hardware configuration parameters */\n" - "> ?\tdw->nr_masters = pdata->nr_masters;\n" + "> \302\240\n" + "> \302\240\t/* Get hardware configuration parameters */\n" + "> \302\240\tdw->nr_masters = pdata->nr_masters;\n" "> -\tfor (i = 0; i < dw->nr_masters; i++)\n" "> -\t\tdw->data_width[i] = pdata->data_width[i];\n" "> +\tdw->data_width = pdata->data_width;\n" - "> ?\n" - "> ?\t/* Calculate all channel mask before DMA setup */\n" - "> ?\tdw->all_chan_mask = (1 << pdata->nr_channels) - 1;\n" + "> \302\240\n" + "> \302\240\t/* Calculate all channel mask before DMA setup */\n" + "> \302\240\tdw->all_chan_mask = (1 << pdata->nr_channels) - 1;\n" "> diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c\n" "> index d3e1abcebd7f..89d0461f5dcc 100644\n" "> --- a/drivers/dma/dw/platform.c\n" "> +++ b/drivers/dma/dw/platform.c\n" "> @@ -102,8 +102,8 @@ dw_dma_parse_dt(struct platform_device *pdev)\n" - "> ?{\n" - "> ?\tstruct device_node *np = pdev->dev.of_node;\n" - "> ?\tstruct dw_dma_platform_data *pdata;\n" + "> \302\240{\n" + "> \302\240\tstruct device_node *np = pdev->dev.of_node;\n" + "> \302\240\tstruct dw_dma_platform_data *pdata;\n" "> -\tu32 tmp, arr[DW_DMA_MAX_NR_MASTERS];\n" - "> ?\tu32 nr_channels;\n" + "> \302\240\tu32 nr_channels;\n" "> +\tu32 tmp;\n" - "> ?\n" - "> ?\tif (!np) {\n" - "> ?\t\tdev_err(&pdev->dev, \"Missing DT data\\n\");\n" + "> \302\240\n" + "> \302\240\tif (!np) {\n" + "> \302\240\t\tdev_err(&pdev->dev, \"Missing DT data\\n\");\n" "> @@ -138,10 +138,8 @@ dw_dma_parse_dt(struct platform_device *pdev)\n" - "> ?\t\tpdata->nr_masters = tmp;\n" - "> ?\t}\n" - "> ?\n" + "> \302\240\t\tpdata->nr_masters = tmp;\n" + "> \302\240\t}\n" + "> \302\240\n" "> -\tif (!of_property_read_u32_array(np, \"data_width\", arr,\n" "> -\t\t\t\tpdata->nr_masters))\n" "> -\t\tfor (tmp = 0; tmp < pdata->nr_masters; tmp++)\n" "> -\t\t\tpdata->data_width[tmp] = arr[tmp];\n" "> +\tif (!of_property_read_u32(np, \"data-width\", &tmp))\n" "> +\t\tpdata->data_width = tmp;\n" - "> ?\n" - "> ?\treturn pdata;\n" - "> ?}\n" + "> \302\240\n" + "> \302\240\treturn pdata;\n" + "> \302\240}\n" "> diff --git a/drivers/dma/dw/regs.h b/drivers/dma/dw/regs.h\n" "> index e4b277565165..87bc97fca084 100644\n" "> --- a/drivers/dma/dw/regs.h\n" "> +++ b/drivers/dma/dw/regs.h\n" "> @@ -285,7 +285,7 @@ struct dw_dma {\n" - "> ?\n" - "> ?\t/* hardware configuration */\n" - "> ?\tunsigned char\t\tnr_masters;\n" + "> \302\240\n" + "> \302\240\t/* hardware configuration */\n" + "> \302\240\tunsigned char\t\tnr_masters;\n" "> -\tunsigned char\t\tdata_width[DW_DMA_MAX_NR_MASTER\n" "> S];\n" "> +\tunsigned char\t\tdata_width;\n" - "> ?};\n" - "> ?\n" - "> ?static inline struct dw_dma_regs __iomem *__dw_regs(struct dw_dma\n" + "> \302\240};\n" + "> \302\240\n" + "> \302\240static inline struct dw_dma_regs __iomem *__dw_regs(struct dw_dma\n" "> *dw)\n" "> diff --git a/include/linux/platform_data/dma-dw.h\n" "> b/include/linux/platform_data/dma-dw.h\n" @@ -308,29 +323,29 @@ "> --- a/include/linux/platform_data/dma-dw.h\n" "> +++ b/include/linux/platform_data/dma-dw.h\n" "> @@ -42,8 +42,7 @@ struct dw_dma_slave {\n" - "> ? * @chan_priority: Set channel priority increasing from 0 to 7 or 7\n" + "> \302\240 * @chan_priority: Set channel priority increasing from 0 to 7 or 7\n" "> to 0.\n" - "> ? * @block_size: Maximum block size supported by the controller\n" - "> ? * @nr_masters: Number of AHB masters supported by the controller\n" + "> \302\240 * @block_size: Maximum block size supported by the controller\n" + "> \302\240 * @nr_masters: Number of AHB masters supported by the controller\n" "> - * @data_width: Maximum data width supported by hardware per AHB\n" "> master\n" "> - *\t\t(0 - 8bits, 1 - 16bits, ..., 5 - 256bits)\n" "> + * @data_width: Maximum data width supported by hardware (in bytes)\n" - "> ? */\n" - "> ?struct dw_dma_platform_data {\n" - "> ?\tunsigned int\tnr_channels;\n" + "> \302\240 */\n" + "> \302\240struct dw_dma_platform_data {\n" + "> \302\240\tunsigned int\tnr_channels;\n" "> @@ -57,7 +56,7 @@ struct dw_dma_platform_data {\n" - "> ?\tunsigned char\tchan_priority;\n" - "> ?\tunsigned short\tblock_size;\n" - "> ?\tunsigned char\tnr_masters;\n" + "> \302\240\tunsigned char\tchan_priority;\n" + "> \302\240\tunsigned short\tblock_size;\n" + "> \302\240\tunsigned char\tnr_masters;\n" "> -\tunsigned char\tdata_width[DW_DMA_MAX_NR_MASTERS];\n" "> +\tunsigned char\tdata_width;\n" - "> ?};\n" - "> ?\n" - "> ?#endif /* _PLATFORM_DATA_DMA_DW_H */\n" + "> \302\240};\n" + "> \302\240\n" + "> \302\240#endif /* _PLATFORM_DATA_DMA_DW_H */\n" "\n" "-- \n" - "Andy Shevchenko <andriy.shevchenko at linux.intel.com>\n" + "Andy Shevchenko <andriy.shevchenko@linux.intel.com>\n" Intel Finland Oy -c92e696dd1f95840f5e5b093951a8ffe6cb667b2a28ba86ba2c023ec5e36824c +1474619951178eb4620d86dcb7ef6637fafdee3e0a05cf5453c6b7811076984b
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