All of lore.kernel.org
 help / color / mirror / Atom feed
From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
To: "Tian, Kevin" <kevin.tian@intel.com>,
	"Wang, Zhi A" <zhi.a.wang@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>,
	"igvt-g@lists.01.org" <igvt-g@lists.01.org>
Cc: "daniel.vetter@ffwll.ch" <daniel.vetter@ffwll.ch>,
	"Cowperthwaite, David J" <david.j.cowperthwaite@intel.com>,
	"Lv, Zhiyuan" <zhiyuan.lv@intel.com>
Subject: Re: [RFCv2 02/14] drm/i915/gvt: Introduce the basic architecture of GVT-g
Date: Thu, 25 Feb 2016 13:24:54 +0200	[thread overview]
Message-ID: <1456399494.6548.2.camel@linux.intel.com> (raw)
In-Reply-To: <AADFC41AFE54684AB9EE6CBC0274A5D15F7C8EFA@SHSMSX101.ccr.corp.intel.com>

On ke, 2016-02-24 at 07:45 +0000, Tian, Kevin wrote:
> > From: Joonas Lahtinen [mailto:joonas.lahtinen@linux.intel.com]
> > Sent: Tuesday, February 23, 2016 8:42 PM
> > 
> > Hi,
> > 
> > Code is looking a lot better.
> > 
> > A general question still; why you seem to be preferring multi-stage
> > alloc and destroy?
> 
> One reason for multi-stage, IMO, is that GVT needs to do a snapshot
> of initial MMIO state before i915 driver does actual initialization. That
> snapshot will be presented to each VM which can then observe same
> state as it would observe on a bare metal. Then the majority of
> initialization needs to wait after i915 driver completes initialization. 
> Zhi can correct me here.
> 

Sorry for being unclear, I was referring to pgt_device initialization.

Regards, Joonas

> Thanks
> Kevin
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2016-02-25 11:25 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-02-18 11:42 [RFCv2 PATCH 00/14] gvt: Hacking i915 for GVT context requirement Zhi Wang
2016-02-18 11:42 ` [RFCv2 01/14] drm/i915: factor out i915_pvinfo.h Zhi Wang
2016-02-22 13:23   ` Joonas Lahtinen
2016-02-23  2:40     ` Zhi Wang
2016-02-18 11:42 ` [RFCv2 02/14] drm/i915/gvt: Introduce the basic architecture of GVT-g Zhi Wang
2016-02-23 12:42   ` Joonas Lahtinen
2016-02-24  7:45     ` Tian, Kevin
2016-02-25 11:24       ` Joonas Lahtinen [this message]
2016-02-26  5:58     ` Zhi Wang
2016-02-23 12:53   ` Joonas Lahtinen
2016-02-24  7:50     ` Tian, Kevin
2016-02-24  8:08   ` Tian, Kevin
2016-02-26  5:38     ` Zhi Wang
2016-02-18 11:42 ` [RFCv2 03/14] drm/i915: Introduce host graphics memory/fence partition for GVT-g Zhi Wang
2016-02-23 13:16   ` Joonas Lahtinen
2016-02-23 13:23     ` Zhi Wang
2016-02-24  7:42       ` Tian, Kevin
2016-02-25 13:13         ` Joonas Lahtinen
2016-02-26  5:21         ` Zhi Wang
2016-02-26 13:54           ` Joonas Lahtinen
2016-02-23 13:26     ` Joonas Lahtinen
2016-02-24  8:22   ` Tian, Kevin
2016-02-26  5:29     ` Zhi Wang
2016-02-18 11:42 ` [RFCv2 04/14] drm/i915: factor out alloc_context_idr() and __i915_gem_create_context() Zhi Wang
2016-02-24  8:27   ` Tian, Kevin
2016-02-18 11:42 ` [RFCv2 05/14] drm/i915: factor out __create_legacy_hw_context() Zhi Wang
2016-02-18 11:42 ` [RFCv2 06/14] drm/i915: let __i915_gem_context_create() takes context creation params Zhi Wang
2016-02-24  8:35   ` Tian, Kevin
2016-02-18 11:42 ` [RFCv2 07/14] drm/i915: factor out __intel_lr_context_deferred_alloc() Zhi Wang
2016-02-24  8:37   ` Tian, Kevin
2016-02-18 11:42 ` [RFCv2 08/14] drm/i915: Support per-PPGTT address space mode Zhi Wang
2016-02-24  8:47   ` Tian, Kevin
2016-02-18 11:42 ` [RFCv2 09/14] drm/i915: generate address mode bit from PPGTT instance Zhi Wang
2016-02-18 11:42 ` [RFCv2 10/14] drm/i915: update PDPs by condition when submit the LRC context Zhi Wang
2016-02-24  8:49   ` Tian, Kevin
2016-02-25 15:02     ` Wang, Zhi A
2016-02-26 13:49       ` Joonas Lahtinen
2016-02-18 11:42 ` [RFCv2 11/14] drm/i915: Introduce execlist context status change notification Zhi Wang
2016-02-18 11:42 ` [RFCv2 12/14] drm/i915: factor out execlists_i915_pick_requests() Zhi Wang
2016-02-18 11:42 ` [RFCv2 13/14] drm/i915: Support context single submission when GVT is active Zhi Wang
2016-02-24  8:52   ` Tian, Kevin
2016-02-18 11:42 ` [RFCv2 14/14] drm/i915: Introduce GVT context creation API Zhi Wang
2016-02-18 12:02 ` ✗ Fi.CI.BAT: failure for gvt: Hacking i915 for GVT context requirement Patchwork
2016-02-24  8:55 ` [RFCv2 PATCH 00/14] " Tian, Kevin
2016-02-24  9:18   ` Wang, Zhi A
2016-02-24  9:38     ` Tian, Kevin

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=1456399494.6548.2.camel@linux.intel.com \
    --to=joonas.lahtinen@linux.intel.com \
    --cc=daniel.vetter@ffwll.ch \
    --cc=david.j.cowperthwaite@intel.com \
    --cc=igvt-g@lists.01.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=kevin.tian@intel.com \
    --cc=zhi.a.wang@intel.com \
    --cc=zhiyuan.lv@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.