From: Zhi Wang <zhi.a.wang@intel.com>
To: "Tian, Kevin" <kevin.tian@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
"igvt-g@lists.01.org" <igvt-g@lists.01.org>
Cc: "daniel.vetter@ffwll.ch" <daniel.vetter@ffwll.ch>,
"Cowperthwaite, David J" <david.j.cowperthwaite@intel.com>,
"Lv, Zhiyuan" <zhiyuan.lv@intel.com>
Subject: Re: [RFCv2 03/14] drm/i915: Introduce host graphics memory/fence partition for GVT-g
Date: Fri, 26 Feb 2016 13:29:39 +0800 [thread overview]
Message-ID: <56CFE2C3.9040907@intel.com> (raw)
In-Reply-To: <AADFC41AFE54684AB9EE6CBC0274A5D15F7C9008@SHSMSX101.ccr.corp.intel.com>
On 02/24/16 16:22, Tian, Kevin wrote:
>> From: Wang, Zhi A
>> Sent: Thursday, February 18, 2016 7:42 PM
>> diff --git a/drivers/gpu/drm/i915/gvt/gvt.c b/drivers/gpu/drm/i915/gvt/gvt.c
>> index 52cfa32..2099b7e 100644
>> --- a/drivers/gpu/drm/i915/gvt/gvt.c
>> +++ b/drivers/gpu/drm/i915/gvt/gvt.c
>> @@ -348,6 +348,10 @@ void *gvt_create_pgt_device(struct drm_i915_private
>> *dev_priv)
>> goto err;
>> }
>>
>> + dev_priv->gvt.host_fence_sz = gvt.host_fence_sz;
>> + dev_priv->gvt.host_low_gm_sz_in_mb = gvt.host_low_gm_sz;
>> + dev_priv->gvt.host_high_gm_sz_in_mb = gvt.host_high_gm_sz;
>
> Do we need hard limiting fence number for host usage here? There is no
> continuity requirement as seen for graphics memory, since we do translate
> fence# between guest view and host view. So we could make it flexible
> as an on-demand allocation when creating a vGPU. Daniel even mentioned
> , iirc, that today i915 can dynamically grab a fence register away from
> an application, which could be useful even when host fence usage is high
> (not a typical case in server virtualization which runs few applications in host).
>
Yes. They steal fence in aperture mapping fault handler. We could steal
the fence registers from i915 as well. Let me see the effort here. :)
>> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
>> b/drivers/gpu/drm/i915/i915_gem_gtt.c
>> index 9127f8f..de09dd4 100644
>> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
>> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
>> @@ -2734,7 +2734,7 @@ static int i915_gem_setup_global_gtt(struct drm_device *dev,
>> i915_address_space_init(ggtt_vm, dev_priv);
>> ggtt_vm->total += PAGE_SIZE;
>>
>> - if (intel_vgpu_active(dev)) {
>> + if (intel_vgpu_active(dev) || intel_gvt_active(dev)) {
>
> above two conditions are bit confusing for others not familiar with
> this technology. vgpu_active is for driver running in a VM, while
> gvt_active is for driver running in host. Could we introduce a better
> name, or at least wrap them into a more meaningful macro like
> intel_ballooning_required?
>
>> ret = intel_vgt_balloon(dev);
>
> I saw several comments whether ballooning is a right term here,
> since we only do static reservation so far. How about renaming it
> to intel_reserve_gm_resource to be more clear? In the future even
> when we want to add true dynamic ballooning feature, it will be
> largely refactored anyway. :-)
>
Sure, will do that.
> Thanks
> Kevin
>
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next prev parent reply other threads:[~2016-02-26 5:32 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-02-18 11:42 [RFCv2 PATCH 00/14] gvt: Hacking i915 for GVT context requirement Zhi Wang
2016-02-18 11:42 ` [RFCv2 01/14] drm/i915: factor out i915_pvinfo.h Zhi Wang
2016-02-22 13:23 ` Joonas Lahtinen
2016-02-23 2:40 ` Zhi Wang
2016-02-18 11:42 ` [RFCv2 02/14] drm/i915/gvt: Introduce the basic architecture of GVT-g Zhi Wang
2016-02-23 12:42 ` Joonas Lahtinen
2016-02-24 7:45 ` Tian, Kevin
2016-02-25 11:24 ` Joonas Lahtinen
2016-02-26 5:58 ` Zhi Wang
2016-02-23 12:53 ` Joonas Lahtinen
2016-02-24 7:50 ` Tian, Kevin
2016-02-24 8:08 ` Tian, Kevin
2016-02-26 5:38 ` Zhi Wang
2016-02-18 11:42 ` [RFCv2 03/14] drm/i915: Introduce host graphics memory/fence partition for GVT-g Zhi Wang
2016-02-23 13:16 ` Joonas Lahtinen
2016-02-23 13:23 ` Zhi Wang
2016-02-24 7:42 ` Tian, Kevin
2016-02-25 13:13 ` Joonas Lahtinen
2016-02-26 5:21 ` Zhi Wang
2016-02-26 13:54 ` Joonas Lahtinen
2016-02-23 13:26 ` Joonas Lahtinen
2016-02-24 8:22 ` Tian, Kevin
2016-02-26 5:29 ` Zhi Wang [this message]
2016-02-18 11:42 ` [RFCv2 04/14] drm/i915: factor out alloc_context_idr() and __i915_gem_create_context() Zhi Wang
2016-02-24 8:27 ` Tian, Kevin
2016-02-18 11:42 ` [RFCv2 05/14] drm/i915: factor out __create_legacy_hw_context() Zhi Wang
2016-02-18 11:42 ` [RFCv2 06/14] drm/i915: let __i915_gem_context_create() takes context creation params Zhi Wang
2016-02-24 8:35 ` Tian, Kevin
2016-02-18 11:42 ` [RFCv2 07/14] drm/i915: factor out __intel_lr_context_deferred_alloc() Zhi Wang
2016-02-24 8:37 ` Tian, Kevin
2016-02-18 11:42 ` [RFCv2 08/14] drm/i915: Support per-PPGTT address space mode Zhi Wang
2016-02-24 8:47 ` Tian, Kevin
2016-02-18 11:42 ` [RFCv2 09/14] drm/i915: generate address mode bit from PPGTT instance Zhi Wang
2016-02-18 11:42 ` [RFCv2 10/14] drm/i915: update PDPs by condition when submit the LRC context Zhi Wang
2016-02-24 8:49 ` Tian, Kevin
2016-02-25 15:02 ` Wang, Zhi A
2016-02-26 13:49 ` Joonas Lahtinen
2016-02-18 11:42 ` [RFCv2 11/14] drm/i915: Introduce execlist context status change notification Zhi Wang
2016-02-18 11:42 ` [RFCv2 12/14] drm/i915: factor out execlists_i915_pick_requests() Zhi Wang
2016-02-18 11:42 ` [RFCv2 13/14] drm/i915: Support context single submission when GVT is active Zhi Wang
2016-02-24 8:52 ` Tian, Kevin
2016-02-18 11:42 ` [RFCv2 14/14] drm/i915: Introduce GVT context creation API Zhi Wang
2016-02-18 12:02 ` ✗ Fi.CI.BAT: failure for gvt: Hacking i915 for GVT context requirement Patchwork
2016-02-24 8:55 ` [RFCv2 PATCH 00/14] " Tian, Kevin
2016-02-24 9:18 ` Wang, Zhi A
2016-02-24 9:38 ` Tian, Kevin
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