From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2 5/9] drm/i915: Refactor gen8 semaphore offset calculation
Date: Thu, 07 Apr 2016 09:23:53 +0300 [thread overview]
Message-ID: <1460010233.4084.3.camel@linux.intel.com> (raw)
In-Reply-To: <1459946003-24543-5-git-send-email-chris@chris-wilson.co.uk>
On ke, 2016-04-06 at 13:33 +0100, Chris Wilson wrote:
> We reuse the same calculation into two macros, and I want to add a third
> user. Time to refactor.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_ringbuffer.h | 11 +++++------
> 1 file changed, 5 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
> index 18074ab55f61..98eadfa79116 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.h
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
> @@ -52,16 +52,15 @@ struct intel_hw_status_page {
> /* seqno size is actually only a uint32, but since we plan to use MI_FLUSH_DW to
> * do the writes, and that must have qw aligned offsets, simply pretend it's 8b.
> */
> -#define i915_semaphore_seqno_size sizeof(uint64_t)
> +#define gen8_semaphore_seqno_size sizeof(uint64_t)
> +#define GEN8_SEMAPHORE_OFFSET(__from, __to) \
> + (((__from) * I915_NUM_ENGINES + (__to)) * gen8_semaphore_seqno_size)
> #define GEN8_SIGNAL_OFFSET(__ring, to) \
> (i915_gem_obj_ggtt_offset(dev_priv->semaphore_obj) + \
> - ((__ring)->id * I915_NUM_ENGINES * i915_semaphore_seqno_size) + \
> - (i915_semaphore_seqno_size * (to)))
> -
> + GEN8_SEMAPHORE_OFFSET((__ring)->id, (to)))
> #define GEN8_WAIT_OFFSET(__ring, from) \
> (i915_gem_obj_ggtt_offset(dev_priv->semaphore_obj) + \
> - ((from) * I915_NUM_ENGINES * i915_semaphore_seqno_size) + \
> - (i915_semaphore_seqno_size * (__ring)->id))
> + GEN8_SEMAPHORE_OFFSET(from, (__ring)->id))
>
> #define GEN8_RING_SEMAPHORE_INIT(e) do { \
> if (!dev_priv->semaphore_obj) { \
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2016-04-07 6:23 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-04-05 23:57 [PATCH 1/7] drm/i915: Include engine->last_submitted_seqno in GPU error state Chris Wilson
2016-04-05 23:57 ` [PATCH 2/7] drm/i915: On GPU reset, set the HWS breadcrumb to the last seqno Chris Wilson
2016-04-06 9:29 ` Mika Kuoppala
2016-04-06 10:40 ` Joonas Lahtinen
2016-04-05 23:57 ` [PATCH 3/7] drm/i915: Remove unneeded drm_device pointer from intel_ring_init_seqno() Chris Wilson
2016-04-06 9:08 ` Joonas Lahtinen
2016-04-05 23:57 ` [PATCH 4/7] drm/i915: Move the hw semaphore initialisation from GEM to the engine Chris Wilson
2016-04-06 9:29 ` Mika Kuoppala
2016-04-06 10:27 ` Joonas Lahtinen
2016-04-05 23:57 ` [PATCH 5/7] drm/i915: Reset semaphore page for gen8 Chris Wilson
2016-04-06 9:58 ` Joonas Lahtinen
2016-04-06 10:10 ` Chris Wilson
2016-04-06 10:43 ` Joonas Lahtinen
2016-04-05 23:57 ` [PATCH 6/7] drm/i915: Reset engine->last_submitted_seqno Chris Wilson
2016-04-06 9:30 ` Mika Kuoppala
2016-04-06 10:36 ` Joonas Lahtinen
2016-04-05 23:57 ` [PATCH 7/7] drm/i915: Simplify check for idleness in hangcheck Chris Wilson
2016-04-06 9:05 ` Joonas Lahtinen
2016-04-06 9:32 ` Mika Kuoppala
2016-04-06 9:44 ` Chris Wilson
2016-04-06 8:57 ` [PATCH 1/7] drm/i915: Include engine->last_submitted_seqno in GPU error state Joonas Lahtinen
2016-04-06 8:59 ` ✗ Fi.CI.BAT: failure for series starting with [1/7] " Patchwork
2016-04-06 9:28 ` [PATCH 1/7] " Mika Kuoppala
2016-04-06 12:33 ` [PATCH v2 1/9] " Chris Wilson
2016-04-06 12:33 ` [PATCH v2 2/9] drm/i915: On GPU reset, set the HWS breadcrumb to the last seqno Chris Wilson
2016-04-06 12:33 ` [PATCH v2 3/9] drm/i915: Remove unneeded drm_device pointer from intel_ring_init_seqno() Chris Wilson
2016-04-06 12:33 ` [PATCH v2 4/9] drm/i915: Move the hw semaphore initialisation from GEM to the engine Chris Wilson
2016-04-07 6:24 ` Joonas Lahtinen
2016-04-06 12:33 ` [PATCH v2 5/9] drm/i915: Refactor gen8 semaphore offset calculation Chris Wilson
2016-04-07 6:23 ` Joonas Lahtinen [this message]
2016-04-06 12:33 ` [PATCH v2 6/9] drm/i915: Reset semaphore page for gen8 Chris Wilson
2016-04-07 6:21 ` Joonas Lahtinen
2016-04-06 12:33 ` [PATCH v2 7/9] drm/i915: Reset engine->last_submitted_seqno Chris Wilson
2016-04-06 12:33 ` [PATCH v2 8/9] drm/i915: Apply a mb between emitting the request and hangcheck Chris Wilson
2016-04-06 14:24 ` Mika Kuoppala
2016-04-06 12:33 ` [PATCH v2 9/9] drm/i915: Simplify check for idleness in hangcheck Chris Wilson
2016-04-06 14:24 ` Mika Kuoppala
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1460010233.4084.3.camel@linux.intel.com \
--to=joonas.lahtinen@linux.intel.com \
--cc=chris@chris-wilson.co.uk \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.