From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
To: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
Jani Nikula <jani.nikula@linux.intel.com>,
Ander Conselvan De Oliveira <conselvan2@gmail.com>,
intel-gfx@lists.freedesktop.org,
Shubhangi Shrivastava <shubhangi.shrivastava@intel.com>
Subject: Re: ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: Splitting intel_dp_detect
Date: Thu, 07 Apr 2016 13:56:01 +0300 [thread overview]
Message-ID: <1460026561.4084.11.camel@linux.intel.com> (raw)
In-Reply-To: <57062FC7.4040900@linux.intel.com>
On to, 2016-04-07 at 11:00 +0100, Tvrtko Ursulin wrote:
> On 07/04/16 08:58, Jani Nikula wrote:
> >
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > index da0c3d29fda8..0890e71db188 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -3799,6 +3799,9 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
> > */
> > intel_dp->sink_count = DP_GET_SINK_COUNT(intel_dp->sink_count);
> >
> > + if (is_edp(intel_dp))
> > + intel_dp->sink_count = max(intel_dp->sink_count, 1);
It should be max(intel_dp->sink_count, (u8)1)
Which is essentially the same as max_t(u8, ...)
> > +
> > /*
> > * SINK_COUNT == 0 and DOWNSTREAM_PORT_PRESENT == 1 implies that
> > * a dongle is present but no display. Unless we require to know
> FWIW this patch fixes it on my BDW RVP.
>
> I just had to change it to max_t since max has an issue with taking an
> address of const 1 by the look of it.
The problem is differing types, taking address of a constant is not a
problem, differing types when comparing pointers is.
The whole address taking line in max macro is there to make the pointer
type comparison at compile time.
Regards, joonas
>
> Regards,
>
> Tvrtko
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
_______________________________________________
Intel-gfx mailing list
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next prev parent reply other threads:[~2016-04-07 10:55 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-03-30 12:35 [PATCH 1/5] drm/i915: Splitting intel_dp_detect Shubhangi Shrivastava
2016-03-30 12:35 ` [PATCH 2/5] drm/i915: Cleaning up intel_dp_hpd_pulse Shubhangi Shrivastava
2016-03-30 12:35 ` [PATCH 3/5] drm/i915: Reorganizing intel_dp_check_link_status Shubhangi Shrivastava
2016-03-30 12:35 ` [PATCH 4/5] drm/i915: Read sink_count dpcd always Shubhangi Shrivastava
2016-03-30 12:35 ` [PATCH 5/5] drm/i915: force full detect on sink count change Shubhangi Shrivastava
2016-03-31 12:38 ` ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: Splitting intel_dp_detect Patchwork
2016-04-01 7:41 ` Ander Conselvan De Oliveira
2016-04-04 10:31 ` Tvrtko Ursulin
2016-04-04 11:08 ` Jani Nikula
2016-04-04 11:41 ` Tvrtko Ursulin
2016-04-06 14:38 ` Tvrtko Ursulin
2016-04-07 7:58 ` Jani Nikula
2016-04-07 8:24 ` Ander Conselvan De Oliveira
2016-04-07 9:56 ` Thulasimani, Sivakumar
2016-04-07 10:12 ` Shubhangi Shrivastava
2016-04-07 10:00 ` Tvrtko Ursulin
2016-04-07 10:56 ` Joonas Lahtinen [this message]
2016-04-04 11:07 ` Shubhangi Shrivastava
-- strict thread matches above, loose matches on Subject: below --
2016-02-01 11:42 [PATCH 1/5] " Shubhangi Shrivastava
2016-02-01 12:15 ` ✓ Fi.CI.BAT: success for series starting with [1/5] " Patchwork
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