From: jonmason@broadcom.com (Jon Mason)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] ARM: dts: NSP: modify second CPU address
Date: Thu, 5 May 2016 19:29:31 -0400 [thread overview]
Message-ID: <1462490972-13566-2-git-send-email-jonmason@broadcom.com> (raw)
In-Reply-To: <1462490972-13566-1-git-send-email-jonmason@broadcom.com>
NSP B0 has a different address for the second core. Since there should
not be any Ax versions in the field, it should be safe to universally
change this.
Signed-off-by: Jon Mason <jonmason@broadcom.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index a44bf29..1759e65 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -57,7 +57,7 @@
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
enable-method = "brcm,bcm-nsp-smp";
- secondary-boot-reg = <0xffff042c>;
+ secondary-boot-reg = <0xffff0fec>;
reg = <0x1>;
};
};
--
1.9.1
WARNING: multiple messages have this Message-ID (diff)
From: Jon Mason <jonmason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
To: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Ian Campbell
<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
bcm-kernel-feedback-list-dY08KVG/lbpWk0Htik3J/w@public.gmane.org
Subject: [PATCH 2/3] ARM: dts: NSP: modify second CPU address
Date: Thu, 5 May 2016 19:29:31 -0400 [thread overview]
Message-ID: <1462490972-13566-2-git-send-email-jonmason@broadcom.com> (raw)
In-Reply-To: <1462490972-13566-1-git-send-email-jonmason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
NSP B0 has a different address for the second core. Since there should
not be any Ax versions in the field, it should be safe to universally
change this.
Signed-off-by: Jon Mason <jonmason-dY08KVG/lbpWk0Htik3J/w@public.gmane.org>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index a44bf29..1759e65 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -57,7 +57,7 @@
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
enable-method = "brcm,bcm-nsp-smp";
- secondary-boot-reg = <0xffff042c>;
+ secondary-boot-reg = <0xffff0fec>;
reg = <0x1>;
};
};
--
1.9.1
--
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WARNING: multiple messages have this Message-ID (diff)
From: Jon Mason <jonmason@broadcom.com>
To: Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org,
bcm-kernel-feedback-list@broadcom.com
Subject: [PATCH 2/3] ARM: dts: NSP: modify second CPU address
Date: Thu, 5 May 2016 19:29:31 -0400 [thread overview]
Message-ID: <1462490972-13566-2-git-send-email-jonmason@broadcom.com> (raw)
In-Reply-To: <1462490972-13566-1-git-send-email-jonmason@broadcom.com>
NSP B0 has a different address for the second core. Since there should
not be any Ax versions in the field, it should be safe to universally
change this.
Signed-off-by: Jon Mason <jonmason@broadcom.com>
---
arch/arm/boot/dts/bcm-nsp.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi
index a44bf29..1759e65 100644
--- a/arch/arm/boot/dts/bcm-nsp.dtsi
+++ b/arch/arm/boot/dts/bcm-nsp.dtsi
@@ -57,7 +57,7 @@
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
enable-method = "brcm,bcm-nsp-smp";
- secondary-boot-reg = <0xffff042c>;
+ secondary-boot-reg = <0xffff0fec>;
reg = <0x1>;
};
};
--
1.9.1
next prev parent reply other threads:[~2016-05-05 23:29 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-05 23:29 [PATCH 1/3] ARM: dts: NSP: Add MSI support on PCI Jon Mason
2016-05-05 23:29 ` Jon Mason
2016-05-05 23:29 ` Jon Mason
2016-05-05 23:29 ` Jon Mason [this message]
2016-05-05 23:29 ` [PATCH 2/3] ARM: dts: NSP: modify second CPU address Jon Mason
2016-05-05 23:29 ` Jon Mason
2016-05-05 23:29 ` [PATCH 3/3] ARM: dts: NSP: Add new DT file for bcm958625hr Jon Mason
2016-05-05 23:29 ` Jon Mason
2016-05-17 19:29 ` [PATCH 1/3] ARM: dts: NSP: Add MSI support on PCI Florian Fainelli
2016-05-17 19:29 ` Florian Fainelli
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