From: Jon Hunter <jonathanh@nvidia.com>
To: Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Marc Zyngier <marc.zyngier@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>,
Stephen Warren <swarren@wwwdotorg.org>,
Thierry Reding <thierry.reding@gmail.com>,
Kevin Hilman <khilman@kernel.org>,
Geert Uytterhoeven <geert@linux-m68k.org>,
Grygorii Strashko <grygorii.strashko@ti.com>,
Lars-Peter Clausen <lars@metafoo.de>,
Linus Walleij <linus.walleij@linaro.org>,
linux-tegra@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, Jon Hunter <jonathanh@nvidia.com>
Subject: [PATCH V5 5/9] irqchip/gic: Isolate early GIC initialisation code
Date: Mon, 6 Jun 2016 12:53:39 +0100 [thread overview]
Message-ID: <1465214023-8299-6-git-send-email-jonathanh@nvidia.com> (raw)
In-Reply-To: <1465214023-8299-1-git-send-email-jonathanh@nvidia.com>
To re-use the code that initialises the GIC (found in
__gic_init_bases()), from within a platform driver, it is necessary to
move the code from the __init section so that it is always present and
not removed. Unfortunately, it is not possible to simply drop the __init
from the function declaration for __gic_init_bases() because it contains
calls to set_smp_cross_call() and set_handle_irq() which are both
located in the __init section. Fortunately, these calls are only
required for the root controller and because the initial platform driver
will only support non-root controllers that can be initialised later in
the boot process, we can move these calls to another function.
Move the bulk of the code from __gic_init_bases() to a new function
called gic_init_bases() which is not located in the __init section and
can be used by the platform driver. Update __gic_init_bases() to call
gic_init_bases() and if necessary, set_smp_cross_call() and
set_handle_irq().
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
---
drivers/irqchip/irq-gic.c | 55 +++++++++++++++++++++++++++--------------------
1 file changed, 32 insertions(+), 23 deletions(-)
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index fbc4ae2afd29..fa0dd98993fa 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -1032,14 +1032,11 @@ static const struct irq_domain_ops gic_irq_domain_ops = {
.unmap = gic_irq_domain_unmap,
};
-static int __init __gic_init_bases(struct gic_chip_data *gic, int irq_start,
- struct fwnode_handle *handle)
+static int gic_init_bases(struct gic_chip_data *gic, int irq_start,
+ struct fwnode_handle *handle)
{
irq_hw_number_t hwirq_base;
- int gic_irqs, irq_base, i, ret;
-
- if (WARN_ON(!gic || gic->domain))
- return -EINVAL;
+ int gic_irqs, irq_base, ret;
/* Initialize irq_chip */
gic->chip = gic_chip;
@@ -1138,23 +1135,6 @@ static int __init __gic_init_bases(struct gic_chip_data *gic, int irq_start,
goto error;
}
- if (gic == &gic_data[0]) {
- /*
- * Initialize the CPU interface map to all CPUs.
- * It will be refined as each CPU probes its ID.
- * This is only necessary for the primary GIC.
- */
- for (i = 0; i < NR_GIC_CPU_IF; i++)
- gic_cpu_map[i] = 0xff;
-#ifdef CONFIG_SMP
- set_smp_cross_call(gic_raise_softirq);
- register_cpu_notifier(&gic_cpu_notifier);
-#endif
- set_handle_irq(gic_handle_irq);
- if (static_key_true(&supports_deactivate))
- pr_info("GIC: Using split EOI/Deactivate mode\n");
- }
-
gic_dist_init(gic);
ret = gic_cpu_init(gic);
if (ret)
@@ -1177,6 +1157,35 @@ error:
return ret;
}
+static int __init __gic_init_bases(struct gic_chip_data *gic,
+ int irq_start,
+ struct fwnode_handle *handle)
+{
+ int i;
+
+ if (WARN_ON(!gic || gic->domain))
+ return -EINVAL;
+
+ if (gic == &gic_data[0]) {
+ /*
+ * Initialize the CPU interface map to all CPUs.
+ * It will be refined as each CPU probes its ID.
+ * This is only necessary for the primary GIC.
+ */
+ for (i = 0; i < NR_GIC_CPU_IF; i++)
+ gic_cpu_map[i] = 0xff;
+#ifdef CONFIG_SMP
+ set_smp_cross_call(gic_raise_softirq);
+ register_cpu_notifier(&gic_cpu_notifier);
+#endif
+ set_handle_irq(gic_handle_irq);
+ if (static_key_true(&supports_deactivate))
+ pr_info("GIC: Using split EOI/Deactivate mode\n");
+ }
+
+ return gic_init_bases(gic, irq_start, handle);
+}
+
void __init gic_init(unsigned int gic_nr, int irq_start,
void __iomem *dist_base, void __iomem *cpu_base)
{
--
2.1.4
WARNING: multiple messages have this Message-ID (diff)
From: Jon Hunter <jonathanh@nvidia.com>
To: Thomas Gleixner <tglx@linutronix.de>,
Jason Cooper <jason@lakedaemon.net>,
Marc Zyngier <marc.zyngier@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>, Pawel Moll <pawel.moll@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Kumar Gala <galak@codeaurora.org>,
Stephen Warren <swarren@wwwdotorg.org>,
Thierry Reding <thierry.reding@gmail.com>,
Kevin Hilman <khilman@kernel.org>,
Geert Uytterhoeven <geert@linux-m68k.org>,
Grygorii Strashko <grygorii.strashko@ti.com>,
Lars-Peter Clausen <lars@metafoo.de>,
Linus Walleij <linus.walleij@linaro.org>,
<linux-tegra@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>, Jon Hunter <jonathanh@nvidia.com>
Subject: [PATCH V5 5/9] irqchip/gic: Isolate early GIC initialisation code
Date: Mon, 6 Jun 2016 12:53:39 +0100 [thread overview]
Message-ID: <1465214023-8299-6-git-send-email-jonathanh@nvidia.com> (raw)
In-Reply-To: <1465214023-8299-1-git-send-email-jonathanh@nvidia.com>
To re-use the code that initialises the GIC (found in
__gic_init_bases()), from within a platform driver, it is necessary to
move the code from the __init section so that it is always present and
not removed. Unfortunately, it is not possible to simply drop the __init
from the function declaration for __gic_init_bases() because it contains
calls to set_smp_cross_call() and set_handle_irq() which are both
located in the __init section. Fortunately, these calls are only
required for the root controller and because the initial platform driver
will only support non-root controllers that can be initialised later in
the boot process, we can move these calls to another function.
Move the bulk of the code from __gic_init_bases() to a new function
called gic_init_bases() which is not located in the __init section and
can be used by the platform driver. Update __gic_init_bases() to call
gic_init_bases() and if necessary, set_smp_cross_call() and
set_handle_irq().
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
---
drivers/irqchip/irq-gic.c | 55 +++++++++++++++++++++++++++--------------------
1 file changed, 32 insertions(+), 23 deletions(-)
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index fbc4ae2afd29..fa0dd98993fa 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -1032,14 +1032,11 @@ static const struct irq_domain_ops gic_irq_domain_ops = {
.unmap = gic_irq_domain_unmap,
};
-static int __init __gic_init_bases(struct gic_chip_data *gic, int irq_start,
- struct fwnode_handle *handle)
+static int gic_init_bases(struct gic_chip_data *gic, int irq_start,
+ struct fwnode_handle *handle)
{
irq_hw_number_t hwirq_base;
- int gic_irqs, irq_base, i, ret;
-
- if (WARN_ON(!gic || gic->domain))
- return -EINVAL;
+ int gic_irqs, irq_base, ret;
/* Initialize irq_chip */
gic->chip = gic_chip;
@@ -1138,23 +1135,6 @@ static int __init __gic_init_bases(struct gic_chip_data *gic, int irq_start,
goto error;
}
- if (gic == &gic_data[0]) {
- /*
- * Initialize the CPU interface map to all CPUs.
- * It will be refined as each CPU probes its ID.
- * This is only necessary for the primary GIC.
- */
- for (i = 0; i < NR_GIC_CPU_IF; i++)
- gic_cpu_map[i] = 0xff;
-#ifdef CONFIG_SMP
- set_smp_cross_call(gic_raise_softirq);
- register_cpu_notifier(&gic_cpu_notifier);
-#endif
- set_handle_irq(gic_handle_irq);
- if (static_key_true(&supports_deactivate))
- pr_info("GIC: Using split EOI/Deactivate mode\n");
- }
-
gic_dist_init(gic);
ret = gic_cpu_init(gic);
if (ret)
@@ -1177,6 +1157,35 @@ error:
return ret;
}
+static int __init __gic_init_bases(struct gic_chip_data *gic,
+ int irq_start,
+ struct fwnode_handle *handle)
+{
+ int i;
+
+ if (WARN_ON(!gic || gic->domain))
+ return -EINVAL;
+
+ if (gic == &gic_data[0]) {
+ /*
+ * Initialize the CPU interface map to all CPUs.
+ * It will be refined as each CPU probes its ID.
+ * This is only necessary for the primary GIC.
+ */
+ for (i = 0; i < NR_GIC_CPU_IF; i++)
+ gic_cpu_map[i] = 0xff;
+#ifdef CONFIG_SMP
+ set_smp_cross_call(gic_raise_softirq);
+ register_cpu_notifier(&gic_cpu_notifier);
+#endif
+ set_handle_irq(gic_handle_irq);
+ if (static_key_true(&supports_deactivate))
+ pr_info("GIC: Using split EOI/Deactivate mode\n");
+ }
+
+ return gic_init_bases(gic, irq_start, handle);
+}
+
void __init gic_init(unsigned int gic_nr, int irq_start,
void __iomem *dist_base, void __iomem *cpu_base)
{
--
2.1.4
next prev parent reply other threads:[~2016-06-06 11:53 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-06 11:53 [PATCH V5 0/9] Add support for Tegra210 AGIC Jon Hunter
2016-06-06 11:53 ` Jon Hunter
2016-06-06 11:53 ` [PATCH V5 1/9] irqdomain: Fix handling of type settings for existing mappings Jon Hunter
2016-06-06 11:53 ` Jon Hunter
2016-06-06 11:53 ` [PATCH V5 2/9] genirq: Look-up trigger type if not specified by caller Jon Hunter
2016-06-06 11:53 ` Jon Hunter
2016-06-06 11:53 ` [PATCH V5 3/9] irqdomain: Don't set type when mapping an IRQ Jon Hunter
2016-06-06 11:53 ` Jon Hunter
2016-06-06 11:53 ` [PATCH V5 4/9] genirq: Add runtime power management support for IRQ chips Jon Hunter
2016-06-06 11:53 ` Jon Hunter
2016-06-06 14:13 ` Grygorii Strashko
2016-06-06 14:13 ` Grygorii Strashko
[not found] ` <57558523.9070700-l0cyMroinI0@public.gmane.org>
2016-06-06 14:30 ` Jon Hunter
2016-06-06 14:30 ` Jon Hunter
2016-06-06 14:36 ` Grygorii Strashko
2016-06-06 14:36 ` Grygorii Strashko
2016-06-06 15:06 ` Jon Hunter
2016-06-06 15:06 ` Jon Hunter
[not found] ` <5755917A.7070704-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-06-06 16:08 ` Marc Zyngier
2016-06-06 16:08 ` Marc Zyngier
2016-06-09 22:56 ` Kevin Hilman
2016-06-09 22:56 ` Kevin Hilman
[not found] ` <7htwh2c6o9.fsf-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
2016-06-10 8:05 ` Jon Hunter
2016-06-10 8:05 ` Jon Hunter
2016-06-06 11:53 ` Jon Hunter [this message]
2016-06-06 11:53 ` [PATCH V5 5/9] irqchip/gic: Isolate early GIC initialisation code Jon Hunter
2016-06-06 11:53 ` [PATCH V5 7/9] irqchip/gic: Prepare for adding platform driver Jon Hunter
2016-06-06 11:53 ` Jon Hunter
2016-06-06 12:39 ` Jon Hunter
2016-06-06 12:39 ` Jon Hunter
2016-06-06 11:53 ` [PATCH V5 8/9] dt-bindings: arm-gic: Add documentation for Tegra210 AGIC Jon Hunter
2016-06-06 11:53 ` Jon Hunter
[not found] ` <1465214023-8299-1-git-send-email-jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2016-06-06 11:53 ` [PATCH V5 6/9] irqchip/gic: Add helper function for chip initialisation Jon Hunter
2016-06-06 11:53 ` Jon Hunter
2016-06-06 11:53 ` [PATCH V5 9/9] irqchip/gic: Add platform driver for non-root GICs that require RPM Jon Hunter
2016-06-06 11:53 ` Jon Hunter
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1465214023-8299-6-git-send-email-jonathanh@nvidia.com \
--to=jonathanh@nvidia.com \
--cc=devicetree@vger.kernel.org \
--cc=galak@codeaurora.org \
--cc=geert@linux-m68k.org \
--cc=grygorii.strashko@ti.com \
--cc=ijc+devicetree@hellion.org.uk \
--cc=jason@lakedaemon.net \
--cc=khilman@kernel.org \
--cc=lars@metafoo.de \
--cc=linus.walleij@linaro.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-tegra@vger.kernel.org \
--cc=marc.zyngier@arm.com \
--cc=mark.rutland@arm.com \
--cc=pawel.moll@arm.com \
--cc=robh+dt@kernel.org \
--cc=swarren@wwwdotorg.org \
--cc=tglx@linutronix.de \
--cc=thierry.reding@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.