From: Ritesh Harjani <riteshh@codeaurora.org>
To: shawn.lin@rock-chips.com, ulf.hansson@linaro.org,
linux-mmc@vger.kernel.org, adrian.hunter@intel.com
Cc: linux-arm-msm@vger.kernel.org, georgi.djakov@linaro.org,
alex.lemberg@sandisk.com, mateusz.nowak@intel.com,
Yuliy.Izrailov@sandisk.com, asutoshd@codeaurora.org,
kdorfman@codeaurora.org, david.griego@linaro.org,
stummala@codeaurora.org, venkatg@codeaurora.org,
Ritesh Harjani <riteshh@codeaurora.org>
Subject: [PATCH 08/10] mmc: sdhci-msm: Add get_clk_div callback definition
Date: Thu, 11 Aug 2016 19:22:54 +0530 [thread overview]
Message-ID: <1470923574-411-3-git-send-email-riteshh@codeaurora.org> (raw)
In-Reply-To: <1470923574-411-1-git-send-email-riteshh@codeaurora.org>
MSM controller does not use the div, instead needs
the base clock and the driver controls the
base clock (MCLK) at GCC directly.
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
---
drivers/mmc/host/sdhci-msm.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
index cfd0209..f148c96 100644
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -570,6 +570,16 @@ static unsigned int sdhci_msm_get_min_clock(struct sdhci_host *host)
return msm_host->pdata->clk_table[0];
}
+/*
+ * MSM SDHC controller HW recomendation is to not use
+ * clock divisor hence return 0 from here.
+ * Driver directly controls the clk-rate at GCC.
+ */
+static int sdhci_msm_get_clk_div(struct sdhci_host *host, int div)
+{
+ return 0;
+}
+
static const struct of_device_id sdhci_msm_dt_match[] = {
{ .compatible = "qcom,sdhci-msm-v4" },
{},
@@ -586,6 +596,7 @@ static const struct sdhci_ops sdhci_msm_ops = {
.set_bus_width = sdhci_set_bus_width,
.set_uhs_signaling = sdhci_msm_set_uhs_signaling,
.voltage_switch = sdhci_msm_voltage_switch,
+ .get_clk_div = sdhci_msm_get_clk_div,
};
static const struct sdhci_pltfm_data sdhci_msm_pdata = {
--
1.8.2.1
next prev parent reply other threads:[~2016-08-11 13:52 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-10 15:01 [PATCH 00/10] Add clk-rates and DDR support to sdhci-msm Ritesh Harjani
2016-08-10 15:01 ` [PATCH 01/10] mmc: sdhci-msm: Update DLL reset sequence Ritesh Harjani
2016-08-10 15:01 ` [PATCH 02/10] mmc: sdhci-msm: add pltfm_data support to get clk-rates from DT Ritesh Harjani
2016-08-10 15:01 ` [PATCH 03/10] arm64: dts: qcom: msm8916: Add clk-rates to sdhc1 & sdhc2 Ritesh Harjani
2016-08-10 15:01 ` [PATCH 04/10] mmc: sdhci-msm: Add get_min_clock() and get_max_clock() callback Ritesh Harjani
2016-08-10 15:01 ` [PATCH 05/10] mmc: sdhci-msm: Enable SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN Ritesh Harjani
2016-08-10 15:01 ` [PATCH 06/10] mmc: sdhci: Add SDHCI_QUIRK2_ALWAYS_USE_BASE_CLOCK quirk2 support Ritesh Harjani
2016-08-11 2:07 ` Shawn Lin
2016-08-11 7:03 ` Ritesh Harjani
2016-08-11 13:52 ` Adding callback in sdhci_calc_clk for geting clk divider Ritesh Harjani
2016-08-11 13:52 ` [PATCH 06/10] mmc: sdhci: Add get_clk_div callback support Ritesh Harjani
2016-08-12 1:34 ` Jaehoon Chung
2016-08-12 2:19 ` Ritesh Harjani
2016-08-12 3:21 ` Shawn Lin
2016-08-12 3:46 ` Ritesh Harjani
2016-08-12 7:21 ` Shawn Lin
2016-08-11 13:52 ` Ritesh Harjani [this message]
2016-08-10 15:01 ` [PATCH 07/10] mmc: sdhci-msm: Implement set_clock callback for sdhci-msm Ritesh Harjani
2016-08-10 15:01 ` [PATCH 08/10] mmc: sdhci-msm: Enable SDHCI_QUIRK2_ALWAYS_USE_BASE_CLOCK to sdhci-msm Ritesh Harjani
2016-08-10 15:01 ` [PATCH 09/10] mmc: sdhci-msm: Add clock changes for DDR mode Ritesh Harjani
2016-08-10 15:01 ` [PATCH 10/10] arm64: dts: qcom: msm8916: Add ddr support to sdhc1 Ritesh Harjani
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