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From: Sinan Kaya <okaya@codeaurora.org>
To: linux-pci@vger.kernel.org, timur@codeaurora.org,
	cov@codeaurora.org, alex.williamson@redhat.com,
	vikrams@codeaurora.org
Cc: Sinan Kaya <okaya@codeaurora.org>,
	linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH V2 2/5] IB/hfi1: replace pci_reset_bridge_secondary_bus with pci_reset_bus
Date: Fri, 16 Sep 2016 16:06:31 -0400	[thread overview]
Message-ID: <1474056395-21843-3-git-send-email-okaya@codeaurora.org> (raw)
In-Reply-To: <1474056395-21843-1-git-send-email-okaya@codeaurora.org>

Save and restore the settings on other devices impacted by the secondary
bus reset downstream.

Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
---
 drivers/infiniband/hw/hfi1/pcie.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/infiniband/hw/hfi1/pcie.c b/drivers/infiniband/hw/hfi1/pcie.c
index 89c68da..f8f21fb 100644
--- a/drivers/infiniband/hw/hfi1/pcie.c
+++ b/drivers/infiniband/hw/hfi1/pcie.c
@@ -861,9 +861,7 @@ static int trigger_sbr(struct hfi1_devdata *dd)
 	 * delay after a reset is required.  Per spec requirements,
 	 * the link is either working or not after that point.
 	 */
-	pci_reset_bridge_secondary_bus(dev->bus->self);
-
-	return 0;
+	return pci_reset_bus(dev->bus);
 }
 
 /*
-- 
1.9.1

WARNING: multiple messages have this Message-ID (diff)
From: Sinan Kaya <okaya@codeaurora.org>
To: linux-pci@vger.kernel.org, timur@codeaurora.org,
	cov@codeaurora.org, alex.williamson@redhat.com,
	vikrams@codeaurora.org
Cc: linux-arm-msm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Sinan Kaya <okaya@codeaurora.org>,
	linux-kernel@vger.kernel.org
Subject: [PATCH V2 2/5] IB/hfi1: replace pci_reset_bridge_secondary_bus with pci_reset_bus
Date: Fri, 16 Sep 2016 16:06:31 -0400	[thread overview]
Message-ID: <1474056395-21843-3-git-send-email-okaya@codeaurora.org> (raw)
In-Reply-To: <1474056395-21843-1-git-send-email-okaya@codeaurora.org>

Save and restore the settings on other devices impacted by the secondary
bus reset downstream.

Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
---
 drivers/infiniband/hw/hfi1/pcie.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/infiniband/hw/hfi1/pcie.c b/drivers/infiniband/hw/hfi1/pcie.c
index 89c68da..f8f21fb 100644
--- a/drivers/infiniband/hw/hfi1/pcie.c
+++ b/drivers/infiniband/hw/hfi1/pcie.c
@@ -861,9 +861,7 @@ static int trigger_sbr(struct hfi1_devdata *dd)
 	 * delay after a reset is required.  Per spec requirements,
 	 * the link is either working or not after that point.
 	 */
-	pci_reset_bridge_secondary_bus(dev->bus->self);
-
-	return 0;
+	return pci_reset_bus(dev->bus);
 }
 
 /*
-- 
1.9.1


WARNING: multiple messages have this Message-ID (diff)
From: okaya@codeaurora.org (Sinan Kaya)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH V2 2/5] IB/hfi1: replace pci_reset_bridge_secondary_bus with pci_reset_bus
Date: Fri, 16 Sep 2016 16:06:31 -0400	[thread overview]
Message-ID: <1474056395-21843-3-git-send-email-okaya@codeaurora.org> (raw)
In-Reply-To: <1474056395-21843-1-git-send-email-okaya@codeaurora.org>

Save and restore the settings on other devices impacted by the secondary
bus reset downstream.

Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
---
 drivers/infiniband/hw/hfi1/pcie.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/infiniband/hw/hfi1/pcie.c b/drivers/infiniband/hw/hfi1/pcie.c
index 89c68da..f8f21fb 100644
--- a/drivers/infiniband/hw/hfi1/pcie.c
+++ b/drivers/infiniband/hw/hfi1/pcie.c
@@ -861,9 +861,7 @@ static int trigger_sbr(struct hfi1_devdata *dd)
 	 * delay after a reset is required.  Per spec requirements,
 	 * the link is either working or not after that point.
 	 */
-	pci_reset_bridge_secondary_bus(dev->bus->self);
-
-	return 0;
+	return pci_reset_bus(dev->bus);
 }
 
 /*
-- 
1.9.1

  parent reply	other threads:[~2016-09-16 20:06 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-16 20:06 [PATCH V2 0/5] PCI: error handling clean up and add CRS support Sinan Kaya
2016-09-16 20:06 ` Sinan Kaya
2016-09-16 20:06 ` [PATCH V2 1/5] PCI/AER: replace pci_reset_bridge_secondary_bus with pci_reset_bus Sinan Kaya
2016-09-16 20:06   ` Sinan Kaya
2016-09-16 20:06 ` Sinan Kaya [this message]
2016-09-16 20:06   ` [PATCH V2 2/5] IB/hfi1: " Sinan Kaya
2016-09-16 20:06   ` Sinan Kaya
2016-09-16 20:06 ` [PATCH V2 3/5] PCI: save and restore bus on parent bus reset Sinan Kaya
2016-09-16 20:06   ` Sinan Kaya
2016-09-29 21:49   ` Bjorn Helgaas
2016-09-29 21:49     ` Bjorn Helgaas
2016-09-29 23:50     ` Sinan Kaya
2016-09-29 23:50       ` Sinan Kaya
2016-10-03  3:34       ` Sinan Kaya
2016-10-03  3:34         ` Sinan Kaya
2016-09-16 20:06 ` [PATCH V2 4/5] PCI: add CRS support to error handling path Sinan Kaya
2016-09-16 20:06   ` Sinan Kaya
2016-09-16 20:06 ` [PATCH V2 5/5] PCI: handle CRS returned by device after FLR Sinan Kaya
2016-09-16 20:06   ` Sinan Kaya
2016-11-10 18:38   ` Sinan Kaya
2016-11-10 18:38     ` Sinan Kaya

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