* [PATCH] drm/i915: Introduce HAS_64BIT_RELOC
@ 2016-11-02 12:32 Joonas Lahtinen
2016-11-02 12:40 ` Chris Wilson
` (2 more replies)
0 siblings, 3 replies; 10+ messages in thread
From: Joonas Lahtinen @ 2016-11-02 12:32 UTC (permalink / raw)
To: Intel graphics driver community testing & development
Unify {use,has}_64bit_reloc into dev_priv->info.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 3 +++
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 8 +++-----
drivers/gpu/drm/i915/i915_gem_render_state.c | 3 +--
drivers/gpu/drm/i915/i915_pci.c | 3 ++-
4 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index eaa01da..ae0217d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -670,6 +670,7 @@ struct intel_csr {
func(is_kabylake); \
func(is_preliminary); \
/* Keep has_* in alphabetical order */ \
+ func(has_64bit_reloc); \
func(has_csr); \
func(has_ddi); \
func(has_dp_mst); \
@@ -2917,6 +2918,8 @@ struct drm_i915_cmd_table {
#define HAS_CSR(dev) (INTEL_INFO(dev)->has_csr)
#define HAS_RUNTIME_PM(dev_priv) ((dev_priv)->info.has_runtime_pm)
+#define HAS_64BIT_RELOC(dev_priv) ((dev_priv)->info.has_64bit_reloc)
+
/*
* For now, anything with a GuC requires uCode loading, and then supports
* command submission once loaded. But these are logically independent
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index c35e847..3e73f77 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -322,7 +322,6 @@ struct reloc_cache {
struct drm_mm_node node;
unsigned long vaddr;
unsigned int page;
- bool use_64bit_reloc;
};
static void reloc_cache_init(struct reloc_cache *cache,
@@ -331,7 +330,6 @@ static void reloc_cache_init(struct reloc_cache *cache,
cache->page = -1;
cache->vaddr = 0;
cache->i915 = i915;
- cache->use_64bit_reloc = INTEL_GEN(cache->i915) >= 8;
cache->node.allocated = false;
}
@@ -519,7 +517,7 @@ relocate_entry(struct drm_i915_gem_object *obj,
u64 target_offset)
{
u64 offset = reloc->offset;
- bool wide = cache->use_64bit_reloc;
+ bool wide = HAS_64BIT_RELOC(cache->i915);
void *vaddr;
target_offset = relocation_target(reloc, target_offset);
@@ -552,6 +550,7 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
struct drm_gem_object *target_obj;
struct drm_i915_gem_object *target_i915_obj;
struct i915_vma *target_vma;
+ const size_t reloc_w = HAS_64BIT_RELOC(dev_priv) ? 8 : 4;
uint64_t target_offset;
int ret;
@@ -608,8 +607,7 @@ i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj,
return 0;
/* Check that the relocation address is valid... */
- if (unlikely(reloc->offset >
- obj->base.size - (cache->use_64bit_reloc ? 8 : 4))) {
+ if (unlikely(reloc->offset > obj->base.size - reloc_w)) {
DRM_DEBUG("Relocation beyond object bounds: "
"obj %p target %d offset %d size %d.\n",
obj, reloc->target_handle,
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
index 57918f2..5af19b0 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -74,7 +74,6 @@ static int render_state_setup(struct intel_render_state *so,
struct drm_i915_private *i915)
{
const struct intel_renderstate_rodata *rodata = so->rodata;
- const bool has_64bit_reloc = INTEL_GEN(i915) >= 8;
struct drm_i915_gem_object *obj = so->vma->obj;
unsigned int i = 0, reloc_index = 0;
unsigned int needs_clflush;
@@ -93,7 +92,7 @@ static int render_state_setup(struct intel_render_state *so,
if (i * 4 == rodata->reloc[reloc_index]) {
u64 r = s + so->vma->node.start;
s = lower_32_bits(r);
- if (has_64bit_reloc) {
+ if (HAS_64BIT_RELOC(i915)) {
if (i + 1 >= rodata->batch_items ||
rodata->batch[i + 1] != 0)
goto err;
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 31e6edd..9d2b5d3 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -288,7 +288,8 @@ static const struct intel_device_info intel_haswell_info = {
#define BDW_FEATURES \
HSW_FEATURES, \
BDW_COLORS, \
- .has_logical_ring_contexts = 1
+ .has_logical_ring_contexts = 1, \
+ .has_64bit_reloc = 1
static const struct intel_device_info intel_broadwell_info = {
BDW_FEATURES,
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH] drm/i915: Introduce HAS_64BIT_RELOC
2016-11-02 12:32 [PATCH] drm/i915: Introduce HAS_64BIT_RELOC Joonas Lahtinen
@ 2016-11-02 12:40 ` Chris Wilson
2016-11-02 12:55 ` [PATCH v2] " Joonas Lahtinen
2016-11-02 13:19 ` ✓ Fi.CI.BAT: success for drm/i915: Introduce HAS_64BIT_RELOC (rev2) Patchwork
2016-11-03 9:16 ` ✓ Fi.CI.BAT: success for drm/i915: Introduce HAS_64BIT_RELOC (rev3) Patchwork
2 siblings, 1 reply; 10+ messages in thread
From: Chris Wilson @ 2016-11-02 12:40 UTC (permalink / raw)
To: Joonas Lahtinen; +Cc: Intel graphics driver community testing & development
On Wed, Nov 02, 2016 at 02:32:54PM +0200, Joonas Lahtinen wrote:
> Unify {use,has}_64bit_reloc into dev_priv->info.
>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 3 +++
> drivers/gpu/drm/i915/i915_gem_execbuffer.c | 8 +++-----
> drivers/gpu/drm/i915/i915_gem_render_state.c | 3 +--
> drivers/gpu/drm/i915/i915_pci.c | 3 ++-
> 4 files changed, 9 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index eaa01da..ae0217d 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -670,6 +670,7 @@ struct intel_csr {
> func(is_kabylake); \
> func(is_preliminary); \
> /* Keep has_* in alphabetical order */ \
> + func(has_64bit_reloc); \
> func(has_csr); \
> func(has_ddi); \
> func(has_dp_mst); \
> @@ -2917,6 +2918,8 @@ struct drm_i915_cmd_table {
> #define HAS_CSR(dev) (INTEL_INFO(dev)->has_csr)
>
> #define HAS_RUNTIME_PM(dev_priv) ((dev_priv)->info.has_runtime_pm)
> +#define HAS_64BIT_RELOC(dev_priv) ((dev_priv)->info.has_64bit_reloc)
> +
> /*
> * For now, anything with a GuC requires uCode loading, and then supports
> * command submission once loaded. But these are logically independent
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index c35e847..3e73f77 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -322,7 +322,6 @@ struct reloc_cache {
> struct drm_mm_node node;
> unsigned long vaddr;
> unsigned int page;
> - bool use_64bit_reloc;
> };
>
> static void reloc_cache_init(struct reloc_cache *cache,
> @@ -331,7 +330,6 @@ static void reloc_cache_init(struct reloc_cache *cache,
> cache->page = -1;
> cache->vaddr = 0;
> cache->i915 = i915;
> - cache->use_64bit_reloc = INTEL_GEN(cache->i915) >= 8;
> cache->node.allocated = false;
> }
>
> @@ -519,7 +517,7 @@ relocate_entry(struct drm_i915_gem_object *obj,
> u64 target_offset)
> {
> u64 offset = reloc->offset;
> - bool wide = cache->use_64bit_reloc;
> + bool wide = HAS_64BIT_RELOC(cache->i915);
Nak.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2] drm/i915: Introduce HAS_64BIT_RELOC
2016-11-02 12:40 ` Chris Wilson
@ 2016-11-02 12:55 ` Joonas Lahtinen
2016-11-02 13:25 ` Chris Wilson
0 siblings, 1 reply; 10+ messages in thread
From: Joonas Lahtinen @ 2016-11-02 12:55 UTC (permalink / raw)
To: Intel graphics driver community testing & development
Move has_64bit_reloc into dev_priv->info.
v2:
- Keep the struct member to keep GCC fragile but happy (Chris)
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 3 +++
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 3 ++-
drivers/gpu/drm/i915/i915_gem_render_state.c | 3 +--
drivers/gpu/drm/i915/i915_pci.c | 3 ++-
4 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index eaa01da..ae0217d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -670,6 +670,7 @@ struct intel_csr {
func(is_kabylake); \
func(is_preliminary); \
/* Keep has_* in alphabetical order */ \
+ func(has_64bit_reloc); \
func(has_csr); \
func(has_ddi); \
func(has_dp_mst); \
@@ -2917,6 +2918,8 @@ struct drm_i915_cmd_table {
#define HAS_CSR(dev) (INTEL_INFO(dev)->has_csr)
#define HAS_RUNTIME_PM(dev_priv) ((dev_priv)->info.has_runtime_pm)
+#define HAS_64BIT_RELOC(dev_priv) ((dev_priv)->info.has_64bit_reloc)
+
/*
* For now, anything with a GuC requires uCode loading, and then supports
* command submission once loaded. But these are logically independent
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index c35e847..322c580 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -331,7 +331,8 @@ static void reloc_cache_init(struct reloc_cache *cache,
cache->page = -1;
cache->vaddr = 0;
cache->i915 = i915;
- cache->use_64bit_reloc = INTEL_GEN(cache->i915) >= 8;
+ /* Must be a variable in the struct to allow GCC to unroll. */
+ cache->use_64bit_reloc = HAS_64BIT_RELOC(i915);
cache->node.allocated = false;
}
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
index 57918f2..5af19b0 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -74,7 +74,6 @@ static int render_state_setup(struct intel_render_state *so,
struct drm_i915_private *i915)
{
const struct intel_renderstate_rodata *rodata = so->rodata;
- const bool has_64bit_reloc = INTEL_GEN(i915) >= 8;
struct drm_i915_gem_object *obj = so->vma->obj;
unsigned int i = 0, reloc_index = 0;
unsigned int needs_clflush;
@@ -93,7 +92,7 @@ static int render_state_setup(struct intel_render_state *so,
if (i * 4 == rodata->reloc[reloc_index]) {
u64 r = s + so->vma->node.start;
s = lower_32_bits(r);
- if (has_64bit_reloc) {
+ if (HAS_64BIT_RELOC(i915)) {
if (i + 1 >= rodata->batch_items ||
rodata->batch[i + 1] != 0)
goto err;
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 31e6edd..9d2b5d3 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -288,7 +288,8 @@ static const struct intel_device_info intel_haswell_info = {
#define BDW_FEATURES \
HSW_FEATURES, \
BDW_COLORS, \
- .has_logical_ring_contexts = 1
+ .has_logical_ring_contexts = 1, \
+ .has_64bit_reloc = 1
static const struct intel_device_info intel_broadwell_info = {
BDW_FEATURES,
--
2.7.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 10+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Introduce HAS_64BIT_RELOC (rev2)
2016-11-02 12:32 [PATCH] drm/i915: Introduce HAS_64BIT_RELOC Joonas Lahtinen
2016-11-02 12:40 ` Chris Wilson
@ 2016-11-02 13:19 ` Patchwork
2016-11-03 9:16 ` ✓ Fi.CI.BAT: success for drm/i915: Introduce HAS_64BIT_RELOC (rev3) Patchwork
2 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2016-11-02 13:19 UTC (permalink / raw)
To: Joonas Lahtinen; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Introduce HAS_64BIT_RELOC (rev2)
URL : https://patchwork.freedesktop.org/series/14730/
State : success
== Summary ==
Series 14730v2 drm/i915: Introduce HAS_64BIT_RELOC
https://patchwork.freedesktop.org/api/1.0/series/14730/revisions/2/mbox/
Test gem_ctx_switch:
Subgroup basic-default:
timeout -> PASS (fi-bsw-n3050)
Subgroup basic-default-heavy:
incomplete -> PASS (fi-bsw-n3050)
fi-bdw-5557u total:241 pass:226 dwarn:0 dfail:0 fail:0 skip:15
fi-bsw-n3050 total:241 pass:201 dwarn:0 dfail:0 fail:0 skip:40
fi-bxt-t5700 total:241 pass:213 dwarn:0 dfail:0 fail:0 skip:28
fi-byt-j1900 total:241 pass:213 dwarn:0 dfail:0 fail:0 skip:28
fi-byt-n2820 total:241 pass:209 dwarn:0 dfail:0 fail:0 skip:32
fi-hsw-4770 total:241 pass:221 dwarn:0 dfail:0 fail:0 skip:20
fi-hsw-4770r total:241 pass:220 dwarn:0 dfail:0 fail:0 skip:21
fi-ilk-650 total:241 pass:187 dwarn:0 dfail:0 fail:0 skip:54
fi-ivb-3520m total:241 pass:218 dwarn:0 dfail:0 fail:0 skip:23
fi-ivb-3770 total:241 pass:218 dwarn:0 dfail:0 fail:0 skip:23
fi-kbl-7200u total:241 pass:219 dwarn:0 dfail:0 fail:0 skip:22
fi-skl-6260u total:241 pass:227 dwarn:0 dfail:0 fail:0 skip:14
fi-skl-6700hq total:241 pass:220 dwarn:0 dfail:0 fail:0 skip:21
fi-skl-6700k total:241 pass:219 dwarn:1 dfail:0 fail:0 skip:21
fi-skl-6770hq total:241 pass:227 dwarn:0 dfail:0 fail:0 skip:14
fi-snb-2520m total:241 pass:208 dwarn:0 dfail:0 fail:0 skip:33
fi-snb-2600 total:241 pass:207 dwarn:0 dfail:0 fail:0 skip:34
179f2b207ffc86fad387e7d102912b6c897abc4e drm-intel-nightly: 2016y-11m-02d-10h-06m-52s UTC integration manifest
4978f83 drm/i915: Introduce HAS_64BIT_RELOC
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_2889/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2] drm/i915: Introduce HAS_64BIT_RELOC
2016-11-02 12:55 ` [PATCH v2] " Joonas Lahtinen
@ 2016-11-02 13:25 ` Chris Wilson
2016-11-02 15:00 ` Joonas Lahtinen
2016-11-03 8:39 ` [PATCH v3] " Joonas Lahtinen
0 siblings, 2 replies; 10+ messages in thread
From: Chris Wilson @ 2016-11-02 13:25 UTC (permalink / raw)
To: Joonas Lahtinen; +Cc: Intel graphics driver community testing & development
On Wed, Nov 02, 2016 at 02:55:36PM +0200, Joonas Lahtinen wrote:
> Move has_64bit_reloc into dev_priv->info.
... so that it is shown in the feature list for debugging
>
> v2:
> - Keep the struct member to keep GCC fragile but happy (Chris)
>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> ---
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 31e6edd..9d2b5d3 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -288,7 +288,8 @@ static const struct intel_device_info intel_haswell_info = {
> #define BDW_FEATURES \
> HSW_FEATURES, \
> BDW_COLORS, \
> - .has_logical_ring_contexts = 1
> + .has_logical_ring_contexts = 1, \
> + .has_64bit_reloc = 1
>
> static const struct intel_device_info intel_broadwell_info = {
> BDW_FEATURES,
Missed:
intel_cherryview_info
intel_broxton_info
--
Chris Wilson, Intel Open Source Technology Centre
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v2] drm/i915: Introduce HAS_64BIT_RELOC
2016-11-02 13:25 ` Chris Wilson
@ 2016-11-02 15:00 ` Joonas Lahtinen
2016-11-03 8:39 ` [PATCH v3] " Joonas Lahtinen
1 sibling, 0 replies; 10+ messages in thread
From: Joonas Lahtinen @ 2016-11-02 15:00 UTC (permalink / raw)
To: Chris Wilson; +Cc: Intel graphics driver community testing & development
On ke, 2016-11-02 at 13:25 +0000, Chris Wilson wrote:
> On Wed, Nov 02, 2016 at 02:55:36PM +0200, Joonas Lahtinen wrote:
> >
> > Move has_64bit_reloc into dev_priv->info.
>
> ... so that it is shown in the feature list for debugging
Ok, I'll add more detail.
> > @@ -288,7 +288,8 @@ static const struct intel_device_info intel_haswell_info = {
> > #define BDW_FEATURES \
> > HSW_FEATURES, \
> > BDW_COLORS, \
> > - .has_logical_ring_contexts = 1
> > + .has_logical_ring_contexts = 1, \
> > + .has_64bit_reloc = 1
> >
> > static const struct intel_device_info intel_broadwell_info = {
> > BDW_FEATURES,
>
> Missed:
> intel_cherryview_info
> intel_broxton_info
Yea, I was kinda overly optimistic about us cascading the features.
Time to add GEN8_FEATURES...
Regards, Joonas
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v3] drm/i915: Introduce HAS_64BIT_RELOC
2016-11-02 13:25 ` Chris Wilson
2016-11-02 15:00 ` Joonas Lahtinen
@ 2016-11-03 8:39 ` Joonas Lahtinen
2016-11-03 8:56 ` Chris Wilson
1 sibling, 1 reply; 10+ messages in thread
From: Joonas Lahtinen @ 2016-11-03 8:39 UTC (permalink / raw)
To: Intel graphics driver community testing & development
Move has_64bit_reloc into dev_priv->info. This will make it visible
in the feature listing debug output.
v2:
- Keep the struct member to keep GCC fragile but happy (Chris)
v3:
- More detailed commit message (Chris)
- Include forgotten CHV and BXT (Chris)
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 3 +++
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 3 ++-
drivers/gpu/drm/i915/i915_gem_render_state.c | 3 +--
drivers/gpu/drm/i915/i915_pci.c | 5 ++++-
4 files changed, 10 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index eaa01da..ae0217d 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -670,6 +670,7 @@ struct intel_csr {
func(is_kabylake); \
func(is_preliminary); \
/* Keep has_* in alphabetical order */ \
+ func(has_64bit_reloc); \
func(has_csr); \
func(has_ddi); \
func(has_dp_mst); \
@@ -2917,6 +2918,8 @@ struct drm_i915_cmd_table {
#define HAS_CSR(dev) (INTEL_INFO(dev)->has_csr)
#define HAS_RUNTIME_PM(dev_priv) ((dev_priv)->info.has_runtime_pm)
+#define HAS_64BIT_RELOC(dev_priv) ((dev_priv)->info.has_64bit_reloc)
+
/*
* For now, anything with a GuC requires uCode loading, and then supports
* command submission once loaded. But these are logically independent
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index c35e847..322c580 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -331,7 +331,8 @@ static void reloc_cache_init(struct reloc_cache *cache,
cache->page = -1;
cache->vaddr = 0;
cache->i915 = i915;
- cache->use_64bit_reloc = INTEL_GEN(cache->i915) >= 8;
+ /* Must be a variable in the struct to allow GCC to unroll. */
+ cache->use_64bit_reloc = HAS_64BIT_RELOC(i915);
cache->node.allocated = false;
}
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
index 57918f2..5af19b0 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -74,7 +74,6 @@ static int render_state_setup(struct intel_render_state *so,
struct drm_i915_private *i915)
{
const struct intel_renderstate_rodata *rodata = so->rodata;
- const bool has_64bit_reloc = INTEL_GEN(i915) >= 8;
struct drm_i915_gem_object *obj = so->vma->obj;
unsigned int i = 0, reloc_index = 0;
unsigned int needs_clflush;
@@ -93,7 +92,7 @@ static int render_state_setup(struct intel_render_state *so,
if (i * 4 == rodata->reloc[reloc_index]) {
u64 r = s + so->vma->node.start;
s = lower_32_bits(r);
- if (has_64bit_reloc) {
+ if (HAS_64BIT_RELOC(i915)) {
if (i + 1 >= rodata->batch_items ||
rodata->batch[i + 1] != 0)
goto err;
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 31e6edd..2a41950 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -288,7 +288,8 @@ static const struct intel_device_info intel_haswell_info = {
#define BDW_FEATURES \
HSW_FEATURES, \
BDW_COLORS, \
- .has_logical_ring_contexts = 1
+ .has_logical_ring_contexts = 1, \
+ .has_64bit_reloc = 1
static const struct intel_device_info intel_broadwell_info = {
BDW_FEATURES,
@@ -308,6 +309,7 @@ static const struct intel_device_info intel_cherryview_info = {
.has_hotplug = 1,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
.is_cherryview = 1,
+ .has_64bit_reloc = 1,
.has_psr = 1,
.has_runtime_pm = 1,
.has_resource_streamer = 1,
@@ -347,6 +349,7 @@ static const struct intel_device_info intel_broxton_info = {
.has_hotplug = 1,
.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING,
.num_pipes = 3,
+ .has_64bit_reloc = 1,
.has_ddi = 1,
.has_fpga_dbg = 1,
.has_fbc = 1,
--
2.7.4
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v3] drm/i915: Introduce HAS_64BIT_RELOC
2016-11-03 8:39 ` [PATCH v3] " Joonas Lahtinen
@ 2016-11-03 8:56 ` Chris Wilson
0 siblings, 0 replies; 10+ messages in thread
From: Chris Wilson @ 2016-11-03 8:56 UTC (permalink / raw)
To: Joonas Lahtinen; +Cc: Intel graphics driver community testing & development
On Thu, Nov 03, 2016 at 10:39:46AM +0200, Joonas Lahtinen wrote:
> Move has_64bit_reloc into dev_priv->info. This will make it visible
> in the feature listing debug output.
>
> v2:
> - Keep the struct member to keep GCC fragile but happy (Chris)
> v3:
> - More detailed commit message (Chris)
> - Include forgotten CHV and BXT (Chris)
>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
If I haven't written a BAT test case to detect the fallout from v2,
please ping me with a baseball bat later.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
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^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Introduce HAS_64BIT_RELOC (rev3)
2016-11-02 12:32 [PATCH] drm/i915: Introduce HAS_64BIT_RELOC Joonas Lahtinen
2016-11-02 12:40 ` Chris Wilson
2016-11-02 13:19 ` ✓ Fi.CI.BAT: success for drm/i915: Introduce HAS_64BIT_RELOC (rev2) Patchwork
@ 2016-11-03 9:16 ` Patchwork
2016-11-03 10:58 ` Joonas Lahtinen
2 siblings, 1 reply; 10+ messages in thread
From: Patchwork @ 2016-11-03 9:16 UTC (permalink / raw)
To: Joonas Lahtinen; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Introduce HAS_64BIT_RELOC (rev3)
URL : https://patchwork.freedesktop.org/series/14730/
State : success
== Summary ==
Series 14730v3 drm/i915: Introduce HAS_64BIT_RELOC
https://patchwork.freedesktop.org/api/1.0/series/14730/revisions/3/mbox/
Test kms_flip:
Subgroup basic-flip-vs-wf_vblank:
skip -> PASS (fi-hsw-4770r)
skip -> PASS (fi-snb-2520m)
skip -> PASS (fi-ilk-650)
skip -> PASS (fi-ivb-3520m)
skip -> PASS (fi-snb-2600)
skip -> PASS (fi-ivb-3770)
fi-bdw-5557u total:241 pass:226 dwarn:0 dfail:0 fail:0 skip:15
fi-bsw-n3050 total:241 pass:201 dwarn:0 dfail:0 fail:0 skip:40
fi-bxt-t5700 total:241 pass:213 dwarn:0 dfail:0 fail:0 skip:28
fi-byt-j1900 total:241 pass:213 dwarn:0 dfail:0 fail:0 skip:28
fi-byt-n2820 total:241 pass:209 dwarn:0 dfail:0 fail:0 skip:32
fi-hsw-4770 total:241 pass:221 dwarn:0 dfail:0 fail:0 skip:20
fi-hsw-4770r total:241 pass:221 dwarn:0 dfail:0 fail:0 skip:20
fi-ilk-650 total:241 pass:188 dwarn:0 dfail:0 fail:0 skip:53
fi-ivb-3520m total:241 pass:219 dwarn:0 dfail:0 fail:0 skip:22
fi-ivb-3770 total:241 pass:219 dwarn:0 dfail:0 fail:0 skip:22
fi-kbl-7200u total:241 pass:219 dwarn:0 dfail:0 fail:0 skip:22
fi-skl-6260u total:241 pass:227 dwarn:0 dfail:0 fail:0 skip:14
fi-skl-6700hq total:241 pass:220 dwarn:0 dfail:0 fail:0 skip:21
fi-skl-6700k total:241 pass:219 dwarn:1 dfail:0 fail:0 skip:21
fi-skl-6770hq total:241 pass:227 dwarn:0 dfail:0 fail:0 skip:14
fi-snb-2520m total:241 pass:209 dwarn:0 dfail:0 fail:0 skip:32
fi-snb-2600 total:241 pass:208 dwarn:0 dfail:0 fail:0 skip:33
bf6b989af8b0fde56a352d9005c97b2d8e3bbbe3 drm-intel-nightly: 2016y-11m-02d-15h-44m-03s UTC integration manifest
c5f2902 drm/i915: Introduce HAS_64BIT_RELOC
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_2897/
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^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: ✓ Fi.CI.BAT: success for drm/i915: Introduce HAS_64BIT_RELOC (rev3)
2016-11-03 9:16 ` ✓ Fi.CI.BAT: success for drm/i915: Introduce HAS_64BIT_RELOC (rev3) Patchwork
@ 2016-11-03 10:58 ` Joonas Lahtinen
0 siblings, 0 replies; 10+ messages in thread
From: Joonas Lahtinen @ 2016-11-03 10:58 UTC (permalink / raw)
To: intel-gfx
On to, 2016-11-03 at 09:16 +0000, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915: Introduce HAS_64BIT_RELOC (rev3)
> URL : https://patchwork.freedesktop.org/series/14730/
> State : success
>
> == Summary ==
Committing the patch, thanks for the review.
As discussed in IRC, the obvious problem in rev2 was not caught so not
giving too much value to the all OK result.
Regards, Joonas
> == Logs ==
>
> For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_2897/
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2016-11-03 10:58 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-11-02 12:32 [PATCH] drm/i915: Introduce HAS_64BIT_RELOC Joonas Lahtinen
2016-11-02 12:40 ` Chris Wilson
2016-11-02 12:55 ` [PATCH v2] " Joonas Lahtinen
2016-11-02 13:25 ` Chris Wilson
2016-11-02 15:00 ` Joonas Lahtinen
2016-11-03 8:39 ` [PATCH v3] " Joonas Lahtinen
2016-11-03 8:56 ` Chris Wilson
2016-11-02 13:19 ` ✓ Fi.CI.BAT: success for drm/i915: Introduce HAS_64BIT_RELOC (rev2) Patchwork
2016-11-03 9:16 ` ✓ Fi.CI.BAT: success for drm/i915: Introduce HAS_64BIT_RELOC (rev3) Patchwork
2016-11-03 10:58 ` Joonas Lahtinen
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