* [PATCH] clk: qoriq: added ls1012a clock configuration
@ 2016-11-16 5:58 ` yuantian.tang at nxp.com
0 siblings, 0 replies; 10+ messages in thread
From: yuantian.tang @ 2016-11-16 5:58 UTC (permalink / raw)
To: mturquette
Cc: sboyd, linux-clk, linux-kernel, scott.wood, linux-arm-kernel,
Tang Yuantian, Tang Yuantian
From: Tang Yuantian <Yuantian.Tang@nxp.com>
Added ls1012a clock configuation information.
Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
---
drivers/clk/clk-qoriq.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index 1bece0f..563d874 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -202,6 +202,14 @@ static const struct clockgen_muxinfo ls1021a_cmux = {
}
};
+static const struct clockgen_muxinfo ls1012a_cmux = {
+ {
+ [0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
+ {},
+ [2] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
+ }
+};
+
static const struct clockgen_muxinfo t1040_cmux = {
{
[0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
@@ -482,6 +490,16 @@ static const struct clockgen_chipinfo chipinfo[] = {
.pll_mask = 0x03,
},
{
+ .compat = "fsl,ls1012a-clockgen",
+ .cmux_groups = {
+ &ls1012a_cmux
+ },
+ .cmux_to_group = {
+ 0, -1
+ },
+ .pll_mask = 0x03,
+ },
+ {
.compat = "fsl,ls1043a-clockgen",
.init_periph = t2080_init_periph,
.cmux_groups = {
@@ -1284,6 +1302,7 @@ CLK_OF_DECLARE(qoriq_clockgen_2, "fsl,qoriq-clockgen-2.0", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1021a, "fsl,ls1021a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1043a, "fsl,ls1043a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init);
+CLK_OF_DECLARE(qoriq_clockgen_ls1012a, "fsl,ls1012a-clockgen", clockgen_init);
/* Legacy nodes */
CLK_OF_DECLARE(qoriq_sysclk_1, "fsl,qoriq-sysclk-1.0", sysclk_init);
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH] clk: qoriq: added ls1012a clock configuration
@ 2016-11-16 5:58 ` yuantian.tang at nxp.com
0 siblings, 0 replies; 10+ messages in thread
From: yuantian.tang at nxp.com @ 2016-11-16 5:58 UTC (permalink / raw)
To: linux-arm-kernel
From: Tang Yuantian <Yuantian.Tang@nxp.com>
Added ls1012a clock configuation information.
Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
---
drivers/clk/clk-qoriq.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
index 1bece0f..563d874 100644
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -202,6 +202,14 @@ static const struct clockgen_muxinfo ls1021a_cmux = {
}
};
+static const struct clockgen_muxinfo ls1012a_cmux = {
+ {
+ [0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
+ {},
+ [2] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
+ }
+};
+
static const struct clockgen_muxinfo t1040_cmux = {
{
[0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
@@ -482,6 +490,16 @@ static const struct clockgen_chipinfo chipinfo[] = {
.pll_mask = 0x03,
},
{
+ .compat = "fsl,ls1012a-clockgen",
+ .cmux_groups = {
+ &ls1012a_cmux
+ },
+ .cmux_to_group = {
+ 0, -1
+ },
+ .pll_mask = 0x03,
+ },
+ {
.compat = "fsl,ls1043a-clockgen",
.init_periph = t2080_init_periph,
.cmux_groups = {
@@ -1284,6 +1302,7 @@ CLK_OF_DECLARE(qoriq_clockgen_2, "fsl,qoriq-clockgen-2.0", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1021a, "fsl,ls1021a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls1043a, "fsl,ls1043a-clockgen", clockgen_init);
CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen", clockgen_init);
+CLK_OF_DECLARE(qoriq_clockgen_ls1012a, "fsl,ls1012a-clockgen", clockgen_init);
/* Legacy nodes */
CLK_OF_DECLARE(qoriq_sysclk_1, "fsl,qoriq-sysclk-1.0", sysclk_init);
--
2.1.0.27.g96db324
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH] clk: qoriq: added ls1012a clock configuration
2016-11-16 5:58 ` yuantian.tang at nxp.com
@ 2016-11-16 6:54 ` Scott Wood
-1 siblings, 0 replies; 10+ messages in thread
From: Scott Wood @ 2016-11-16 6:54 UTC (permalink / raw)
To: yuantian.tang, mturquette
Cc: sboyd, linux-kernel, scott.wood, linux-clk, linux-arm-kernel
On Wed, 2016-11-16 at 13:58 +0800, yuantian.tang@nxp.com wrote:
> From: Tang Yuantian <Yuantian.Tang@nxp.com>
>
> Added ls1012a clock configuation information.
Do we really need the same line in the changelog twice?
>
> Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
> ---
> drivers/clk/clk-qoriq.c | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
> index 1bece0f..563d874 100644
> --- a/drivers/clk/clk-qoriq.c
> +++ b/drivers/clk/clk-qoriq.c
> @@ -202,6 +202,14 @@ static const struct clockgen_muxinfo ls1021a_cmux = {
> }
> };
>
> +static const struct clockgen_muxinfo ls1012a_cmux = {
> + {
> + [0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
> + {},
> + [2] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
> + }
> +};
> +
Based on the "ls1021a_cmux" in the context it looks like this patch is
intended to apply on top of https://patchwork.kernel.org/patch/8923541/ but I
don't see any mention of that.
> static const struct clockgen_muxinfo t1040_cmux = {
> {
> [0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
> @@ -482,6 +490,16 @@ static const struct clockgen_chipinfo chipinfo[] = {
> .pll_mask = 0x03,
> },
> {
> + .compat = "fsl,ls1012a-clockgen",
> + .cmux_groups = {
> + &ls1012a_cmux
> + },
> + .cmux_to_group = {
> + 0, -1
> + },
> + .pll_mask = 0x03,
> + },
> + {
> .compat = "fsl,ls1043a-clockgen",
> .init_periph = t2080_init_periph,
> .cmux_groups = {
> @@ -1284,6 +1302,7 @@ CLK_OF_DECLARE(qoriq_clockgen_2, "fsl,qoriq-clockgen-
> 2.0", clockgen_init);
> CLK_OF_DECLARE(qoriq_clockgen_ls1021a, "fsl,ls1021a-clockgen",
> clockgen_init);
> CLK_OF_DECLARE(qoriq_clockgen_ls1043a, "fsl,ls1043a-clockgen",
> clockgen_init);
> CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen",
> clockgen_init);
> +CLK_OF_DECLARE(qoriq_clockgen_ls1012a, "fsl,ls1012a-clockgen",
> clockgen_init);
Please keep these lists of chips sorted (or as close as you can in the case of
the cmux structs which already have some sorting issues).
-Scott
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH] clk: qoriq: added ls1012a clock configuration
@ 2016-11-16 6:54 ` Scott Wood
0 siblings, 0 replies; 10+ messages in thread
From: Scott Wood @ 2016-11-16 6:54 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, 2016-11-16 at 13:58 +0800, yuantian.tang at nxp.com wrote:
> From: Tang Yuantian <Yuantian.Tang@nxp.com>
>
> Added ls1012a clock configuation information.
Do we really need the same line in the changelog twice?
>
> Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
> ---
> ?drivers/clk/clk-qoriq.c | 19 +++++++++++++++++++
> ?1 file changed, 19 insertions(+)
>
> diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c
> index 1bece0f..563d874 100644
> --- a/drivers/clk/clk-qoriq.c
> +++ b/drivers/clk/clk-qoriq.c
> @@ -202,6 +202,14 @@ static const struct clockgen_muxinfo ls1021a_cmux = {
> ? }
> ?};
> ?
> +static const struct clockgen_muxinfo ls1012a_cmux = {
> + {
> + [0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
> + {},
> + [2] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
> + }
> +};
> +
Based on the "ls1021a_cmux" in the context it looks like this patch is
intended to apply on top of?https://patchwork.kernel.org/patch/8923541/?but I
don't see any mention of that.
> ?static const struct clockgen_muxinfo t1040_cmux = {
> ? {
> ? [0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
> @@ -482,6 +490,16 @@ static const struct clockgen_chipinfo chipinfo[] = {
> ? .pll_mask = 0x03,
> ? },
> ? {
> + .compat = "fsl,ls1012a-clockgen",
> + .cmux_groups = {
> + &ls1012a_cmux
> + },
> + .cmux_to_group = {
> + 0, -1
> + },
> + .pll_mask = 0x03,
> + },
> + {
> ? .compat = "fsl,ls1043a-clockgen",
> ? .init_periph = t2080_init_periph,
> ? .cmux_groups = {
> @@ -1284,6 +1302,7 @@ CLK_OF_DECLARE(qoriq_clockgen_2, "fsl,qoriq-clockgen-
> 2.0", clockgen_init);
> ?CLK_OF_DECLARE(qoriq_clockgen_ls1021a, "fsl,ls1021a-clockgen",
> clockgen_init);
> ?CLK_OF_DECLARE(qoriq_clockgen_ls1043a, "fsl,ls1043a-clockgen",
> clockgen_init);
> ?CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen",
> clockgen_init);
> +CLK_OF_DECLARE(qoriq_clockgen_ls1012a, "fsl,ls1012a-clockgen",
> clockgen_init);
Please keep these lists of chips sorted (or as close as you can in the case of
the cmux structs which already have some sorting issues).
-Scott
^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH] clk: qoriq: added ls1012a clock configuration
2016-11-16 6:54 ` Scott Wood
(?)
@ 2016-11-22 8:20 ` Y.T. Tang
-1 siblings, 0 replies; 10+ messages in thread
From: Y.T. Tang @ 2016-11-22 8:20 UTC (permalink / raw)
To: Scott Wood, mturquette@baylibre.com
Cc: sboyd@codeaurora.org, linux-kernel@vger.kernel.org, Scott Wood,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
SGkgU2NvdHQsDQoNCj4gLS0tLS1PcmlnaW5hbCBNZXNzYWdlLS0tLS0NCj4gRnJvbTogU2NvdHQg
V29vZCBbbWFpbHRvOm9zc0BidXNlcnJvci5uZXRdDQo+IFNlbnQ6IFdlZG5lc2RheSwgTm92ZW1i
ZXIgMTYsIDIwMTYgMjo1NCBQTQ0KPiBUbzogWS5ULiBUYW5nIDx5dWFudGlhbi50YW5nQG54cC5j
b20+OyBtdHVycXVldHRlQGJheWxpYnJlLmNvbQ0KPiBDYzogc2JveWRAY29kZWF1cm9yYS5vcmc7
IGxpbnV4LWtlcm5lbEB2Z2VyLmtlcm5lbC5vcmc7IFNjb3R0IFdvb2QNCj4gPHNjb3R0Lndvb2RA
bnhwLmNvbT47IGxpbnV4LWNsa0B2Z2VyLmtlcm5lbC5vcmc7IGxpbnV4LWFybS0NCj4ga2VybmVs
QGxpc3RzLmluZnJhZGVhZC5vcmcNCj4gU3ViamVjdDogUmU6IFtQQVRDSF0gY2xrOiBxb3JpcTog
YWRkZWQgbHMxMDEyYSBjbG9jayBjb25maWd1cmF0aW9uDQo+IA0KPiBPbiBXZWQsIDIwMTYtMTEt
MTYgYXQgMTM6NTggKzA4MDAsIHl1YW50aWFuLnRhbmdAbnhwLmNvbSB3cm90ZToNCj4gPiBGcm9t
OiBUYW5nIFl1YW50aWFuIDxZdWFudGlhbi5UYW5nQG54cC5jb20+DQo+ID4NCj4gPiBBZGRlZCBs
czEwMTJhIGNsb2NrIGNvbmZpZ3VhdGlvbiBpbmZvcm1hdGlvbi4NCj4gDQo+IERvIHdlIHJlYWxs
eSBuZWVkIHRoZSBzYW1lIGxpbmUgaW4gdGhlIGNoYW5nZWxvZyB0d2ljZT8NCj4gDQo+ID4NCj4g
PiBTaWduZWQtb2ZmLWJ5OiBUYW5nIFl1YW50aWFuIDx5dWFudGlhbi50YW5nQG54cC5jb20+DQo+
ID4gLS0tDQo+ID4gwqBkcml2ZXJzL2Nsay9jbGstcW9yaXEuYyB8IDE5ICsrKysrKysrKysrKysr
KysrKysNCj4gPiDCoDEgZmlsZSBjaGFuZ2VkLCAxOSBpbnNlcnRpb25zKCspDQo+ID4NCj4gPiBk
aWZmIC0tZ2l0IGEvZHJpdmVycy9jbGsvY2xrLXFvcmlxLmMgYi9kcml2ZXJzL2Nsay9jbGstcW9y
aXEuYyBpbmRleA0KPiA+IDFiZWNlMGYuLjU2M2Q4NzQgMTAwNjQ0DQo+ID4gLS0tIGEvZHJpdmVy
cy9jbGsvY2xrLXFvcmlxLmMNCj4gPiArKysgYi9kcml2ZXJzL2Nsay9jbGstcW9yaXEuYw0KPiA+
IEBAIC0yMDIsNiArMjAyLDE0IEBAIHN0YXRpYyBjb25zdCBzdHJ1Y3QgY2xvY2tnZW5fbXV4aW5m
byBsczEwMjFhX2NtdXgNCj4gPSB7DQo+ID4gwqAJfQ0KPiA+IMKgfTsNCj4gPg0KPiA+ICtzdGF0
aWMgY29uc3Qgc3RydWN0IGNsb2NrZ2VuX211eGluZm8gbHMxMDEyYV9jbXV4ID0gew0KPiA+ICsJ
ew0KPiA+ICsJCVswXSA9IHsgQ0xLU0VMX1ZBTElELCBDR0FfUExMMSwgUExMX0RJVjEgfSwNCj4g
PiArCQl7fSwNCj4gPiArCQlbMl0gPSB7IENMS1NFTF9WQUxJRCwgQ0dBX1BMTDEsIFBMTF9ESVYy
IH0sDQo+ID4gKwl9DQo+ID4gK307DQo+ID4gKw0KPiANCj4gQmFzZWQgb24gdGhlICJsczEwMjFh
X2NtdXgiIGluIHRoZSBjb250ZXh0IGl0IGxvb2tzIGxpa2UgdGhpcyBwYXRjaCBpcw0KPiBpbnRl
bmRlZCB0byBhcHBseSBvbiB0b3ANCj4gb2bCoGh0dHBzOi8vcGF0Y2h3b3JrLmtlcm5lbC5vcmcv
cGF0Y2gvODkyMzU0MS/CoGJ1dCBJIGRvbid0IHNlZSBhbnkgbWVudGlvbg0KPiBvZiB0aGF0Lg0K
PiANCkkgc2F3IHRoaXMgcGF0Y2ggaGFkIGJlZW4gbWVyZ2VkIGFscmVhZHkuDQoNClJlZ2FyZHMs
DQpZdWFudGlhbg0KDQo+ID4gwqBzdGF0aWMgY29uc3Qgc3RydWN0IGNsb2NrZ2VuX211eGluZm8g
dDEwNDBfY211eCA9IHsNCj4gPiDCoAl7DQo+ID4gwqAJCVswXSA9IHsgQ0xLU0VMX1ZBTElELCBD
R0FfUExMMSwgUExMX0RJVjEgfSwgQEAgLTQ4Miw2DQo+ICs0OTAsMTYgQEANCj4gPiBzdGF0aWMg
Y29uc3Qgc3RydWN0IGNsb2NrZ2VuX2NoaXBpbmZvIGNoaXBpbmZvW10gPSB7DQo+ID4gwqAJCS5w
bGxfbWFzayA9IDB4MDMsDQo+ID4gwqAJfSwNCj4gPiDCoAl7DQo+ID4gKwkJLmNvbXBhdCA9ICJm
c2wsbHMxMDEyYS1jbG9ja2dlbiIsDQo+ID4gKwkJLmNtdXhfZ3JvdXBzID0gew0KPiA+ICsJCQkm
bHMxMDEyYV9jbXV4DQo+ID4gKwkJfSwNCj4gPiArCQkuY211eF90b19ncm91cCA9IHsNCj4gPiAr
CQkJMCwgLTENCj4gPiArCQl9LA0KPiA+ICsJCS5wbGxfbWFzayA9IDB4MDMsDQo+ID4gKwl9LA0K
PiA+ICsJew0KPiA+IMKgCQkuY29tcGF0ID0gImZzbCxsczEwNDNhLWNsb2NrZ2VuIiwNCj4gPiDC
oAkJLmluaXRfcGVyaXBoID0gdDIwODBfaW5pdF9wZXJpcGgsDQo+ID4gwqAJCS5jbXV4X2dyb3Vw
cyA9IHsNCj4gPiBAQCAtMTI4NCw2ICsxMzAyLDcgQEAgQ0xLX09GX0RFQ0xBUkUocW9yaXFfY2xv
Y2tnZW5fMiwNCj4gPiAiZnNsLHFvcmlxLWNsb2NrZ2VuLSAyLjAiLCBjbG9ja2dlbl9pbml0KTsN
Cj4gPiDCoENMS19PRl9ERUNMQVJFKHFvcmlxX2Nsb2NrZ2VuX2xzMTAyMWEsICJmc2wsbHMxMDIx
YS1jbG9ja2dlbiIsDQo+ID4gY2xvY2tnZW5faW5pdCk7DQo+ID4gwqBDTEtfT0ZfREVDTEFSRShx
b3JpcV9jbG9ja2dlbl9sczEwNDNhLCAiZnNsLGxzMTA0M2EtY2xvY2tnZW4iLA0KPiA+IGNsb2Nr
Z2VuX2luaXQpOw0KPiA+IMKgQ0xLX09GX0RFQ0xBUkUocW9yaXFfY2xvY2tnZW5fbHMyMDgwYSwg
ImZzbCxsczIwODBhLWNsb2NrZ2VuIiwNCj4gPiBjbG9ja2dlbl9pbml0KTsNCj4gPiArQ0xLX09G
X0RFQ0xBUkUocW9yaXFfY2xvY2tnZW5fbHMxMDEyYSwgImZzbCxsczEwMTJhLWNsb2NrZ2VuIiwN
Cj4gPiBjbG9ja2dlbl9pbml0KTsNCj4gDQo+IFBsZWFzZSBrZWVwIHRoZXNlIGxpc3RzIG9mIGNo
aXBzIHNvcnRlZCAob3IgYXMgY2xvc2UgYXMgeW91IGNhbiBpbiB0aGUgY2FzZSBvZg0KPiB0aGUg
Y211eCBzdHJ1Y3RzIHdoaWNoIGFscmVhZHkgaGF2ZSBzb21lIHNvcnRpbmcgaXNzdWVzKS4NCj4g
DQo+IC1TY290dA0KDQo=
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH] clk: qoriq: added ls1012a clock configuration
@ 2016-11-22 8:20 ` Y.T. Tang
0 siblings, 0 replies; 10+ messages in thread
From: Y.T. Tang @ 2016-11-22 8:20 UTC (permalink / raw)
To: linux-arm-kernel
Hi Scott,
> -----Original Message-----
> From: Scott Wood [mailto:oss at buserror.net]
> Sent: Wednesday, November 16, 2016 2:54 PM
> To: Y.T. Tang <yuantian.tang@nxp.com>; mturquette at baylibre.com
> Cc: sboyd at codeaurora.org; linux-kernel at vger.kernel.org; Scott Wood
> <scott.wood@nxp.com>; linux-clk at vger.kernel.org; linux-arm-
> kernel at lists.infradead.org
> Subject: Re: [PATCH] clk: qoriq: added ls1012a clock configuration
>
> On Wed, 2016-11-16 at 13:58 +0800, yuantian.tang at nxp.com wrote:
> > From: Tang Yuantian <Yuantian.Tang@nxp.com>
> >
> > Added ls1012a clock configuation information.
>
> Do we really need the same line in the changelog twice?
>
> >
> > Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
> > ---
> > ?drivers/clk/clk-qoriq.c | 19 +++++++++++++++++++
> > ?1 file changed, 19 insertions(+)
> >
> > diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c index
> > 1bece0f..563d874 100644
> > --- a/drivers/clk/clk-qoriq.c
> > +++ b/drivers/clk/clk-qoriq.c
> > @@ -202,6 +202,14 @@ static const struct clockgen_muxinfo ls1021a_cmux
> = {
> > ? }
> > ?};
> >
> > +static const struct clockgen_muxinfo ls1012a_cmux = {
> > + {
> > + [0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
> > + {},
> > + [2] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
> > + }
> > +};
> > +
>
> Based on the "ls1021a_cmux" in the context it looks like this patch is
> intended to apply on top
> of?https://patchwork.kernel.org/patch/8923541/?but I don't see any mention
> of that.
>
I saw this patch had been merged already.
Regards,
Yuantian
> > ?static const struct clockgen_muxinfo t1040_cmux = {
> > ? {
> > ? [0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 }, @@ -482,6
> +490,16 @@
> > static const struct clockgen_chipinfo chipinfo[] = {
> > ? .pll_mask = 0x03,
> > ? },
> > ? {
> > + .compat = "fsl,ls1012a-clockgen",
> > + .cmux_groups = {
> > + &ls1012a_cmux
> > + },
> > + .cmux_to_group = {
> > + 0, -1
> > + },
> > + .pll_mask = 0x03,
> > + },
> > + {
> > ? .compat = "fsl,ls1043a-clockgen",
> > ? .init_periph = t2080_init_periph,
> > ? .cmux_groups = {
> > @@ -1284,6 +1302,7 @@ CLK_OF_DECLARE(qoriq_clockgen_2,
> > "fsl,qoriq-clockgen- 2.0", clockgen_init);
> > ?CLK_OF_DECLARE(qoriq_clockgen_ls1021a, "fsl,ls1021a-clockgen",
> > clockgen_init);
> > ?CLK_OF_DECLARE(qoriq_clockgen_ls1043a, "fsl,ls1043a-clockgen",
> > clockgen_init);
> > ?CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen",
> > clockgen_init);
> > +CLK_OF_DECLARE(qoriq_clockgen_ls1012a, "fsl,ls1012a-clockgen",
> > clockgen_init);
>
> Please keep these lists of chips sorted (or as close as you can in the case of
> the cmux structs which already have some sorting issues).
>
> -Scott
^ permalink raw reply [flat|nested] 10+ messages in thread
* RE: [PATCH] clk: qoriq: added ls1012a clock configuration
@ 2016-11-22 8:20 ` Y.T. Tang
0 siblings, 0 replies; 10+ messages in thread
From: Y.T. Tang @ 2016-11-22 8:20 UTC (permalink / raw)
To: Scott Wood, mturquette@baylibre.com
Cc: sboyd@codeaurora.org, linux-kernel@vger.kernel.org, Scott Wood,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Hi Scott,
> -----Original Message-----
> From: Scott Wood [mailto:oss@buserror.net]
> Sent: Wednesday, November 16, 2016 2:54 PM
> To: Y.T. Tang <yuantian.tang@nxp.com>; mturquette@baylibre.com
> Cc: sboyd@codeaurora.org; linux-kernel@vger.kernel.org; Scott Wood
> <scott.wood@nxp.com>; linux-clk@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org
> Subject: Re: [PATCH] clk: qoriq: added ls1012a clock configuration
>
> On Wed, 2016-11-16 at 13:58 +0800, yuantian.tang@nxp.com wrote:
> > From: Tang Yuantian <Yuantian.Tang@nxp.com>
> >
> > Added ls1012a clock configuation information.
>
> Do we really need the same line in the changelog twice?
>
> >
> > Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
> > ---
> > drivers/clk/clk-qoriq.c | 19 +++++++++++++++++++
> > 1 file changed, 19 insertions(+)
> >
> > diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c index
> > 1bece0f..563d874 100644
> > --- a/drivers/clk/clk-qoriq.c
> > +++ b/drivers/clk/clk-qoriq.c
> > @@ -202,6 +202,14 @@ static const struct clockgen_muxinfo ls1021a_cmux
> = {
> > }
> > };
> >
> > +static const struct clockgen_muxinfo ls1012a_cmux = {
> > + {
> > + [0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
> > + {},
> > + [2] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
> > + }
> > +};
> > +
>
> Based on the "ls1021a_cmux" in the context it looks like this patch is
> intended to apply on top
> of https://patchwork.kernel.org/patch/8923541/ but I don't see any mention
> of that.
>
I saw this patch had been merged already.
Regards,
Yuantian
> > static const struct clockgen_muxinfo t1040_cmux = {
> > {
> > [0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 }, @@ -482,6
> +490,16 @@
> > static const struct clockgen_chipinfo chipinfo[] = {
> > .pll_mask = 0x03,
> > },
> > {
> > + .compat = "fsl,ls1012a-clockgen",
> > + .cmux_groups = {
> > + &ls1012a_cmux
> > + },
> > + .cmux_to_group = {
> > + 0, -1
> > + },
> > + .pll_mask = 0x03,
> > + },
> > + {
> > .compat = "fsl,ls1043a-clockgen",
> > .init_periph = t2080_init_periph,
> > .cmux_groups = {
> > @@ -1284,6 +1302,7 @@ CLK_OF_DECLARE(qoriq_clockgen_2,
> > "fsl,qoriq-clockgen- 2.0", clockgen_init);
> > CLK_OF_DECLARE(qoriq_clockgen_ls1021a, "fsl,ls1021a-clockgen",
> > clockgen_init);
> > CLK_OF_DECLARE(qoriq_clockgen_ls1043a, "fsl,ls1043a-clockgen",
> > clockgen_init);
> > CLK_OF_DECLARE(qoriq_clockgen_ls2080a, "fsl,ls2080a-clockgen",
> > clockgen_init);
> > +CLK_OF_DECLARE(qoriq_clockgen_ls1012a, "fsl,ls1012a-clockgen",
> > clockgen_init);
>
> Please keep these lists of chips sorted (or as close as you can in the case of
> the cmux structs which already have some sorting issues).
>
> -Scott
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] clk: qoriq: added ls1012a clock configuration
2016-11-22 8:20 ` Y.T. Tang
(?)
@ 2016-11-23 7:21 ` Scott Wood
-1 siblings, 0 replies; 10+ messages in thread
From: Scott Wood @ 2016-11-23 7:21 UTC (permalink / raw)
To: Y.T. Tang, Scott Wood, mturquette@baylibre.com
Cc: sboyd@codeaurora.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
On 11/22/2016 02:20 AM, Y.T. Tang wrote:=0A=
> Hi Scott,=0A=
> =0A=
>> -----Original Message-----=0A=
>> From: Scott Wood [mailto:oss@buserror.net]=0A=
>> Sent: Wednesday, November 16, 2016 2:54 PM=0A=
>> To: Y.T. Tang <yuantian.tang@nxp.com>; mturquette@baylibre.com=0A=
>> Cc: sboyd@codeaurora.org; linux-kernel@vger.kernel.org; Scott Wood=0A=
>> <scott.wood@nxp.com>; linux-clk@vger.kernel.org; linux-arm-=0A=
>> kernel@lists.infradead.org=0A=
>> Subject: Re: [PATCH] clk: qoriq: added ls1012a clock configuration=0A=
>>=0A=
>> On Wed, 2016-11-16 at 13:58 +0800, yuantian.tang@nxp.com wrote:=0A=
>>> From: Tang Yuantian <Yuantian.Tang@nxp.com>=0A=
>>>=0A=
>>> Added ls1012a clock configuation information.=0A=
>>=0A=
>> Do we really need the same line in the changelog twice?=0A=
>>=0A=
>>>=0A=
>>> Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>=0A=
>>> ---=0A=
>>> drivers/clk/clk-qoriq.c | 19 +++++++++++++++++++=0A=
>>> 1 file changed, 19 insertions(+)=0A=
>>>=0A=
>>> diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c index=0A=
>>> 1bece0f..563d874 100644=0A=
>>> --- a/drivers/clk/clk-qoriq.c=0A=
>>> +++ b/drivers/clk/clk-qoriq.c=0A=
>>> @@ -202,6 +202,14 @@ static const struct clockgen_muxinfo ls1021a_cmux=
=0A=
>> =3D {=0A=
>>> }=0A=
>>> };=0A=
>>>=0A=
>>> +static const struct clockgen_muxinfo ls1012a_cmux =3D {=0A=
>>> + {=0A=
>>> + [0] =3D { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },=0A=
>>> + {},=0A=
>>> + [2] =3D { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },=0A=
>>> + }=0A=
>>> +};=0A=
>>> +=0A=
>>=0A=
>> Based on the "ls1021a_cmux" in the context it looks like this patch is=
=0A=
>> intended to apply on top=0A=
>> of https://patchwork.kernel.org/patch/8923541/ but I don't see any menti=
on=0A=
>> of that.=0A=
>>=0A=
> I saw this patch had been merged already.=0A=
> =0A=
> Regards,=0A=
> Yuantian=0A=
=0A=
I don't see it in linux-next.=0A=
=0A=
-Scott=0A=
=0A=
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH] clk: qoriq: added ls1012a clock configuration
@ 2016-11-23 7:21 ` Scott Wood
0 siblings, 0 replies; 10+ messages in thread
From: Scott Wood @ 2016-11-23 7:21 UTC (permalink / raw)
To: linux-arm-kernel
On 11/22/2016 02:20 AM, Y.T. Tang wrote:
> Hi Scott,
>
>> -----Original Message-----
>> From: Scott Wood [mailto:oss at buserror.net]
>> Sent: Wednesday, November 16, 2016 2:54 PM
>> To: Y.T. Tang <yuantian.tang@nxp.com>; mturquette at baylibre.com
>> Cc: sboyd at codeaurora.org; linux-kernel at vger.kernel.org; Scott Wood
>> <scott.wood@nxp.com>; linux-clk at vger.kernel.org; linux-arm-
>> kernel at lists.infradead.org
>> Subject: Re: [PATCH] clk: qoriq: added ls1012a clock configuration
>>
>> On Wed, 2016-11-16 at 13:58 +0800, yuantian.tang at nxp.com wrote:
>>> From: Tang Yuantian <Yuantian.Tang@nxp.com>
>>>
>>> Added ls1012a clock configuation information.
>>
>> Do we really need the same line in the changelog twice?
>>
>>>
>>> Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
>>> ---
>>> drivers/clk/clk-qoriq.c | 19 +++++++++++++++++++
>>> 1 file changed, 19 insertions(+)
>>>
>>> diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c index
>>> 1bece0f..563d874 100644
>>> --- a/drivers/clk/clk-qoriq.c
>>> +++ b/drivers/clk/clk-qoriq.c
>>> @@ -202,6 +202,14 @@ static const struct clockgen_muxinfo ls1021a_cmux
>> = {
>>> }
>>> };
>>>
>>> +static const struct clockgen_muxinfo ls1012a_cmux = {
>>> + {
>>> + [0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
>>> + {},
>>> + [2] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
>>> + }
>>> +};
>>> +
>>
>> Based on the "ls1021a_cmux" in the context it looks like this patch is
>> intended to apply on top
>> of https://patchwork.kernel.org/patch/8923541/ but I don't see any mention
>> of that.
>>
> I saw this patch had been merged already.
>
> Regards,
> Yuantian
I don't see it in linux-next.
-Scott
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH] clk: qoriq: added ls1012a clock configuration
@ 2016-11-23 7:21 ` Scott Wood
0 siblings, 0 replies; 10+ messages in thread
From: Scott Wood @ 2016-11-23 7:21 UTC (permalink / raw)
To: Y.T. Tang, Scott Wood, mturquette@baylibre.com
Cc: sboyd@codeaurora.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
On 11/22/2016 02:20 AM, Y.T. Tang wrote:
> Hi Scott,
>
>> -----Original Message-----
>> From: Scott Wood [mailto:oss@buserror.net]
>> Sent: Wednesday, November 16, 2016 2:54 PM
>> To: Y.T. Tang <yuantian.tang@nxp.com>; mturquette@baylibre.com
>> Cc: sboyd@codeaurora.org; linux-kernel@vger.kernel.org; Scott Wood
>> <scott.wood@nxp.com>; linux-clk@vger.kernel.org; linux-arm-
>> kernel@lists.infradead.org
>> Subject: Re: [PATCH] clk: qoriq: added ls1012a clock configuration
>>
>> On Wed, 2016-11-16 at 13:58 +0800, yuantian.tang@nxp.com wrote:
>>> From: Tang Yuantian <Yuantian.Tang@nxp.com>
>>>
>>> Added ls1012a clock configuation information.
>>
>> Do we really need the same line in the changelog twice?
>>
>>>
>>> Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
>>> ---
>>> drivers/clk/clk-qoriq.c | 19 +++++++++++++++++++
>>> 1 file changed, 19 insertions(+)
>>>
>>> diff --git a/drivers/clk/clk-qoriq.c b/drivers/clk/clk-qoriq.c index
>>> 1bece0f..563d874 100644
>>> --- a/drivers/clk/clk-qoriq.c
>>> +++ b/drivers/clk/clk-qoriq.c
>>> @@ -202,6 +202,14 @@ static const struct clockgen_muxinfo ls1021a_cmux
>> = {
>>> }
>>> };
>>>
>>> +static const struct clockgen_muxinfo ls1012a_cmux = {
>>> + {
>>> + [0] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV1 },
>>> + {},
>>> + [2] = { CLKSEL_VALID, CGA_PLL1, PLL_DIV2 },
>>> + }
>>> +};
>>> +
>>
>> Based on the "ls1021a_cmux" in the context it looks like this patch is
>> intended to apply on top
>> of https://patchwork.kernel.org/patch/8923541/ but I don't see any mention
>> of that.
>>
> I saw this patch had been merged already.
>
> Regards,
> Yuantian
I don't see it in linux-next.
-Scott
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2016-11-23 9:56 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-11-16 5:58 [PATCH] clk: qoriq: added ls1012a clock configuration yuantian.tang
2016-11-16 5:58 ` yuantian.tang at nxp.com
2016-11-16 6:54 ` Scott Wood
2016-11-16 6:54 ` Scott Wood
2016-11-22 8:20 ` Y.T. Tang
2016-11-22 8:20 ` Y.T. Tang
2016-11-22 8:20 ` Y.T. Tang
2016-11-23 7:21 ` Scott Wood
2016-11-23 7:21 ` Scott Wood
2016-11-23 7:21 ` Scott Wood
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.