From: Imre Deak <imre.deak@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v5 2/3] drm/i915/gen9: Fix PCODE polling during CDCLK change notification
Date: Mon, 28 Nov 2016 20:55:29 +0200 [thread overview]
Message-ID: <1480359329.24456.85.camel@intel.com> (raw)
In-Reply-To: <20161128171313.GA23336@nuc-i3427.alporthouse.com>
On ma, 2016-11-28 at 17:13 +0000, Chris Wilson wrote:
> On Mon, Nov 28, 2016 at 06:40:33PM +0200, Imre Deak wrote:
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 66c62f3..4e06e92 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -7864,6 +7864,59 @@ int sandybridge_pcode_write(struct drm_i915_private *dev_priv,
> > return 0;
> > }
> >
> > +static bool skl_pcode_try_request(struct drm_i915_private *dev_priv, u32 mbox,
> > + u32 request, u32 reply_mask, u32 reply,
> > + u32 *status)
> > +{
> > + u32 val = request;
> > +
> > + *status = sandybridge_pcode_read(dev_priv, mbox, &val);
>
> Hmm. This in turn uses a plain wait_for() that we want to stop relying
> on drm_can_sleep() in future. Right now, it's ok but we're just making
> things harder for ourselves later. I'm not keen on the alternative
> though (passing around I am atomic flags, or making more things atomic
> by default). :|
Another way would be to factor out common parts of
sandybridge_pcode_read/write and implement skl_pcode_try_request() in
terms of those parts. But not sure if that would look better than just
passing an is_atomic flag to sandybridge_pcode_read().
> -Chris
>
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next prev parent reply other threads:[~2016-11-28 18:55 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-11-28 15:29 [PATCH v4 1/3] drm/i915/gen6+: Clear upper data byte during PCODE write Imre Deak
2016-11-28 15:29 ` [PATCH v4 2/3] drm/i915/gen9: Fix PCODE polling during CDCLK change notification Imre Deak
2016-11-28 15:58 ` Ville Syrjälä
2016-11-28 16:12 ` Imre Deak
2016-11-28 16:24 ` Ville Syrjälä
2016-11-28 16:40 ` [PATCH v5 " Imre Deak
2016-11-28 17:13 ` Chris Wilson
2016-11-28 18:55 ` Imre Deak [this message]
2016-11-28 15:29 ` [PATCH v4 3/3] drm/i915/gen9: Fix PCODE polling during SAGV disabling Imre Deak
2016-11-28 15:45 ` ✓ Fi.CI.BAT: success for series starting with [v4,1/3] drm/i915/gen6+: Clear upper data byte during PCODE write Patchwork
2016-11-28 17:15 ` ✓ Fi.CI.BAT: success for series starting with [v4,1/3] drm/i915/gen6+: Clear upper data byte during PCODE write (rev2) Patchwork
2016-12-02 14:45 ` Imre Deak
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