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* [PATCH 1/3] drm/i915/DMC/GLK: Load DMC on GLK
@ 2016-12-16 15:42 Ander Conselvan de Oliveira
  2016-12-16 15:42 ` [PATCH 2/3] drm/i915/glk: Add missing bits to allow runtime pm suspend " Ander Conselvan de Oliveira
                   ` (5 more replies)
  0 siblings, 6 replies; 15+ messages in thread
From: Ander Conselvan de Oliveira @ 2016-12-16 15:42 UTC (permalink / raw)
  To: intel-gfx; +Cc: Rodrigo Vivi

From: Anusha Srivatsa <anusha.srivatsa@intel.com>

This patch loads the DMC on GLK. There is a single
firmware image for all steppings on a GLK.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/i915/intel_csr.c | 12 ++++++++++--
 1 file changed, 10 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index 9cbb8d8..0085bc7 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -34,6 +34,10 @@
  * low-power state and comes back to normal.
  */
 
+#define I915_CSR_GLK "i915/glk_dmc_ver1_01.bin"
+MODULE_FIRMWARE(I915_CSR_GLK);
+#define GLK_CSR_VERSION_REQUIRED	CSR_VERSION(1, 1)
+
 #define I915_CSR_KBL "i915/kbl_dmc_ver1_01.bin"
 MODULE_FIRMWARE(I915_CSR_KBL);
 #define KBL_CSR_VERSION_REQUIRED	CSR_VERSION(1, 1)
@@ -286,7 +290,9 @@ static uint32_t *parse_csr_fw(struct drm_i915_private *dev_priv,
 
 	csr->version = css_header->version;
 
-	if (IS_KABYLAKE(dev_priv)) {
+	if (IS_GEMINILAKE(dev_priv)) {
+		required_version = GLK_CSR_VERSION_REQUIRED;
+	} else if (IS_KABYLAKE(dev_priv)) {
 		required_version = KBL_CSR_VERSION_REQUIRED;
 	} else if (IS_SKYLAKE(dev_priv)) {
 		required_version = SKL_CSR_VERSION_REQUIRED;
@@ -435,7 +441,9 @@ void intel_csr_ucode_init(struct drm_i915_private *dev_priv)
 	if (!HAS_CSR(dev_priv))
 		return;
 
-	if (IS_KABYLAKE(dev_priv))
+	if (IS_GEMINILAKE(dev_priv))
+		csr->fw_path = I915_CSR_GLK;
+	else if (IS_KABYLAKE(dev_priv))
 		csr->fw_path = I915_CSR_KBL;
 	else if (IS_SKYLAKE(dev_priv))
 		csr->fw_path = I915_CSR_SKL;
-- 
2.5.5

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^ permalink raw reply related	[flat|nested] 15+ messages in thread

end of thread, other threads:[~2017-01-10  9:52 UTC | newest]

Thread overview: 15+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-12-16 15:42 [PATCH 1/3] drm/i915/DMC/GLK: Load DMC on GLK Ander Conselvan de Oliveira
2016-12-16 15:42 ` [PATCH 2/3] drm/i915/glk: Add missing bits to allow runtime pm suspend " Ander Conselvan de Oliveira
2016-12-16 15:42 ` [PATCH 3/3] drm/i915/glk: Convert a few more IS_BROXTON() to IS_GEN9_LP() Ander Conselvan de Oliveira
2016-12-19 13:17   ` Tomasz Lis
2017-01-09 14:51   ` [PATCH v2] " Ander Conselvan de Oliveira
2017-01-09 17:11     ` Vivi, Rodrigo
2017-01-10  9:52       ` Tomasz Lis
2016-12-16 17:52 ` ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915/DMC/GLK: Load DMC on GLK Patchwork
2016-12-20 12:53 ` Patchwork
2016-12-20 14:34   ` Ander Conselvan De Oliveira
2016-12-20 14:46     ` Chris Wilson
2016-12-20 15:10       ` Ander Conselvan De Oliveira
2017-01-09  9:23 ` ✓ Fi.CI.BAT: success " Patchwork
2017-01-09 15:53 ` ✗ Fi.CI.BAT: warning for series starting with [1/3] drm/i915/DMC/GLK: Load DMC on GLK (rev2) Patchwork
2017-01-10  9:09   ` Ander Conselvan De Oliveira

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