diff for duplicates of <1487044759.21048.24.camel@neuling.org> diff --git a/a/1.txt b/N1/1.txt index bb2e9fa..9c7d876 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,14 +1,11 @@ On Thu, 2017-02-09 at 08:30 +0530, Aneesh Kumar K.V wrote: -> With this our protnone becomes a present pte with READ/WRITE/EXEC bit cle= -ared. -> By default we also set _PAGE_PRIVILEGED on such pte. This is now used to = -help +> With this our protnone becomes a present pte with READ/WRITE/EXEC bit cleared. +> By default we also set _PAGE_PRIVILEGED on such pte. This is now used to help > us identify a protnone pte that as saved write bit. For such pte, we will > clear -> the _PAGE_PRIVILEGED bit. The pte still remain non-accessible from both u= -ser +> the _PAGE_PRIVILEGED bit. The pte still remain non-accessible from both user > and kernel. ->=20 +> > Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> @@ -17,61 +14,58 @@ FWIW I've tested this, so: Acked-By: Michael Neuling <mikey@neuling.org> > --- -> =C2=A0arch/powerpc/include/asm/book3s/64/mmu-hash.h |=C2=A0=C2=A03 +++ -> =C2=A0arch/powerpc/include/asm/book3s/64/pgtable.h=C2=A0=C2=A0| 32 ++++++= -+++++++++++++++++++- +> arch/powerpc/include/asm/book3s/64/mmu-hash.h | 3 +++ +> arch/powerpc/include/asm/book3s/64/pgtable.h | 32 +++++++++++++++++++++++++- > - -> =C2=A02 files changed, 33 insertions(+), 2 deletions(-) ->=20 +> 2 files changed, 33 insertions(+), 2 deletions(-) +> > diff --git a/arch/powerpc/include/asm/book3s/64/mmu-hash.h > b/arch/powerpc/include/asm/book3s/64/mmu-hash.h > index 0735d5a8049f..8720a406bbbe 100644 > --- a/arch/powerpc/include/asm/book3s/64/mmu-hash.h > +++ b/arch/powerpc/include/asm/book3s/64/mmu-hash.h > @@ -16,6 +16,9 @@ -> =C2=A0#include <asm/page.h> -> =C2=A0#include <asm/bug.h> -> =C2=A0 +> #include <asm/page.h> +> #include <asm/bug.h> +> > +#ifndef __ASSEMBLY__ > +#include <linux/mmdebug.h> > +#endif -> =C2=A0/* -> =C2=A0 * This is necessary to get the definition of PGTABLE_RANGE which w= -e -> =C2=A0 * need for various slices related matters. Note that this isn't th= -e +> /* +> * This is necessary to get the definition of PGTABLE_RANGE which we +> * need for various slices related matters. Note that this isn't the > diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h > b/arch/powerpc/include/asm/book3s/64/pgtable.h > index e91ada786d48..efff910a84b1 100644 > --- a/arch/powerpc/include/asm/book3s/64/pgtable.h > +++ b/arch/powerpc/include/asm/book3s/64/pgtable.h > @@ -443,8 +443,8 @@ static inline pte_t pte_clear_soft_dirty(pte_t pte) -> =C2=A0 */ -> =C2=A0static inline int pte_protnone(pte_t pte) -> =C2=A0{ +> */ +> static inline int pte_protnone(pte_t pte) +> { > - return (pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_PRIVILEGED)) -> =3D=3D +> == > - cpu_to_be64(_PAGE_PRESENT | _PAGE_PRIVILEGED); -> + return (pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_RWX)) =3D=3D +> + return (pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_RWX)) == > + cpu_to_be64(_PAGE_PRESENT); -> =C2=A0} -> =C2=A0#endif /* CONFIG_NUMA_BALANCING */ -> =C2=A0 +> } +> #endif /* CONFIG_NUMA_BALANCING */ +> > @@ -514,6 +514,32 @@ static inline pte_t pte_mkhuge(pte_t pte) -> =C2=A0 return pte; -> =C2=A0} -> =C2=A0 +> return pte; +> } +> > +#define pte_mk_savedwrite pte_mk_savedwrite > +static inline pte_t pte_mk_savedwrite(pte_t pte) > +{ > + /* -> + =C2=A0* Used by Autonuma subsystem to preserve the write bit -> + =C2=A0* while marking the pte PROT_NONE. Only allow this -> + =C2=A0* on PROT_NONE pte -> + =C2=A0*/ +> + * Used by Autonuma subsystem to preserve the write bit +> + * while marking the pte PROT_NONE. Only allow this +> + * on PROT_NONE pte +> + */ > + VM_BUG_ON((pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_RWX | -> _PAGE_PRIVILEGED)) !=3D -> + =C2=A0=C2=A0cpu_to_be64(_PAGE_PRESENT | _PAGE_PRIVILEGED)); +> _PAGE_PRIVILEGED)) != +> + cpu_to_be64(_PAGE_PRESENT | _PAGE_PRIVILEGED)); > + return __pte(pte_val(pte) & ~_PAGE_PRIVILEGED); > +} > + @@ -79,33 +73,32 @@ e > +static inline bool pte_savedwrite(pte_t pte) > +{ > + /* -> + =C2=A0* Saved write ptes are prot none ptes that doesn't have -> + =C2=A0* privileged bit sit. We mark prot none as one which has -> + =C2=A0* present and pviliged bit set and RWX cleared. To mark -> + =C2=A0* protnone which used to have _PAGE_WRITE set we clear -> + =C2=A0* the privileged bit. -> + =C2=A0*/ +> + * Saved write ptes are prot none ptes that doesn't have +> + * privileged bit sit. We mark prot none as one which has +> + * present and pviliged bit set and RWX cleared. To mark +> + * protnone which used to have _PAGE_WRITE set we clear +> + * the privileged bit. +> + */ > + return !(pte_raw(pte) & cpu_to_be64(_PAGE_RWX | _PAGE_PRIVILEGED)); > +} > + -> =C2=A0static inline pte_t pte_mkdevmap(pte_t pte) -> =C2=A0{ -> =C2=A0 return __pte(pte_val(pte) | _PAGE_SPECIAL|_PAGE_DEVMAP); +> static inline pte_t pte_mkdevmap(pte_t pte) +> { +> return __pte(pte_val(pte) | _PAGE_SPECIAL|_PAGE_DEVMAP); > @@ -885,6 +911,7 @@ static inline pte_t *pmdp_ptep(pmd_t *pmd) -> =C2=A0#define pmd_mkclean(pmd) pte_pmd(pte_mkclean(pmd_pte(pmd))) -> =C2=A0#define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd))) -> =C2=A0#define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd))) +> #define pmd_mkclean(pmd) pte_pmd(pte_mkclean(pmd_pte(pmd))) +> #define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd))) +> #define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd))) > +#define pmd_mk_savedwrite(pmd) pte_pmd(pte_mk_savedwrite(pmd_pte(pmd)) > ) -> =C2=A0 -> =C2=A0#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY -> =C2=A0#define pmd_soft_dirty(pmd)=C2=A0=C2=A0=C2=A0=C2=A0pte_soft_dirty(p= -md_pte(pmd)) +> +> #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY +> #define pmd_soft_dirty(pmd) pte_soft_dirty(pmd_pte(pmd)) > @@ -901,6 +928,7 @@ static inline int pmd_protnone(pmd_t pmd) -> =C2=A0 -> =C2=A0#define __HAVE_ARCH_PMD_WRITE -> =C2=A0#define pmd_write(pmd) pte_write(pmd_pte(pmd)) +> +> #define __HAVE_ARCH_PMD_WRITE +> #define pmd_write(pmd) pte_write(pmd_pte(pmd)) > +#define pmd_savedwrite(pmd) pte_savedwrite(pmd_pte(pmd)) -> =C2=A0 -> =C2=A0#ifdef CONFIG_TRANSPARENT_HUGEPAGE -> =C2=A0extern pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot); +> +> #ifdef CONFIG_TRANSPARENT_HUGEPAGE +> extern pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot); diff --git a/a/content_digest b/N1/content_digest index 3a39add..8680d71 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -15,16 +15,13 @@ "\00:1\0" "b\0" "On Thu, 2017-02-09 at 08:30 +0530, Aneesh Kumar K.V wrote:\n" - "> With this our protnone becomes a present pte with READ/WRITE/EXEC bit cle=\n" - "ared.\n" - "> By default we also set _PAGE_PRIVILEGED on such pte. This is now used to =\n" - "help\n" + "> With this our protnone becomes a present pte with READ/WRITE/EXEC bit cleared.\n" + "> By default we also set _PAGE_PRIVILEGED on such pte. This is now used to help\n" "> us identify a protnone pte that as saved write bit. For such pte, we will\n" "> clear\n" - "> the _PAGE_PRIVILEGED bit. The pte still remain non-accessible from both u=\n" - "ser\n" + "> the _PAGE_PRIVILEGED bit. The pte still remain non-accessible from both user\n" "> and kernel.\n" - ">=20\n" + "> \n" "> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>\n" "\n" "\n" @@ -33,61 +30,58 @@ "Acked-By: Michael Neuling <mikey@neuling.org>\n" "\n" "> ---\n" - "> =C2=A0arch/powerpc/include/asm/book3s/64/mmu-hash.h |=C2=A0=C2=A03 +++\n" - "> =C2=A0arch/powerpc/include/asm/book3s/64/pgtable.h=C2=A0=C2=A0| 32 ++++++=\n" - "+++++++++++++++++++-\n" + "> \302\240arch/powerpc/include/asm/book3s/64/mmu-hash.h |\302\240\302\2403 +++\n" + "> \302\240arch/powerpc/include/asm/book3s/64/pgtable.h\302\240\302\240| 32 +++++++++++++++++++++++++-\n" "> -\n" - "> =C2=A02 files changed, 33 insertions(+), 2 deletions(-)\n" - ">=20\n" + "> \302\2402 files changed, 33 insertions(+), 2 deletions(-)\n" + "> \n" "> diff --git a/arch/powerpc/include/asm/book3s/64/mmu-hash.h\n" "> b/arch/powerpc/include/asm/book3s/64/mmu-hash.h\n" "> index 0735d5a8049f..8720a406bbbe 100644\n" "> --- a/arch/powerpc/include/asm/book3s/64/mmu-hash.h\n" "> +++ b/arch/powerpc/include/asm/book3s/64/mmu-hash.h\n" "> @@ -16,6 +16,9 @@\n" - "> =C2=A0#include <asm/page.h>\n" - "> =C2=A0#include <asm/bug.h>\n" - "> =C2=A0\n" + "> \302\240#include <asm/page.h>\n" + "> \302\240#include <asm/bug.h>\n" + "> \302\240\n" "> +#ifndef __ASSEMBLY__\n" "> +#include <linux/mmdebug.h>\n" "> +#endif\n" - "> =C2=A0/*\n" - "> =C2=A0 * This is necessary to get the definition of PGTABLE_RANGE which w=\n" - "e\n" - "> =C2=A0 * need for various slices related matters. Note that this isn't th=\n" - "e\n" + "> \302\240/*\n" + "> \302\240 * This is necessary to get the definition of PGTABLE_RANGE which we\n" + "> \302\240 * need for various slices related matters. Note that this isn't the\n" "> diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h\n" "> b/arch/powerpc/include/asm/book3s/64/pgtable.h\n" "> index e91ada786d48..efff910a84b1 100644\n" "> --- a/arch/powerpc/include/asm/book3s/64/pgtable.h\n" "> +++ b/arch/powerpc/include/asm/book3s/64/pgtable.h\n" "> @@ -443,8 +443,8 @@ static inline pte_t pte_clear_soft_dirty(pte_t pte)\n" - "> =C2=A0 */\n" - "> =C2=A0static inline int pte_protnone(pte_t pte)\n" - "> =C2=A0{\n" + "> \302\240 */\n" + "> \302\240static inline int pte_protnone(pte_t pte)\n" + "> \302\240{\n" "> -\treturn (pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_PRIVILEGED))\n" - "> =3D=3D\n" + "> ==\n" "> -\t\tcpu_to_be64(_PAGE_PRESENT | _PAGE_PRIVILEGED);\n" - "> +\treturn (pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_RWX)) =3D=3D\n" + "> +\treturn (pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_RWX)) ==\n" "> +\t\tcpu_to_be64(_PAGE_PRESENT);\n" - "> =C2=A0}\n" - "> =C2=A0#endif /* CONFIG_NUMA_BALANCING */\n" - "> =C2=A0\n" + "> \302\240}\n" + "> \302\240#endif /* CONFIG_NUMA_BALANCING */\n" + "> \302\240\n" "> @@ -514,6 +514,32 @@ static inline pte_t pte_mkhuge(pte_t pte)\n" - "> =C2=A0\treturn pte;\n" - "> =C2=A0}\n" - "> =C2=A0\n" + "> \302\240\treturn pte;\n" + "> \302\240}\n" + "> \302\240\n" "> +#define pte_mk_savedwrite pte_mk_savedwrite\n" "> +static inline pte_t pte_mk_savedwrite(pte_t pte)\n" "> +{\n" "> +\t/*\n" - "> +\t=C2=A0* Used by Autonuma subsystem to preserve the write bit\n" - "> +\t=C2=A0* while marking the pte PROT_NONE. Only allow this\n" - "> +\t=C2=A0* on PROT_NONE pte\n" - "> +\t=C2=A0*/\n" + "> +\t\302\240* Used by Autonuma subsystem to preserve the write bit\n" + "> +\t\302\240* while marking the pte PROT_NONE. Only allow this\n" + "> +\t\302\240* on PROT_NONE pte\n" + "> +\t\302\240*/\n" "> +\tVM_BUG_ON((pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_RWX |\n" - "> _PAGE_PRIVILEGED)) !=3D\n" - "> +\t\t=C2=A0=C2=A0cpu_to_be64(_PAGE_PRESENT | _PAGE_PRIVILEGED));\n" + "> _PAGE_PRIVILEGED)) !=\n" + "> +\t\t\302\240\302\240cpu_to_be64(_PAGE_PRESENT | _PAGE_PRIVILEGED));\n" "> +\treturn __pte(pte_val(pte) & ~_PAGE_PRIVILEGED);\n" "> +}\n" "> +\n" @@ -95,35 +89,34 @@ "> +static inline bool pte_savedwrite(pte_t pte)\n" "> +{\n" "> +\t/*\n" - "> +\t=C2=A0* Saved write ptes are prot none ptes that doesn't have\n" - "> +\t=C2=A0* privileged bit sit. We mark prot none as one which has\n" - "> +\t=C2=A0* present and pviliged bit set and RWX cleared. To mark\n" - "> +\t=C2=A0* protnone which used to have _PAGE_WRITE set we clear\n" - "> +\t=C2=A0* the privileged bit.\n" - "> +\t=C2=A0*/\n" + "> +\t\302\240* Saved write ptes are prot none ptes that doesn't have\n" + "> +\t\302\240* privileged bit sit. We mark prot none as one which has\n" + "> +\t\302\240* present and pviliged bit set and RWX cleared. To mark\n" + "> +\t\302\240* protnone which used to have _PAGE_WRITE set we clear\n" + "> +\t\302\240* the privileged bit.\n" + "> +\t\302\240*/\n" "> +\treturn !(pte_raw(pte) & cpu_to_be64(_PAGE_RWX | _PAGE_PRIVILEGED));\n" "> +}\n" "> +\n" - "> =C2=A0static inline pte_t pte_mkdevmap(pte_t pte)\n" - "> =C2=A0{\n" - "> =C2=A0\treturn __pte(pte_val(pte) | _PAGE_SPECIAL|_PAGE_DEVMAP);\n" + "> \302\240static inline pte_t pte_mkdevmap(pte_t pte)\n" + "> \302\240{\n" + "> \302\240\treturn __pte(pte_val(pte) | _PAGE_SPECIAL|_PAGE_DEVMAP);\n" "> @@ -885,6 +911,7 @@ static inline pte_t *pmdp_ptep(pmd_t *pmd)\n" - "> =C2=A0#define pmd_mkclean(pmd)\tpte_pmd(pte_mkclean(pmd_pte(pmd)))\n" - "> =C2=A0#define pmd_mkyoung(pmd)\tpte_pmd(pte_mkyoung(pmd_pte(pmd)))\n" - "> =C2=A0#define pmd_mkwrite(pmd)\tpte_pmd(pte_mkwrite(pmd_pte(pmd)))\n" + "> \302\240#define pmd_mkclean(pmd)\tpte_pmd(pte_mkclean(pmd_pte(pmd)))\n" + "> \302\240#define pmd_mkyoung(pmd)\tpte_pmd(pte_mkyoung(pmd_pte(pmd)))\n" + "> \302\240#define pmd_mkwrite(pmd)\tpte_pmd(pte_mkwrite(pmd_pte(pmd)))\n" "> +#define pmd_mk_savedwrite(pmd)\tpte_pmd(pte_mk_savedwrite(pmd_pte(pmd))\n" "> )\n" - "> =C2=A0\n" - "> =C2=A0#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY\n" - "> =C2=A0#define pmd_soft_dirty(pmd)=C2=A0=C2=A0=C2=A0=C2=A0pte_soft_dirty(p=\n" - "md_pte(pmd))\n" + "> \302\240\n" + "> \302\240#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY\n" + "> \302\240#define pmd_soft_dirty(pmd)\302\240\302\240\302\240\302\240pte_soft_dirty(pmd_pte(pmd))\n" "> @@ -901,6 +928,7 @@ static inline int pmd_protnone(pmd_t pmd)\n" - "> =C2=A0\n" - "> =C2=A0#define __HAVE_ARCH_PMD_WRITE\n" - "> =C2=A0#define pmd_write(pmd)\t\tpte_write(pmd_pte(pmd))\n" + "> \302\240\n" + "> \302\240#define __HAVE_ARCH_PMD_WRITE\n" + "> \302\240#define pmd_write(pmd)\t\tpte_write(pmd_pte(pmd))\n" "> +#define pmd_savedwrite(pmd)\tpte_savedwrite(pmd_pte(pmd))\n" - "> =C2=A0\n" - "> =C2=A0#ifdef CONFIG_TRANSPARENT_HUGEPAGE\n" - > =C2=A0extern pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot); + "> \302\240\n" + "> \302\240#ifdef CONFIG_TRANSPARENT_HUGEPAGE\n" + "> \302\240extern pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot);" -79ce606b00e75443e7b0368da88a63a6e704312b42d4479d767d3b9f5b5b3248 +27933968cf7dd3af2475c3fca028af2af4056d9d6bfb6a6fb5828d65f7838741
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