From: Michael Neuling <mikey@neuling.org>
To: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>,
akpm@linux-foundation.org, Rik van Riel <riel@surriel.com>,
Mel Gorman <mgorman@techsingularity.net>,
paulus@ozlabs.org, benh@kernel.crashing.org
Cc: linux-mm@kvack.org, linuxppc-dev@lists.ozlabs.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] powerpc/mm/autonuma: Switch ppc64 to its own implementeation of saved write
Date: Tue, 14 Feb 2017 14:59:19 +1100 [thread overview]
Message-ID: <1487044759.21048.24.camel@neuling.org> (raw)
In-Reply-To: <1486609259-6796-2-git-send-email-aneesh.kumar@linux.vnet.ibm.com>
On Thu, 2017-02-09 at 08:30 +0530, Aneesh Kumar K.V wrote:
> With this our protnone becomes a present pte with READ/WRITE/EXEC bit cle=
ared.
> By default we also set _PAGE_PRIVILEGED on such pte. This is now used to =
help
> us identify a protnone pte that as saved write bit. For such pte, we will
> clear
> the _PAGE_PRIVILEGED bit. The pte still remain non-accessible from both u=
ser
> and kernel.
>=20
> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
FWIW I've tested this, so:
Acked-By: Michael Neuling <mikey@neuling.org>
> ---
> =C2=A0arch/powerpc/include/asm/book3s/64/mmu-hash.h |=C2=A0=C2=A03 +++
> =C2=A0arch/powerpc/include/asm/book3s/64/pgtable.h=C2=A0=C2=A0| 32 ++++++=
+++++++++++++++++++-
> -
> =C2=A02 files changed, 33 insertions(+), 2 deletions(-)
>=20
> diff --git a/arch/powerpc/include/asm/book3s/64/mmu-hash.h
> b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
> index 0735d5a8049f..8720a406bbbe 100644
> --- a/arch/powerpc/include/asm/book3s/64/mmu-hash.h
> +++ b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
> @@ -16,6 +16,9 @@
> =C2=A0#include <asm/page.h>
> =C2=A0#include <asm/bug.h>
> =C2=A0
> +#ifndef __ASSEMBLY__
> +#include <linux/mmdebug.h>
> +#endif
> =C2=A0/*
> =C2=A0 * This is necessary to get the definition of PGTABLE_RANGE which w=
e
> =C2=A0 * need for various slices related matters. Note that this isn't th=
e
> diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h
> b/arch/powerpc/include/asm/book3s/64/pgtable.h
> index e91ada786d48..efff910a84b1 100644
> --- a/arch/powerpc/include/asm/book3s/64/pgtable.h
> +++ b/arch/powerpc/include/asm/book3s/64/pgtable.h
> @@ -443,8 +443,8 @@ static inline pte_t pte_clear_soft_dirty(pte_t pte)
> =C2=A0 */
> =C2=A0static inline int pte_protnone(pte_t pte)
> =C2=A0{
> - return (pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_PRIVILEGED))
> =3D=3D
> - cpu_to_be64(_PAGE_PRESENT | _PAGE_PRIVILEGED);
> + return (pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_RWX)) =3D=3D
> + cpu_to_be64(_PAGE_PRESENT);
> =C2=A0}
> =C2=A0#endif /* CONFIG_NUMA_BALANCING */
> =C2=A0
> @@ -514,6 +514,32 @@ static inline pte_t pte_mkhuge(pte_t pte)
> =C2=A0 return pte;
> =C2=A0}
> =C2=A0
> +#define pte_mk_savedwrite pte_mk_savedwrite
> +static inline pte_t pte_mk_savedwrite(pte_t pte)
> +{
> + /*
> + =C2=A0* Used by Autonuma subsystem to preserve the write bit
> + =C2=A0* while marking the pte PROT_NONE. Only allow this
> + =C2=A0* on PROT_NONE pte
> + =C2=A0*/
> + VM_BUG_ON((pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_RWX |
> _PAGE_PRIVILEGED)) !=3D
> + =C2=A0=C2=A0cpu_to_be64(_PAGE_PRESENT | _PAGE_PRIVILEGED));
> + return __pte(pte_val(pte) & ~_PAGE_PRIVILEGED);
> +}
> +
> +#define pte_savedwrite pte_savedwrite
> +static inline bool pte_savedwrite(pte_t pte)
> +{
> + /*
> + =C2=A0* Saved write ptes are prot none ptes that doesn't have
> + =C2=A0* privileged bit sit. We mark prot none as one which has
> + =C2=A0* present and pviliged bit set and RWX cleared. To mark
> + =C2=A0* protnone which used to have _PAGE_WRITE set we clear
> + =C2=A0* the privileged bit.
> + =C2=A0*/
> + return !(pte_raw(pte) & cpu_to_be64(_PAGE_RWX | _PAGE_PRIVILEGED));
> +}
> +
> =C2=A0static inline pte_t pte_mkdevmap(pte_t pte)
> =C2=A0{
> =C2=A0 return __pte(pte_val(pte) | _PAGE_SPECIAL|_PAGE_DEVMAP);
> @@ -885,6 +911,7 @@ static inline pte_t *pmdp_ptep(pmd_t *pmd)
> =C2=A0#define pmd_mkclean(pmd) pte_pmd(pte_mkclean(pmd_pte(pmd)))
> =C2=A0#define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd)))
> =C2=A0#define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd)))
> +#define pmd_mk_savedwrite(pmd) pte_pmd(pte_mk_savedwrite(pmd_pte(pmd))
> )
> =C2=A0
> =C2=A0#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
> =C2=A0#define pmd_soft_dirty(pmd)=C2=A0=C2=A0=C2=A0=C2=A0pte_soft_dirty(p=
md_pte(pmd))
> @@ -901,6 +928,7 @@ static inline int pmd_protnone(pmd_t pmd)
> =C2=A0
> =C2=A0#define __HAVE_ARCH_PMD_WRITE
> =C2=A0#define pmd_write(pmd) pte_write(pmd_pte(pmd))
> +#define pmd_savedwrite(pmd) pte_savedwrite(pmd_pte(pmd))
> =C2=A0
> =C2=A0#ifdef CONFIG_TRANSPARENT_HUGEPAGE
> =C2=A0extern pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot);
WARNING: multiple messages have this Message-ID (diff)
From: Michael Neuling <mikey@neuling.org>
To: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>,
akpm@linux-foundation.org, Rik van Riel <riel@surriel.com>,
Mel Gorman <mgorman@techsingularity.net>,
paulus@ozlabs.org, benh@kernel.crashing.org
Cc: linux-mm@kvack.org, linuxppc-dev@lists.ozlabs.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] powerpc/mm/autonuma: Switch ppc64 to its own implementeation of saved write
Date: Tue, 14 Feb 2017 14:59:19 +1100 [thread overview]
Message-ID: <1487044759.21048.24.camel@neuling.org> (raw)
In-Reply-To: <1486609259-6796-2-git-send-email-aneesh.kumar@linux.vnet.ibm.com>
On Thu, 2017-02-09 at 08:30 +0530, Aneesh Kumar K.V wrote:
> With this our protnone becomes a present pte with READ/WRITE/EXEC bit cleared.
> By default we also set _PAGE_PRIVILEGED on such pte. This is now used to help
> us identify a protnone pte that as saved write bit. For such pte, we will
> clear
> the _PAGE_PRIVILEGED bit. The pte still remain non-accessible from both user
> and kernel.
>
> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
FWIW I've tested this, so:
Acked-By: Michael Neuling <mikey@neuling.org>
> ---
> arch/powerpc/include/asm/book3s/64/mmu-hash.h | 3 +++
> arch/powerpc/include/asm/book3s/64/pgtable.h | 32 +++++++++++++++++++++++++-
> -
> 2 files changed, 33 insertions(+), 2 deletions(-)
>
> diff --git a/arch/powerpc/include/asm/book3s/64/mmu-hash.h
> b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
> index 0735d5a8049f..8720a406bbbe 100644
> --- a/arch/powerpc/include/asm/book3s/64/mmu-hash.h
> +++ b/arch/powerpc/include/asm/book3s/64/mmu-hash.h
> @@ -16,6 +16,9 @@
> #include <asm/page.h>
> #include <asm/bug.h>
>
> +#ifndef __ASSEMBLY__
> +#include <linux/mmdebug.h>
> +#endif
> /*
> * This is necessary to get the definition of PGTABLE_RANGE which we
> * need for various slices related matters. Note that this isn't the
> diff --git a/arch/powerpc/include/asm/book3s/64/pgtable.h
> b/arch/powerpc/include/asm/book3s/64/pgtable.h
> index e91ada786d48..efff910a84b1 100644
> --- a/arch/powerpc/include/asm/book3s/64/pgtable.h
> +++ b/arch/powerpc/include/asm/book3s/64/pgtable.h
> @@ -443,8 +443,8 @@ static inline pte_t pte_clear_soft_dirty(pte_t pte)
> */
> static inline int pte_protnone(pte_t pte)
> {
> - return (pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_PRIVILEGED))
> ==
> - cpu_to_be64(_PAGE_PRESENT | _PAGE_PRIVILEGED);
> + return (pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_RWX)) ==
> + cpu_to_be64(_PAGE_PRESENT);
> }
> #endif /* CONFIG_NUMA_BALANCING */
>
> @@ -514,6 +514,32 @@ static inline pte_t pte_mkhuge(pte_t pte)
> return pte;
> }
>
> +#define pte_mk_savedwrite pte_mk_savedwrite
> +static inline pte_t pte_mk_savedwrite(pte_t pte)
> +{
> + /*
> + * Used by Autonuma subsystem to preserve the write bit
> + * while marking the pte PROT_NONE. Only allow this
> + * on PROT_NONE pte
> + */
> + VM_BUG_ON((pte_raw(pte) & cpu_to_be64(_PAGE_PRESENT | _PAGE_RWX |
> _PAGE_PRIVILEGED)) !=
> + cpu_to_be64(_PAGE_PRESENT | _PAGE_PRIVILEGED));
> + return __pte(pte_val(pte) & ~_PAGE_PRIVILEGED);
> +}
> +
> +#define pte_savedwrite pte_savedwrite
> +static inline bool pte_savedwrite(pte_t pte)
> +{
> + /*
> + * Saved write ptes are prot none ptes that doesn't have
> + * privileged bit sit. We mark prot none as one which has
> + * present and pviliged bit set and RWX cleared. To mark
> + * protnone which used to have _PAGE_WRITE set we clear
> + * the privileged bit.
> + */
> + return !(pte_raw(pte) & cpu_to_be64(_PAGE_RWX | _PAGE_PRIVILEGED));
> +}
> +
> static inline pte_t pte_mkdevmap(pte_t pte)
> {
> return __pte(pte_val(pte) | _PAGE_SPECIAL|_PAGE_DEVMAP);
> @@ -885,6 +911,7 @@ static inline pte_t *pmdp_ptep(pmd_t *pmd)
> #define pmd_mkclean(pmd) pte_pmd(pte_mkclean(pmd_pte(pmd)))
> #define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd)))
> #define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd)))
> +#define pmd_mk_savedwrite(pmd) pte_pmd(pte_mk_savedwrite(pmd_pte(pmd))
> )
>
> #ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
> #define pmd_soft_dirty(pmd) pte_soft_dirty(pmd_pte(pmd))
> @@ -901,6 +928,7 @@ static inline int pmd_protnone(pmd_t pmd)
>
> #define __HAVE_ARCH_PMD_WRITE
> #define pmd_write(pmd) pte_write(pmd_pte(pmd))
> +#define pmd_savedwrite(pmd) pte_savedwrite(pmd_pte(pmd))
>
> #ifdef CONFIG_TRANSPARENT_HUGEPAGE
> extern pmd_t pfn_pmd(unsigned long pfn, pgprot_t pgprot);
next prev parent reply other threads:[~2017-02-14 3:59 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-02-09 3:00 [PATCH 1/2] mm/autonuma: Let architecture override how the write bit should be stashed in a protnone pte Aneesh Kumar K.V
2017-02-09 3:00 ` Aneesh Kumar K.V
2017-02-09 3:00 ` [PATCH 2/2] powerpc/mm/autonuma: Switch ppc64 to its own implementeation of saved write Aneesh Kumar K.V
2017-02-09 3:00 ` Aneesh Kumar K.V
2017-02-14 3:59 ` Michael Neuling [this message]
2017-02-14 3:59 ` Michael Neuling
2017-02-14 11:01 ` Michael Ellerman
2017-02-14 11:01 ` Michael Ellerman
2017-02-15 21:46 ` Andrew Morton
2017-02-15 21:46 ` Andrew Morton
2017-02-16 2:12 ` Aneesh Kumar K.V
2017-02-16 2:12 ` Aneesh Kumar K.V
2017-02-09 3:16 ` [PATCH 1/2] mm/autonuma: Let architecture override how the write bit should be stashed in a protnone pte Aneesh Kumar K.V
2017-02-09 3:16 ` Aneesh Kumar K.V
2017-02-14 3:58 ` Michael Neuling
2017-02-14 3:58 ` Michael Neuling
2017-02-14 3:58 ` Michael Neuling
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