diff for duplicates of <1487183790.5636.13.camel@buserror.net> diff --git a/a/1.txt b/N1/1.txt index e97759d..17c31be 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,4 +1,4 @@ -On Wed, 2017-02-15 at 13:47 +0800, yuantian.tang@nxp.com wrote: +On Wed, 2017-02-15 at 13:47 +0800, yuantian.tang at nxp.com wrote: > From: Tang Yuantian <Yuantian.Tang@nxp.com> > > ls1012a has separate input root clocks for core PLLs versus the @@ -9,9 +9,9 @@ On Wed, 2017-02-15 at 13:47 +0800, yuantian.tang@nxp.com wrote: > Signed-off-by: Scott Wood <oss@buserror.net> > Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com> > --- -> drivers/clk/clk-qoriq.c | 91 +++++++++++++++++++++++++++++++++++++++++----- +> ?drivers/clk/clk-qoriq.c | 91 +++++++++++++++++++++++++++++++++++++++++----- -Why did you reset the author on these patches? Have you changed anything? - Why aren't they marked either v2 or resend? +Why did you reset the author on these patches? ?Have you changed anything? +?Why aren't they marked either v2 or resend? -Scott diff --git a/a/content_digest b/N1/content_digest index 1a01cf4..fa114b6 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,20 +1,12 @@ "ref\01487137656-4006-1-git-send-email-yuantian.tang@nxp.com\0" "ref\01487137656-4006-2-git-send-email-yuantian.tang@nxp.com\0" - "From\0Scott Wood <oss@buserror.net>\0" - "Subject\0Re: [PATCH 2/2] clk: qoriq: Separate root input clock for core PLLs on ls1012a\0" + "From\0oss@buserror.net (Scott Wood)\0" + "Subject\0[PATCH 2/2] clk: qoriq: Separate root input clock for core PLLs on ls1012a\0" "Date\0Wed, 15 Feb 2017 12:36:30 -0600\0" - "To\0yuantian.tang@nxp.com" - " mturquette@baylibre.com\0" - "Cc\0sboyd@codeaurora.org" - robh+dt@kernel.org - mark.rutland@arm.com - linux-clk@vger.kernel.org - devicetree@vger.kernel.org - linux-kernel@vger.kernel.org - " linux-arm-kernel@lists.infradead.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" - "On Wed, 2017-02-15 at 13:47 +0800, yuantian.tang@nxp.com wrote:\n" + "On Wed, 2017-02-15 at 13:47 +0800, yuantian.tang at nxp.com wrote:\n" "> From: Tang Yuantian <Yuantian.Tang@nxp.com>\n" "> \n" "> ls1012a has separate input root clocks for core PLLs versus the\n" @@ -25,11 +17,11 @@ "> Signed-off-by: Scott Wood <oss@buserror.net>\n" "> Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>\n" "> ---\n" - "> \302\240drivers/clk/clk-qoriq.c | 91 +++++++++++++++++++++++++++++++++++++++++-----\n" + "> ?drivers/clk/clk-qoriq.c | 91 +++++++++++++++++++++++++++++++++++++++++-----\n" "\n" - "Why did you reset the author on these patches? \302\240Have you changed anything?\n" - "\302\240Why aren't they marked either v2 or resend?\n" + "Why did you reset the author on these patches? ?Have you changed anything?\n" + "?Why aren't they marked either v2 or resend?\n" "\n" -Scott -bc80b600ddd888ff47c11c62f81a7a95ca124c8cab2ec5b831e63757637c4045 +cf0c60db93091156116df94c9f26256bfda57e9a54c3f8bd3eb4ea37f668b7c0
diff --git a/a/1.txt b/N2/1.txt index e97759d..85bc20d 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,13 +1,13 @@ -On Wed, 2017-02-15 at 13:47 +0800, yuantian.tang@nxp.com wrote: -> From: Tang Yuantian <Yuantian.Tang@nxp.com> +On Wed, 2017-02-15 at 13:47 +0800, yuantian.tang-3arQi8VN3Tc@public.gmane.org wrote: +> From: Tang Yuantian <Yuantian.Tang-3arQi8VN3Tc@public.gmane.org> > > ls1012a has separate input root clocks for core PLLs versus the > platform PLL, with the latter described as sysclk in the hw docs. > If a second input clock, named "coreclk", is present, this clock will be > used for the core PLLs. > -> Signed-off-by: Scott Wood <oss@buserror.net> -> Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com> +> Signed-off-by: Scott Wood <oss-fOR+EgIDQEHk1uMJSBkQmQ@public.gmane.org> +> Signed-off-by: Tang Yuantian <yuantian.tang-3arQi8VN3Tc@public.gmane.org> > --- > drivers/clk/clk-qoriq.c | 91 +++++++++++++++++++++++++++++++++++++++++----- @@ -15,3 +15,8 @@ Why did you reset the author on these patches? Have you changed anything? Why aren't they marked either v2 or resend? -Scott + +-- +To unsubscribe from this list: send the line "unsubscribe devicetree" in +the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org +More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/a/content_digest b/N2/content_digest index 1a01cf4..e010fb3 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,35 +1,41 @@ "ref\01487137656-4006-1-git-send-email-yuantian.tang@nxp.com\0" "ref\01487137656-4006-2-git-send-email-yuantian.tang@nxp.com\0" - "From\0Scott Wood <oss@buserror.net>\0" + "ref\01487137656-4006-2-git-send-email-yuantian.tang-3arQi8VN3Tc@public.gmane.org\0" + "From\0Scott Wood <oss-fOR+EgIDQEHk1uMJSBkQmQ@public.gmane.org>\0" "Subject\0Re: [PATCH 2/2] clk: qoriq: Separate root input clock for core PLLs on ls1012a\0" "Date\0Wed, 15 Feb 2017 12:36:30 -0600\0" - "To\0yuantian.tang@nxp.com" - " mturquette@baylibre.com\0" - "Cc\0sboyd@codeaurora.org" - robh+dt@kernel.org - mark.rutland@arm.com - linux-clk@vger.kernel.org - devicetree@vger.kernel.org - linux-kernel@vger.kernel.org - " linux-arm-kernel@lists.infradead.org\0" + "To\0yuantian.tang-3arQi8VN3Tc@public.gmane.org" + " mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org\0" + "Cc\0sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org" + robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org + mark.rutland-5wv7dgnIgG8@public.gmane.org + linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org + " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\0" "\00:1\0" "b\0" - "On Wed, 2017-02-15 at 13:47 +0800, yuantian.tang@nxp.com wrote:\n" - "> From: Tang Yuantian <Yuantian.Tang@nxp.com>\n" + "On Wed, 2017-02-15 at 13:47 +0800, yuantian.tang-3arQi8VN3Tc@public.gmane.org wrote:\n" + "> From: Tang Yuantian <Yuantian.Tang-3arQi8VN3Tc@public.gmane.org>\n" "> \n" "> ls1012a has separate input root clocks for core PLLs versus the\n" "> platform PLL, with the latter described as sysclk in the hw docs.\n" "> If a second input clock, named \"coreclk\", is present, this clock will be\n" "> used for the core PLLs.\n" "> \n" - "> Signed-off-by: Scott Wood <oss@buserror.net>\n" - "> Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>\n" + "> Signed-off-by: Scott Wood <oss-fOR+EgIDQEHk1uMJSBkQmQ@public.gmane.org>\n" + "> Signed-off-by: Tang Yuantian <yuantian.tang-3arQi8VN3Tc@public.gmane.org>\n" "> ---\n" "> \302\240drivers/clk/clk-qoriq.c | 91 +++++++++++++++++++++++++++++++++++++++++-----\n" "\n" "Why did you reset the author on these patches? \302\240Have you changed anything?\n" "\302\240Why aren't they marked either v2 or resend?\n" "\n" - -Scott + "-Scott\n" + "\n" + "--\n" + "To unsubscribe from this list: send the line \"unsubscribe devicetree\" in\n" + "the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\n" + More majordomo info at http://vger.kernel.org/majordomo-info.html -bc80b600ddd888ff47c11c62f81a7a95ca124c8cab2ec5b831e63757637c4045 +6a61bef7a41316f3062ce1e8f30fd11d7120a128ee2d2e0d53a0f7692c271386
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.