From: matthew.gerlach-VuQAYsv1563Yd54FQh9/CA@public.gmane.org
To: atull-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
moritz.fischer-+aYTwkv1SeIAvxtiuMwx3w@public.gmane.org,
linux-fpga-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
mark.rutland-5wv7dgnIgG8@public.gmane.org,
agust-ynQEQJNshbs@public.gmane.org
Cc: Alan Tull <atull-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
Subject: [PATCH v5 1/4] fpga: add config complete timeout
Date: Fri, 10 Mar 2017 11:40:24 -0800 [thread overview]
Message-ID: <1489174827-6033-2-git-send-email-matthew.gerlach@linux.intel.com> (raw)
In-Reply-To: <1489174827-6033-1-git-send-email-matthew.gerlach-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
From: Alan Tull <atull-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
Adding timeout for maximum allowed time for FPGA to go to
operating mode after a FPGA region has been programmed.
Signed-off-by: Alan Tull <atull-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
---
drivers/fpga/fpga-region.c | 3 +++
include/linux/fpga/fpga-mgr.h | 3 +++
2 files changed, 6 insertions(+)
diff --git a/drivers/fpga/fpga-region.c b/drivers/fpga/fpga-region.c
index 3222fdb..28401cb 100644
--- a/drivers/fpga/fpga-region.c
+++ b/drivers/fpga/fpga-region.c
@@ -381,6 +381,9 @@ static int fpga_region_notify_pre_apply(struct fpga_region *region,
of_property_read_u32(nd->overlay, "region-freeze-timeout-us",
&info->disable_timeout_us);
+ of_property_read_u32(nd->overlay, "config-complete-timeout-us",
+ &info->config_complete_timeout_us);
+
/* If FPGA was externally programmed, don't specify firmware */
if ((info->flags & FPGA_MGR_EXTERNAL_CONFIG) && firmware_name) {
pr_err("error: specified firmware and external-fpga-config");
diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h
index 57beb5d..fd3f083 100644
--- a/include/linux/fpga/fpga-mgr.h
+++ b/include/linux/fpga/fpga-mgr.h
@@ -76,11 +76,14 @@ enum fpga_mgr_states {
* @flags: boolean flags as defined above
* @enable_timeout_us: maximum time to enable traffic through bridge (uSec)
* @disable_timeout_us: maximum time to disable traffic through bridge (uSec)
+ * @config_complete_timeout_us: maximum time for FPGA to switch to operating
+ * status in the write_complete op.
*/
struct fpga_image_info {
u32 flags;
u32 enable_timeout_us;
u32 disable_timeout_us;
+ u32 config_complete_timeout_us;
};
/**
--
2.7.4
--
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WARNING: multiple messages have this Message-ID (diff)
From: matthew.gerlach@linux.intel.com
To: atull@kernel.org, moritz.fischer@ettus.com,
linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org, robh+dt@kernel.org,
mark.rutland@arm.com, agust@denx.de
Cc: Alan Tull <atull@opensource.altera.com>
Subject: [PATCH v5 1/4] fpga: add config complete timeout
Date: Fri, 10 Mar 2017 11:40:24 -0800 [thread overview]
Message-ID: <1489174827-6033-2-git-send-email-matthew.gerlach@linux.intel.com> (raw)
In-Reply-To: <1489174827-6033-1-git-send-email-matthew.gerlach@linux.intel.com>
From: Alan Tull <atull@opensource.altera.com>
Adding timeout for maximum allowed time for FPGA to go to
operating mode after a FPGA region has been programmed.
Signed-off-by: Alan Tull <atull@opensource.altera.com>
---
drivers/fpga/fpga-region.c | 3 +++
include/linux/fpga/fpga-mgr.h | 3 +++
2 files changed, 6 insertions(+)
diff --git a/drivers/fpga/fpga-region.c b/drivers/fpga/fpga-region.c
index 3222fdb..28401cb 100644
--- a/drivers/fpga/fpga-region.c
+++ b/drivers/fpga/fpga-region.c
@@ -381,6 +381,9 @@ static int fpga_region_notify_pre_apply(struct fpga_region *region,
of_property_read_u32(nd->overlay, "region-freeze-timeout-us",
&info->disable_timeout_us);
+ of_property_read_u32(nd->overlay, "config-complete-timeout-us",
+ &info->config_complete_timeout_us);
+
/* If FPGA was externally programmed, don't specify firmware */
if ((info->flags & FPGA_MGR_EXTERNAL_CONFIG) && firmware_name) {
pr_err("error: specified firmware and external-fpga-config");
diff --git a/include/linux/fpga/fpga-mgr.h b/include/linux/fpga/fpga-mgr.h
index 57beb5d..fd3f083 100644
--- a/include/linux/fpga/fpga-mgr.h
+++ b/include/linux/fpga/fpga-mgr.h
@@ -76,11 +76,14 @@ enum fpga_mgr_states {
* @flags: boolean flags as defined above
* @enable_timeout_us: maximum time to enable traffic through bridge (uSec)
* @disable_timeout_us: maximum time to disable traffic through bridge (uSec)
+ * @config_complete_timeout_us: maximum time for FPGA to switch to operating
+ * status in the write_complete op.
*/
struct fpga_image_info {
u32 flags;
u32 enable_timeout_us;
u32 disable_timeout_us;
+ u32 config_complete_timeout_us;
};
/**
--
2.7.4
next prev parent reply other threads:[~2017-03-10 19:40 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-10 19:40 [PATCH v5 0/4] Altera Partial Reconfiguration IP matthew.gerlach-VuQAYsv1563Yd54FQh9/CA
2017-03-10 19:40 ` matthew.gerlach
[not found] ` <1489174827-6033-1-git-send-email-matthew.gerlach-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2017-03-10 19:40 ` matthew.gerlach-VuQAYsv1563Yd54FQh9/CA [this message]
2017-03-10 19:40 ` [PATCH v5 1/4] fpga: add config complete timeout matthew.gerlach
[not found] ` <1489174827-6033-2-git-send-email-matthew.gerlach-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2017-03-13 20:46 ` Moritz Fischer
2017-03-13 20:46 ` Moritz Fischer
2017-03-10 19:40 ` [PATCH v5 2/4] fpga pr ip: Core driver support for Altera Partial Reconfiguration IP matthew.gerlach-VuQAYsv1563Yd54FQh9/CA
2017-03-10 19:40 ` matthew.gerlach
[not found] ` <1489174827-6033-3-git-send-email-matthew.gerlach-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2017-03-13 20:49 ` Moritz Fischer
2017-03-13 20:49 ` Moritz Fischer
2017-03-21 21:04 ` Anatolij Gustschin
2017-03-21 21:04 ` Anatolij Gustschin
2017-03-22 16:08 ` matthew.gerlach-VuQAYsv1563Yd54FQh9/CA
2017-03-22 16:08 ` matthew.gerlach
2017-03-22 16:39 ` Anatolij Gustschin
2017-03-18 18:53 ` Anatolij Gustschin
2017-03-20 23:49 ` matthew.gerlach-VuQAYsv1563Yd54FQh9/CA
2017-03-20 23:49 ` matthew.gerlach
2017-03-10 19:40 ` [PATCH v5 3/4] fpga dt: bindings " matthew.gerlach-VuQAYsv1563Yd54FQh9/CA
2017-03-10 19:40 ` matthew.gerlach
[not found] ` <1489174827-6033-4-git-send-email-matthew.gerlach-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
2017-03-13 20:47 ` Moritz Fischer
2017-03-13 20:47 ` Moritz Fischer
2017-03-10 19:40 ` [PATCH v5 4/4] fpga pr ip: Platform driver " matthew.gerlach-VuQAYsv1563Yd54FQh9/CA
2017-03-10 19:40 ` matthew.gerlach
2017-03-13 20:48 ` Moritz Fischer
2017-03-18 18:27 ` Anatolij Gustschin
2017-03-20 23:42 ` matthew.gerlach
2017-03-13 20:46 ` [PATCH v5 0/4] " Moritz Fischer
2017-03-13 20:46 ` Moritz Fischer
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