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* FAILED: patch "[PATCH] drm/radeon: Fix overflow of watermark calcs at > 4k" failed to apply to 4.11-stable tree
@ 2017-06-17 17:36 gregkh
  2017-06-18 19:01 ` Mario Kleiner
  0 siblings, 1 reply; 2+ messages in thread
From: gregkh @ 2017-06-17 17:36 UTC (permalink / raw)
  To: mario.kleiner.de, alexander.deucher, ben.hutchings; +Cc: stable


The patch below does not apply to the 4.11-stable tree.
If someone wants it applied there, or to any other stable or longterm
tree, then please email the backport, including the original git commit
id to <stable@vger.kernel.org>.

thanks,

greg k-h

------------------ original commit in Linus's tree ------------------

>From 55f61a040e1b1ea0ba962e53ae341b4c51915bd1 Mon Sep 17 00:00:00 2001
From: Mario Kleiner <mario.kleiner.de@gmail.com>
Date: Tue, 13 Jun 2017 07:17:11 +0200
Subject: [PATCH] drm/radeon: Fix overflow of watermark calcs at > 4k
 resolutions.

Commit e6b9a6c84b93
("drm/radeon: Make display watermark calculations more accurate")
made watermark calculations more accurate, but not for > 4k
resolutions on 32-Bit architectures, as it introduced an integer
overflow for those setups and resolutions.

Fix this by proper u64 casting and division.

Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reported-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
Fixes: e6b9a6c84b93 ("drm/radeon: Make display watermark calculations more accurate")
Cc: Ben Hutchings <ben.hutchings@codethink.co.uk>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index 008c145b7f29..ca44233ceacc 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -9267,8 +9267,11 @@ static void dce8_program_watermarks(struct radeon_device *rdev,
 	u32 tmp, wm_mask;
 
 	if (radeon_crtc->base.enabled && num_heads && mode) {
-		active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock;
-		line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535);
+		active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000,
+					    (u32)mode->clock);
+		line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,
+					  (u32)mode->clock);
+		line_time = min(line_time, (u32)65535);
 
 		/* watermark for high clocks */
 		if ((rdev->pm.pm_method == PM_METHOD_DPM) &&
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 0bf103536404..534637203e70 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -2266,8 +2266,11 @@ static void evergreen_program_watermarks(struct radeon_device *rdev,
 	fixed20_12 a, b, c;
 
 	if (radeon_crtc->base.enabled && num_heads && mode) {
-		active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock;
-		line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535);
+		active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000,
+					    (u32)mode->clock);
+		line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,
+					  (u32)mode->clock);
+		line_time = min(line_time, (u32)65535);
 		priority_a_cnt = 0;
 		priority_b_cnt = 0;
 		dram_channels = evergreen_get_number_of_dram_channels(rdev);
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index 76d1888528e6..5303f25d5280 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -2284,8 +2284,11 @@ static void dce6_program_watermarks(struct radeon_device *rdev,
 	fixed20_12 a, b, c;
 
 	if (radeon_crtc->base.enabled && num_heads && mode) {
-		active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock;
-		line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535);
+		active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000,
+					    (u32)mode->clock);
+		line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,
+					  (u32)mode->clock);
+		line_time = min(line_time, (u32)65535);
 		priority_a_cnt = 0;
 		priority_b_cnt = 0;
 

^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: FAILED: patch "[PATCH] drm/radeon: Fix overflow of watermark calcs at > 4k" failed to apply to 4.11-stable tree
  2017-06-17 17:36 FAILED: patch "[PATCH] drm/radeon: Fix overflow of watermark calcs at > 4k" failed to apply to 4.11-stable tree gregkh
@ 2017-06-18 19:01 ` Mario Kleiner
  0 siblings, 0 replies; 2+ messages in thread
From: Mario Kleiner @ 2017-06-18 19:01 UTC (permalink / raw)
  To: gregkh, alexander.deucher, ben.hutchings; +Cc: stable

The patch fails because the radeon stable-patch it was supposed to 
improve upon wasn't included into 4.4, 4.9, 4.11, only its amdgpu 
counterpart. See the "Fixes" reference for the stable patch that is a 
dependency of this one.

However, looking at this comment from display line buffer setup code 
"For display widths larger than 4096, you need use to use 2 display 
controllers and combine them using the stereo blender.", we might not be 
doing that well for > 4k horizontal resolutions anyway, with or without 
this patch, as i don't think that is implemented for radeon-kms.

-mario

On 06/17/2017 07:36 PM, gregkh@linuxfoundation.org wrote:
> 
> The patch below does not apply to the 4.11-stable tree.
> If someone wants it applied there, or to any other stable or longterm
> tree, then please email the backport, including the original git commit
> id to <stable@vger.kernel.org>.
> 
> thanks,
> 
> greg k-h
> 
> ------------------ original commit in Linus's tree ------------------
> 
>  From 55f61a040e1b1ea0ba962e53ae341b4c51915bd1 Mon Sep 17 00:00:00 2001
> From: Mario Kleiner <mario.kleiner.de@gmail.com>
> Date: Tue, 13 Jun 2017 07:17:11 +0200
> Subject: [PATCH] drm/radeon: Fix overflow of watermark calcs at > 4k
>   resolutions.
> 
> Commit e6b9a6c84b93
> ("drm/radeon: Make display watermark calculations more accurate")
> made watermark calculations more accurate, but not for > 4k
> resolutions on 32-Bit architectures, as it introduced an integer
> overflow for those setups and resolutions.
> 
> Fix this by proper u64 casting and division.
> 
> Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
> Reported-by: Ben Hutchings <ben.hutchings@codethink.co.uk>
> Fixes: e6b9a6c84b93 ("drm/radeon: Make display watermark calculations more accurate")
> Cc: Ben Hutchings <ben.hutchings@codethink.co.uk>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Cc: stable@vger.kernel.org
> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
> 
> diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
> index 008c145b7f29..ca44233ceacc 100644
> --- a/drivers/gpu/drm/radeon/cik.c
> +++ b/drivers/gpu/drm/radeon/cik.c
> @@ -9267,8 +9267,11 @@ static void dce8_program_watermarks(struct radeon_device *rdev,
>   	u32 tmp, wm_mask;
>   
>   	if (radeon_crtc->base.enabled && num_heads && mode) {
> -		active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock;
> -		line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535);
> +		active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000,
> +					    (u32)mode->clock);
> +		line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,
> +					  (u32)mode->clock);
> +		line_time = min(line_time, (u32)65535);
>   
>   		/* watermark for high clocks */
>   		if ((rdev->pm.pm_method == PM_METHOD_DPM) &&
> diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
> index 0bf103536404..534637203e70 100644
> --- a/drivers/gpu/drm/radeon/evergreen.c
> +++ b/drivers/gpu/drm/radeon/evergreen.c
> @@ -2266,8 +2266,11 @@ static void evergreen_program_watermarks(struct radeon_device *rdev,
>   	fixed20_12 a, b, c;
>   
>   	if (radeon_crtc->base.enabled && num_heads && mode) {
> -		active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock;
> -		line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535);
> +		active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000,
> +					    (u32)mode->clock);
> +		line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,
> +					  (u32)mode->clock);
> +		line_time = min(line_time, (u32)65535);
>   		priority_a_cnt = 0;
>   		priority_b_cnt = 0;
>   		dram_channels = evergreen_get_number_of_dram_channels(rdev);
> diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
> index 76d1888528e6..5303f25d5280 100644
> --- a/drivers/gpu/drm/radeon/si.c
> +++ b/drivers/gpu/drm/radeon/si.c
> @@ -2284,8 +2284,11 @@ static void dce6_program_watermarks(struct radeon_device *rdev,
>   	fixed20_12 a, b, c;
>   
>   	if (radeon_crtc->base.enabled && num_heads && mode) {
> -		active_time = 1000000UL * (u32)mode->crtc_hdisplay / (u32)mode->clock;
> -		line_time = min((u32) (1000000UL * (u32)mode->crtc_htotal / (u32)mode->clock), (u32)65535);
> +		active_time = (u32) div_u64((u64)mode->crtc_hdisplay * 1000000,
> +					    (u32)mode->clock);
> +		line_time = (u32) div_u64((u64)mode->crtc_htotal * 1000000,
> +					  (u32)mode->clock);
> +		line_time = min(line_time, (u32)65535);
>   		priority_a_cnt = 0;
>   		priority_b_cnt = 0;
>   
> 

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2017-06-18 19:01 UTC | newest]

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2017-06-17 17:36 FAILED: patch "[PATCH] drm/radeon: Fix overflow of watermark calcs at > 4k" failed to apply to 4.11-stable tree gregkh
2017-06-18 19:01 ` Mario Kleiner

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