From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: linux-aspeed@lists.ozlabs.org
Subject: [PATCH 1/4] ARM: aspeed: g4: Add USB functions to pinctrl bindings
Date: Mon, 26 Jun 2017 22:53:39 -0500 [thread overview]
Message-ID: <1498535619.3651.29.camel@kernel.crashing.org> (raw)
In-Reply-To: <20170627021214.23323-2-andrew@aj.id.au>
On Tue, 2017-06-27 at 11:42 +0930, Andrew Jeffery wrote:
> The AST2400 contains several USB controllers:
>
> * USB 1.1 Host Controller
> * USB 2.0 Host Controller
> * Combined USB 2.0 Virtual Hub and USB 1.1 HID Controller
There's also a USB1.1 HID-only device-controller, but it's a legacy
piece of IP that we may never support. It might be worth mentioning its
existence and Ryan might want it supported in the bindings at least no
?
> Pins for three ports are routed to the three controllers such that:
>
> * Port 1 is a dedicated USB 1.1 host port
> * Port 2 is shared between the USB 1.1 host and HID controllers
> * Port 3 is shared between the USB 2.0 host and Hub controllers
>
> As the pins for port 1 are fixed function there is no associated mux
> function or group described in the bindings. Ports 2 and 3 are muxed as
> above, and the table below describes the mapping between pinmux function
> names and ports:
>
> Port | USB Version | USB Mode | Mux Function
> ------|--------------|-----------|-------------
> 1 | 1.1 | Host | -
> 2 | 1.1 | Host | USB11H2
> 2 | 1.1 | Device | USB11D1
> 3 | 2.0 | Host | USB2H1
> 3 | 2.0 | Device | USB2D1
>
> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
> ---
> Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt
> index ca01710ee29a..09142dab47db 100644
> --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt
> +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt
> @@ -69,8 +69,9 @@ PWM1 PWM2 PWM3 PWM4 PWM5 PWM6 PWM7 RGMII1 RGMII2 RMII1 RMII2 ROM16 ROM8 ROMCS1
> ROMCS2 ROMCS3 ROMCS4 RXD1 RXD2 RXD3 RXD4 SALT1 SALT2 SALT3 SALT4 SD1 SD2 SGPMCK
> SGPMI SGPMLD SGPMO SGPSCK SGPSI0 SGPSI1 SGPSLD SIOONCTRL SIOPBI SIOPBO SIOPWREQ
> SIOPWRGD SIOS3 SIOS5 SIOSCI SPI1 SPI1DEBUG SPI1PASSTHRU SPICS1 TIMER3 TIMER4
> -TIMER5 TIMER6 TIMER7 TIMER8 TXD1 TXD2 TXD3 TXD4 UART6 USBCKI VGABIOS_ROM VGAHS
> -VGAVS VPI18 VPI24 VPI30 VPO12 VPO24 WDTRST1 WDTRST2
> +TIMER5 TIMER6 TIMER7 TIMER8 TXD1 TXD2 TXD3 TXD4 UART6 USB11D1 USB11H2 USB2D1
> +USB2H1 USBCKI VGABIOS_ROM VGAHS VGAVS VPI18 VPI24 VPI30 VPO12 VPO24 WDTRST1
> +WDTRST2
>
> aspeed,ast2500-pinctrl, aspeed,g5-pinctrl:
>
WARNING: multiple messages have this Message-ID (diff)
From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
To: Andrew Jeffery <andrew@aj.id.au>, linus.walleij@linaro.org
Cc: robh+dt@kernel.org, mark.rutland@arm.com, joel@jms.id.au,
ryan_chen@aspeedtech.com, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-aspeed@lists.ozlabs.org
Subject: Re: [PATCH 1/4] ARM: aspeed: g4: Add USB functions to pinctrl bindings
Date: Mon, 26 Jun 2017 22:53:39 -0500 [thread overview]
Message-ID: <1498535619.3651.29.camel@kernel.crashing.org> (raw)
In-Reply-To: <20170627021214.23323-2-andrew@aj.id.au>
On Tue, 2017-06-27 at 11:42 +0930, Andrew Jeffery wrote:
> The AST2400 contains several USB controllers:
>
> * USB 1.1 Host Controller
> * USB 2.0 Host Controller
> * Combined USB 2.0 Virtual Hub and USB 1.1 HID Controller
There's also a USB1.1 HID-only device-controller, but it's a legacy
piece of IP that we may never support. It might be worth mentioning its
existence and Ryan might want it supported in the bindings at least no
?
> Pins for three ports are routed to the three controllers such that:
>
> * Port 1 is a dedicated USB 1.1 host port
> * Port 2 is shared between the USB 1.1 host and HID controllers
> * Port 3 is shared between the USB 2.0 host and Hub controllers
>
> As the pins for port 1 are fixed function there is no associated mux
> function or group described in the bindings. Ports 2 and 3 are muxed as
> above, and the table below describes the mapping between pinmux function
> names and ports:
>
> Port | USB Version | USB Mode | Mux Function
> ------|--------------|-----------|-------------
> 1 | 1.1 | Host | -
> 2 | 1.1 | Host | USB11H2
> 2 | 1.1 | Device | USB11D1
> 3 | 2.0 | Host | USB2H1
> 3 | 2.0 | Device | USB2D1
>
> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
> ---
> Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt
> index ca01710ee29a..09142dab47db 100644
> --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt
> +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-aspeed.txt
> @@ -69,8 +69,9 @@ PWM1 PWM2 PWM3 PWM4 PWM5 PWM6 PWM7 RGMII1 RGMII2 RMII1 RMII2 ROM16 ROM8 ROMCS1
> ROMCS2 ROMCS3 ROMCS4 RXD1 RXD2 RXD3 RXD4 SALT1 SALT2 SALT3 SALT4 SD1 SD2 SGPMCK
> SGPMI SGPMLD SGPMO SGPSCK SGPSI0 SGPSI1 SGPSLD SIOONCTRL SIOPBI SIOPBO SIOPWREQ
> SIOPWRGD SIOS3 SIOS5 SIOSCI SPI1 SPI1DEBUG SPI1PASSTHRU SPICS1 TIMER3 TIMER4
> -TIMER5 TIMER6 TIMER7 TIMER8 TXD1 TXD2 TXD3 TXD4 UART6 USBCKI VGABIOS_ROM VGAHS
> -VGAVS VPI18 VPI24 VPI30 VPO12 VPO24 WDTRST1 WDTRST2
> +TIMER5 TIMER6 TIMER7 TIMER8 TXD1 TXD2 TXD3 TXD4 UART6 USB11D1 USB11H2 USB2D1
> +USB2H1 USBCKI VGABIOS_ROM VGAHS VGAVS VPI18 VPI24 VPI30 VPO12 VPO24 WDTRST1
> +WDTRST2
>
> aspeed,ast2500-pinctrl, aspeed,g5-pinctrl:
>
next prev parent reply other threads:[~2017-06-27 3:53 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-06-27 2:12 [PATCH 0/4] pinctrl: Add USB support for Aspeed SoCs Andrew Jeffery
2017-06-27 2:12 ` Andrew Jeffery
2017-06-27 2:12 ` Andrew Jeffery
2017-06-27 2:12 ` [PATCH 1/4] ARM: aspeed: g4: Add USB functions to pinctrl bindings Andrew Jeffery
2017-06-27 2:12 ` Andrew Jeffery
2017-06-27 2:12 ` Andrew Jeffery
2017-06-27 3:53 ` Benjamin Herrenschmidt [this message]
2017-06-27 3:53 ` Benjamin Herrenschmidt
2017-06-30 1:13 ` Andrew Jeffery
2017-06-30 1:13 ` Andrew Jeffery
2017-06-30 1:13 ` Andrew Jeffery
2017-06-29 20:12 ` Rob Herring
2017-06-29 20:12 ` Rob Herring
2017-06-29 20:12 ` Rob Herring
2017-06-27 2:12 ` [PATCH 2/4] ARM: aspeed: g5: " Andrew Jeffery
2017-06-27 2:12 ` Andrew Jeffery
2017-06-29 20:13 ` Rob Herring
2017-06-29 20:13 ` Rob Herring
2017-06-29 20:32 ` Rob Herring
2017-06-29 20:32 ` Rob Herring
2017-06-30 1:14 ` Andrew Jeffery
2017-06-30 1:14 ` Andrew Jeffery
2017-06-27 2:12 ` [PATCH 3/4] pinctrl: aspeed: g4: Add USB device and host support Andrew Jeffery
2017-06-27 2:12 ` Andrew Jeffery
2017-06-27 2:12 ` [PATCH 4/4] pinctrl: aspeed: g5: " Andrew Jeffery
2017-06-27 2:12 ` Andrew Jeffery
2017-06-29 12:53 ` [PATCH 0/4] pinctrl: Add USB support for Aspeed SoCs Linus Walleij
2017-06-29 12:53 ` Linus Walleij
2017-06-29 12:53 ` Linus Walleij
2017-06-30 1:24 ` Andrew Jeffery
2017-06-30 1:24 ` Andrew Jeffery
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