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From: Eugeniy.Paltsev@synopsys.com (Eugeniy Paltsev)
To: linux-snps-arc@lists.infradead.org
Subject: [PATCH] ARC: reset: introduce HSDKv1 reset driver
Date: Wed, 19 Jul 2017 15:32:22 +0000	[thread overview]
Message-ID: <1500478342.9320.28.camel@synopsys.com> (raw)
In-Reply-To: <1500476858.2364.45.camel@pengutronix.de>

Hi Philipp,

On Wed, 2017-07-19@17:07 +0200, Philipp Zabel wrote:
> On Tue, 2017-07-18@20:25 +0300, Eugeniy Paltsev wrote:
> > The HSDK v1 periphery IPs can be reset by accessing some registers
> > from the CGU block.
> > 
> > The list of available reset lines is documented in the DT bindings.
> > 
> > [snip]
> > --- a/drivers/reset/Kconfig
> > +++ b/drivers/reset/Kconfig
> > @@ -34,6 +34,12 @@ config RESET_BERLIN
> > ?	help
> > ?	??This enables the reset controller driver for Marvell
> > Berlin SoCs.
> > ?
> > +config RESET_HSDK_V1
> > +	bool "HSDK v1 Reset Driver"
> > +	default n
> 
> I suppose there will be a SOC_HSDK_V1 or similar in the future so
> that
> we can hide this option and enable it by default like the other reset
> drivers?
Actually we don't have (and don't planning to add) such SOC/board-
specific kconfig option, so I am wondering if it is OK to just left
this option not hidden?

> > [snip]
> > +
> > +#define CGU_ARC_RST_CTRL		0x0
> > +#define CGU_SYS_RST_CTRL		0x20
> > +#define CGU_DDR_RST_CTRL		0x40
> > +#define CGU_TUN_RST_CTRL		0x60
> 
> The ARC, DDR, and TUN reset control registers are never used.
Ok, I'll remove unused register defines.

> > [snip]
> 
> regards
> Philipp
> 
Thanks.
-- 
?Eugeniy Paltsev

WARNING: multiple messages have this Message-ID (diff)
From: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
To: "p.zabel@pengutronix.de" <p.zabel@pengutronix.de>
Cc: "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"Eugeniy.Paltsev@synopsys.com" <Eugeniy.Paltsev@synopsys.com>,
	"mark.rutland@arm.com" <mark.rutland@arm.com>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"linux-snps-arc@lists.infradead.org"
	<linux-snps-arc@lists.infradead.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>
Subject: Re: [PATCH] ARC: reset: introduce HSDKv1 reset driver
Date: Wed, 19 Jul 2017 15:32:22 +0000	[thread overview]
Message-ID: <1500478342.9320.28.camel@synopsys.com> (raw)
In-Reply-To: <1500476858.2364.45.camel@pengutronix.de>

Hi Philipp,

On Wed, 2017-07-19 at 17:07 +0200, Philipp Zabel wrote:
> On Tue, 2017-07-18 at 20:25 +0300, Eugeniy Paltsev wrote:
> > The HSDK v1 periphery IPs can be reset by accessing some registers
> > from the CGU block.
> > 
> > The list of available reset lines is documented in the DT bindings.
> > 
> > [snip]
> > --- a/drivers/reset/Kconfig
> > +++ b/drivers/reset/Kconfig
> > @@ -34,6 +34,12 @@ config RESET_BERLIN
> >  	help
> >  	  This enables the reset controller driver for Marvell
> > Berlin SoCs.
> >  
> > +config RESET_HSDK_V1
> > +	bool "HSDK v1 Reset Driver"
> > +	default n
> 
> I suppose there will be a SOC_HSDK_V1 or similar in the future so
> that
> we can hide this option and enable it by default like the other reset
> drivers?
Actually we don't have (and don't planning to add) such SOC/board-
specific kconfig option, so I am wondering if it is OK to just left
this option not hidden?

> > [snip]
> > +
> > +#define CGU_ARC_RST_CTRL		0x0
> > +#define CGU_SYS_RST_CTRL		0x20
> > +#define CGU_DDR_RST_CTRL		0x40
> > +#define CGU_TUN_RST_CTRL		0x60
> 
> The ARC, DDR, and TUN reset control registers are never used.
Ok, I'll remove unused register defines.

> > [snip]
> 
> regards
> Philipp
> 
Thanks.
-- 
 Eugeniy Paltsev

  reply	other threads:[~2017-07-19 15:32 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-18 17:25 [PATCH] ARC: reset: introduce HSDKv1 reset driver Eugeniy Paltsev
2017-07-18 17:25 ` Eugeniy Paltsev
2017-07-18 17:25 ` Eugeniy Paltsev
2017-07-19 15:07 ` Philipp Zabel
2017-07-19 15:07   ` Philipp Zabel
2017-07-19 15:32   ` Eugeniy Paltsev [this message]
2017-07-19 15:32     ` Eugeniy Paltsev
2017-07-19 15:47     ` Philipp Zabel
2017-07-19 15:47       ` Philipp Zabel

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