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* [PATCH] drm/i915: Split pin mapping into per platform functions
@ 2017-07-27  1:44 Anusha Srivatsa
  0 siblings, 0 replies; 8+ messages in thread
From: Anusha Srivatsa @ 2017-07-27  1:44 UTC (permalink / raw)
  To: intel-gfx

Cleanup the code. Map the pins in accordance to
individual platforms rather than according to ports.
Create separate functions for platforms.

Suugested-by Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/intel_drv.h  |  4 ++-
 drivers/gpu/drm/i915/intel_hdmi.c | 74 +++++++++++++++++++++++++++++----------
 2 files changed, 58 insertions(+), 20 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index ee0daecff713..0d3168b25f14 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1649,7 +1649,9 @@ void intel_hdmi_handle_sink_scrambling(struct intel_encoder *intel_encoder,
 				       bool high_tmds_clock_ratio,
 				       bool scrambling);
 void intel_dp_dual_mode_set_tmds_output(struct intel_hdmi *hdmi, bool enable);
-
+u8 gen8_ddc_pin_mapping(struct drm_i915_private *dev_priv, enum port port);
+u8 gen9_lp_ddc_pin_mapping(struct drm_i915_private *dev_priv, enum port port);
+u8 gen10_ddc_pin_mapping(struct drm_i915_private *dev_priv, enum port port);
 
 /* intel_lvds.c */
 void intel_lvds_init(struct drm_i915_private *dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 5609976539bf..b87bc3006b13 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -1850,7 +1850,7 @@ static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv,
 {
 	const struct ddi_vbt_port_info *info =
 		&dev_priv->vbt.ddi_port_info[port];
-	u8 ddc_pin;
+	u8 ddc_pin = 0;
 
 	if (info->alternate_ddc_pin) {
 		DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c (VBT)\n",
@@ -1858,36 +1858,72 @@ static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv,
 		return info->alternate_ddc_pin;
 	}
 
+	if (IS_CHERRYVIEW(dev_priv))
+		ddc_pin = gen8_ddc_pin_mapping(dev_priv, port);
+	else if (IS_GEN9_LP(dev_priv))
+		ddc_pin = gen9_lp_ddc_pin_mapping(dev_priv, port);
+	else if (IS_CANNONLAKE(dev_priv))
+		ddc_pin = gen10_ddc_pin_mapping(dev_priv, port);
+
+	DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c (platform default)\n",
+		      ddc_pin, port_name(port));
+	return ddc_pin;
+}
+
+u8 gen8_ddc_pin_mapping(struct drm_i915_private *dev_priv, enum port port)
+{
+	u8 ddc_pin;
+
+	switch (port) {
+	case PORT_D:
+		ddc_pin = GMBUS_PIN_DPD_CHV;
+		break;
+	default:
+		MISSING_CASE(port);
+		ddc_pin = GMBUS_PIN_DPB;
+		break;
+	}
+	return ddc_pin;
+}
+
+u8 gen9_lp_ddc_pin_mapping(struct drm_i915_private *dev_priv, enum port port)
+{
+	u8 ddc_pin;
+
 	switch (port) {
 	case PORT_B:
-		if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv))
-			ddc_pin = GMBUS_PIN_1_BXT;
-		else
-			ddc_pin = GMBUS_PIN_DPB;
+		ddc_pin = GMBUS_PIN_1_BXT;
 		break;
 	case PORT_C:
-		if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv))
-			ddc_pin = GMBUS_PIN_2_BXT;
-		else
-			ddc_pin = GMBUS_PIN_DPC;
-		break;
-	case PORT_D:
-		if (HAS_PCH_CNP(dev_priv))
-			ddc_pin = GMBUS_PIN_4_CNP;
-		else if (IS_CHERRYVIEW(dev_priv))
-			ddc_pin = GMBUS_PIN_DPD_CHV;
-		else
-			ddc_pin = GMBUS_PIN_DPD;
+		ddc_pin = GMBUS_PIN_2_BXT;
 		break;
 	default:
 		MISSING_CASE(port);
 		ddc_pin = GMBUS_PIN_DPB;
 		break;
 	}
+	return ddc_pin;
+}
 
-	DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c (platform default)\n",
-		      ddc_pin, port_name(port));
+u8 gen10_ddc_pin_mapping(struct drm_i915_private *dev_priv, enum port port)
+{
+	u8 ddc_pin;
 
+	switch (port) {
+	case PORT_B:
+		ddc_pin = GMBUS_PIN_1_BXT;
+		break;
+	case PORT_C:
+		ddc_pin = GMBUS_PIN_2_BXT;
+		break;
+	case PORT_D:
+		ddc_pin = GMBUS_PIN_4_CNP;
+		break;
+	default:
+		MISSING_CASE(port);
+		ddc_pin = GMBUS_PIN_DPB;
+		break;
+	}
 	return ddc_pin;
 }
 
-- 
2.11.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* [PATCH] drm/i915: Split pin mapping into per platform functions
@ 2017-08-10 18:42 Anusha Srivatsa
  2017-08-14 21:14 ` Paulo Zanoni
  0 siblings, 1 reply; 8+ messages in thread
From: Anusha Srivatsa @ 2017-08-10 18:42 UTC (permalink / raw)
  To: intel-gfx; +Cc: Rodrigo Vivi

Cleanup the code. Map the pins in accordance to
individual platforms rather than according to ports.
Create separate functions for platforms.

v2:
 - Add missing condition for CoffeeLake. Make platform
 specific functions static. Add function
 i915_ddc_pin_mapping().

Sugested-by Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Clinton Tayloe <clinton.a.taylor@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/intel_hdmi.c | 115 ++++++++++++++++++++++++++++++--------
 1 file changed, 92 insertions(+), 23 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index 2ef1ee85129d..41e6ba01ec1c 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -1843,49 +1843,118 @@ void intel_hdmi_handle_sink_scrambling(struct intel_encoder *encoder,
 	DRM_DEBUG_KMS("sink scrambling handled\n");
 }
 
-static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv,
-			     enum port port)
+static u8 chv_ddc_pin_mapping(struct drm_i915_private *dev_priv, enum port port)
 {
-	const struct ddi_vbt_port_info *info =
-		&dev_priv->vbt.ddi_port_info[port];
 	u8 ddc_pin;
 
-	if (info->alternate_ddc_pin) {
-		DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c (VBT)\n",
-			      info->alternate_ddc_pin, port_name(port));
-		return info->alternate_ddc_pin;
+	switch (port) {
+
+	case PORT_B:
+		ddc_pin = GMBUS_PIN_DPB;
+		break;
+	case PORT_C:
+		ddc_pin = GMBUS_PIN_DPC;
+		break;
+	case PORT_D:
+		ddc_pin = GMBUS_PIN_DPD_CHV;
+		break;
+	default:
+		MISSING_CASE(port);
+		ddc_pin = GMBUS_PIN_DPB;
+		break;
 	}
+	return ddc_pin;
+}
+
+static u8 bxt_ddc_pin_mapping(struct drm_i915_private *dev_priv, enum port port)
+{
+	u8 ddc_pin;
 
 	switch (port) {
 	case PORT_B:
-		if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv))
-			ddc_pin = GMBUS_PIN_1_BXT;
-		else
-			ddc_pin = GMBUS_PIN_DPB;
+		ddc_pin = GMBUS_PIN_1_BXT;
 		break;
 	case PORT_C:
-		if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv))
-			ddc_pin = GMBUS_PIN_2_BXT;
-		else
-			ddc_pin = GMBUS_PIN_DPC;
+		ddc_pin = GMBUS_PIN_2_BXT;
+		break;
+	default:
+		MISSING_CASE(port);
+		ddc_pin = GMBUS_PIN_DPB;
+		break;
+	}
+	return ddc_pin;
+}
+
+static u8 cnp_ddc_pin_mapping(struct drm_i915_private *dev_priv,
+		enum port port)
+{
+	u8 ddc_pin;
+
+	switch (port) {
+	case PORT_B:
+		ddc_pin = GMBUS_PIN_1_BXT;
+		break;
+	case PORT_C:
+		ddc_pin = GMBUS_PIN_2_BXT;
 		break;
 	case PORT_D:
-		if (HAS_PCH_CNP(dev_priv))
-			ddc_pin = GMBUS_PIN_4_CNP;
-		else if (IS_CHERRYVIEW(dev_priv))
-			ddc_pin = GMBUS_PIN_DPD_CHV;
-		else
-			ddc_pin = GMBUS_PIN_DPD;
+		ddc_pin = GMBUS_PIN_4_CNP;
+		break;
+	default:
+		MISSING_CASE(port);
+		ddc_pin = GMBUS_PIN_DPB;
+		break;
+	}
+	return ddc_pin;
+}
+
+static u8 i915_ddc_pin_mapping(struct drm_i915_private *dev_priv,
+		enum port port)
+{
+	u8 ddc_pin;
+
+	switch (port) {
+	case PORT_B:
+		ddc_pin = GMBUS_PIN_DPB;
+		break;
+	case PORT_C:
+		ddc_pin = GMBUS_PIN_DPC;
+		break;
+	case PORT_D:
+		ddc_pin = GMBUS_PIN_DPD;
 		break;
 	default:
 		MISSING_CASE(port);
 		ddc_pin = GMBUS_PIN_DPB;
 		break;
 	}
+	return ddc_pin;
+
+}
+static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv,
+			     enum port port)
+{
+	const struct ddi_vbt_port_info *info =
+		&dev_priv->vbt.ddi_port_info[port];
+	u8 ddc_pin = 0;
+
+	if (info->alternate_ddc_pin) {
+		DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c (VBT)\n",
+			      info->alternate_ddc_pin, port_name(port));
+		return info->alternate_ddc_pin;
+	}
+
+	if (IS_CHERRYVIEW(dev_priv))
+		ddc_pin = chv_ddc_pin_mapping(dev_priv, port);
+	else if (IS_GEN9_LP(dev_priv))
+		ddc_pin = bxt_ddc_pin_mapping(dev_priv, port);
+	else if (HAS_PCH_CNP(dev_priv))
+		ddc_pin = cnp_ddc_pin_mapping(dev_priv, port);
+	else
+		ddc_pin = i915_ddc_pin_mapping(dev_priv, port);
 
 	DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c (platform default)\n",
 		      ddc_pin, port_name(port));
-
 	return ddc_pin;
 }
 
-- 
2.11.0

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* Re: [PATCH] drm/i915: Split pin mapping into per platform functions
  2017-08-10 18:42 Anusha Srivatsa
@ 2017-08-14 21:14 ` Paulo Zanoni
  2017-08-14 21:23   ` Srivatsa, Anusha
  0 siblings, 1 reply; 8+ messages in thread
From: Paulo Zanoni @ 2017-08-14 21:14 UTC (permalink / raw)
  To: Anusha Srivatsa, intel-gfx; +Cc: Rodrigo Vivi

Em Qui, 2017-08-10 às 11:42 -0700, Anusha Srivatsa escreveu:
> Cleanup the code. Map the pins in accordance to
> individual platforms rather than according to ports.
> Create separate functions for platforms.
> 
> v2:
>  - Add missing condition for CoffeeLake. Make platform
>  specific functions static. Add function
>  i915_ddc_pin_mapping().
> 
> Sugested-by Ville Syrjala <ville.syrjala@linux.intel.com>
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Clinton Tayloe <clinton.a.taylor@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_hdmi.c | 115
> ++++++++++++++++++++++++++++++--------
>  1 file changed, 92 insertions(+), 23 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
> b/drivers/gpu/drm/i915/intel_hdmi.c
> index 2ef1ee85129d..41e6ba01ec1c 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -1843,49 +1843,118 @@ void
> intel_hdmi_handle_sink_scrambling(struct intel_encoder *encoder,
>  	DRM_DEBUG_KMS("sink scrambling handled\n");
>  }
>  
> -static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv,
> -			     enum port port)
> +static u8 chv_ddc_pin_mapping(struct drm_i915_private *dev_priv, 

Bikeshedding: what these functions do is pretty much map ports to DDC
pins, so I'd have named them x_port_to_ddc_pin() since that's the most
usual naming when converting "units", but I'm not opposed to the
current naming. Your choice.


> enum port port)
>  {
> -	const struct ddi_vbt_port_info *info =
> -		&dev_priv->vbt.ddi_port_info[port];
>  	u8 ddc_pin;
>  
> -	if (info->alternate_ddc_pin) {
> -		DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c
> (VBT)\n",
> -			      info->alternate_ddc_pin,
> port_name(port));
> -		return info->alternate_ddc_pin;
> +	switch (port) {
> +

This is the only switch statement where you added a blank line at this
point. Doing this is not our usual coding style.


> +	case PORT_B:
> +		ddc_pin = GMBUS_PIN_DPB;
> +		break;
> +	case PORT_C:
> +		ddc_pin = GMBUS_PIN_DPC;
> +		break;
> +	case PORT_D:
> +		ddc_pin = GMBUS_PIN_DPD_CHV;
> +		break;
> +	default:
> +		MISSING_CASE(port);
> +		ddc_pin = GMBUS_PIN_DPB;
> +		break;
>  	}
> +	return ddc_pin;

Another bikeshedding which you don't need to implement: just returning
the pins inside the switch statements (return GMBUX_PIN_XYZ) without
the ddc_pin variable would have made the functions much shorter.


> +}
> +
> +static u8 bxt_ddc_pin_mapping(struct drm_i915_private *dev_priv,
> enum port port)
> +{
> +	u8 ddc_pin;
>  
>  	switch (port) {
>  	case PORT_B:
> -		if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv))
> -			ddc_pin = GMBUS_PIN_1_BXT;
> -		else
> -			ddc_pin = GMBUS_PIN_DPB;
> +		ddc_pin = GMBUS_PIN_1_BXT;
>  		break;
>  	case PORT_C:
> -		if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv))
> -			ddc_pin = GMBUS_PIN_2_BXT;
> -		else
> -			ddc_pin = GMBUS_PIN_DPC;
> +		ddc_pin = GMBUS_PIN_2_BXT;
> +		break;
> +	default:
> +		MISSING_CASE(port);
> +		ddc_pin = GMBUS_PIN_DPB;

Now that you've reorganized the code it's very easy to notice that on
bxt/cnp the default value doesn't even match what we return from port
B. I wouldn't complain if you addressed this issue in a follow-up
patch.


> +		break;
> +	}
> +	return ddc_pin;
> +}
> +
> +static u8 cnp_ddc_pin_mapping(struct drm_i915_private *dev_priv,
> +		enum port port)
> +{
> +	u8 ddc_pin;
> +
> +	switch (port) {
> +	case PORT_B:
> +		ddc_pin = GMBUS_PIN_1_BXT;
> +		break;
> +	case PORT_C:
> +		ddc_pin = GMBUS_PIN_2_BXT;
>  		break;
>  	case PORT_D:
> -		if (HAS_PCH_CNP(dev_priv))
> -			ddc_pin = GMBUS_PIN_4_CNP;
> -		else if (IS_CHERRYVIEW(dev_priv))
> -			ddc_pin = GMBUS_PIN_DPD_CHV;
> -		else
> -			ddc_pin = GMBUS_PIN_DPD;
> +		ddc_pin = GMBUS_PIN_4_CNP;
> +		break;
> +	default:
> +		MISSING_CASE(port);
> +		ddc_pin = GMBUS_PIN_DPB;
> +		break;
> +	}
> +	return ddc_pin;
> +}
> +
> +static u8 i915_ddc_pin_mapping(struct drm_i915_private *dev_priv,
> +		enum port port)

The first platform to run this is g4x, so please make the function name
start with g4x_


> +{
> +	u8 ddc_pin;
> +
> +	switch (port) {
> +	case PORT_B:
> +		ddc_pin = GMBUS_PIN_DPB;
> +		break;
> +	case PORT_C:
> +		ddc_pin = GMBUS_PIN_DPC;
> +		break;
> +	case PORT_D:
> +		ddc_pin = GMBUS_PIN_DPD;
>  		break;
>  	default:
>  		MISSING_CASE(port);
>  		ddc_pin = GMBUS_PIN_DPB;
>  		break;
>  	}
> +	return ddc_pin;
> +
> +}
> +static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv,
> +			     enum port port)

Missing blank line between functions.


> +{
> +	const struct ddi_vbt_port_info *info =
> +		&dev_priv->vbt.ddi_port_info[port];
> +	u8 ddc_pin = 0;

In our coding style we usually don't zero-initialize things when they
don't need to be zero-initialized. The advantage of not zero-
initializing when we don't need is that if some rework happens and we
suddenly start forgetting to set a sane value, the compiler will tell
us.


> +
> +	if (info->alternate_ddc_pin) {
> +		DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c
> (VBT)\n",
> +			      info->alternate_ddc_pin,
> port_name(port));
> +		return info->alternate_ddc_pin;
> +	}
> +
> +	if (IS_CHERRYVIEW(dev_priv))
> +		ddc_pin = chv_ddc_pin_mapping(dev_priv, port);
> +	else if (IS_GEN9_LP(dev_priv))
> +		ddc_pin = bxt_ddc_pin_mapping(dev_priv, port);
> +	else if (HAS_PCH_CNP(dev_priv))
> +		ddc_pin = cnp_ddc_pin_mapping(dev_priv, port);
> +	else
> +		ddc_pin = i915_ddc_pin_mapping(dev_priv, port);
 
>  	DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c (platform
> default)\n",
>  		      ddc_pin, port_name(port));
> -

Please don't remove this line.


>  	return ddc_pin;
>  }
>  
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] drm/i915: Split pin mapping into per platform functions
  2017-08-14 21:14 ` Paulo Zanoni
@ 2017-08-14 21:23   ` Srivatsa, Anusha
  0 siblings, 0 replies; 8+ messages in thread
From: Srivatsa, Anusha @ 2017-08-14 21:23 UTC (permalink / raw)
  To: Zanoni, Paulo R, intel-gfx@lists.freedesktop.org; +Cc: Vivi, Rodrigo



>-----Original Message-----
>From: Zanoni, Paulo R
>Sent: Monday, August 14, 2017 2:14 PM
>To: Srivatsa, Anusha <anusha.srivatsa@intel.com>; intel-
>gfx@lists.freedesktop.org
>Cc: Vivi, Rodrigo <rodrigo.vivi@intel.com>
>Subject: Re: [Intel-gfx] [PATCH] drm/i915: Split pin mapping into per platform
>functions
>
>Em Qui, 2017-08-10 às 11:42 -0700, Anusha Srivatsa escreveu:
>> Cleanup the code. Map the pins in accordance to individual platforms
>> rather than according to ports.
>> Create separate functions for platforms.
>>
>> v2:
>>  - Add missing condition for CoffeeLake. Make platform
>>  specific functions static. Add function
>>  i915_ddc_pin_mapping().
>>
>> Sugested-by Ville Syrjala <ville.syrjala@linux.intel.com>
>> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> Cc: Clinton Tayloe <clinton.a.taylor@intel.com>
>> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
>> ---
>>  drivers/gpu/drm/i915/intel_hdmi.c | 115
>> ++++++++++++++++++++++++++++++--------
>>  1 file changed, 92 insertions(+), 23 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
>> b/drivers/gpu/drm/i915/intel_hdmi.c
>> index 2ef1ee85129d..41e6ba01ec1c 100644
>> --- a/drivers/gpu/drm/i915/intel_hdmi.c
>> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
>> @@ -1843,49 +1843,118 @@ void
>> intel_hdmi_handle_sink_scrambling(struct intel_encoder *encoder,
>>  	DRM_DEBUG_KMS("sink scrambling handled\n");
>>  }
>>
>> -static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv,
>> -			     enum port port)
>> +static u8 chv_ddc_pin_mapping(struct drm_i915_private *dev_priv,
>
>Bikeshedding: what these functions do is pretty much map ports to DDC pins, so
>I'd have named them x_port_to_ddc_pin() since that's the most usual naming
>when converting "units", but I'm not opposed to the current naming. Your choice.
>
>
>> enum port port)
>>  {
>> -	const struct ddi_vbt_port_info *info =
>> -		&dev_priv->vbt.ddi_port_info[port];
>>  	u8 ddc_pin;
>>
>> -	if (info->alternate_ddc_pin) {
>> -		DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c
>> (VBT)\n",
>> -			      info->alternate_ddc_pin,
>> port_name(port));
>> -		return info->alternate_ddc_pin;
>> +	switch (port) {
>> +
>
>This is the only switch statement where you added a blank line at this point. Doing
>this is not our usual coding style.

Will change in the next version.

>
>> +	case PORT_B:
>> +		ddc_pin = GMBUS_PIN_DPB;
>> +		break;
>> +	case PORT_C:
>> +		ddc_pin = GMBUS_PIN_DPC;
>> +		break;
>> +	case PORT_D:
>> +		ddc_pin = GMBUS_PIN_DPD_CHV;
>> +		break;
>> +	default:
>> +		MISSING_CASE(port);
>> +		ddc_pin = GMBUS_PIN_DPB;
>> +		break;
>>  	}
>> +	return ddc_pin;
>
>Another bikeshedding which you don't need to implement: just returning the pins
>inside the switch statements (return GMBUX_PIN_XYZ) without the ddc_pin
>variable would have made the functions much shorter.
>
Hmm... yes. I agree.

>> +}
>> +
>> +static u8 bxt_ddc_pin_mapping(struct drm_i915_private *dev_priv,
>> enum port port)
>> +{
>> +	u8 ddc_pin;
>>
>>  	switch (port) {
>>  	case PORT_B:
>> -		if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv))
>> -			ddc_pin = GMBUS_PIN_1_BXT;
>> -		else
>> -			ddc_pin = GMBUS_PIN_DPB;
>> +		ddc_pin = GMBUS_PIN_1_BXT;
>>  		break;
>>  	case PORT_C:
>> -		if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv))
>> -			ddc_pin = GMBUS_PIN_2_BXT;
>> -		else
>> -			ddc_pin = GMBUS_PIN_DPC;
>> +		ddc_pin = GMBUS_PIN_2_BXT;
>> +		break;
>> +	default:
>> +		MISSING_CASE(port);
>> +		ddc_pin = GMBUS_PIN_DPB;
>
>Now that you've reorganized the code it's very easy to notice that on bxt/cnp the
>default value doesn't even match what we return from port B. I wouldn't
>complain if you addressed this issue in a follow-up patch.
>
Yes. Will change.

>> +		break;
>> +	}
>> +	return ddc_pin;
>> +}
>> +
>> +static u8 cnp_ddc_pin_mapping(struct drm_i915_private *dev_priv,
>> +		enum port port)
>> +{
>> +	u8 ddc_pin;
>> +
>> +	switch (port) {
>> +	case PORT_B:
>> +		ddc_pin = GMBUS_PIN_1_BXT;
>> +		break;
>> +	case PORT_C:
>> +		ddc_pin = GMBUS_PIN_2_BXT;
>>  		break;
>>  	case PORT_D:
>> -		if (HAS_PCH_CNP(dev_priv))
>> -			ddc_pin = GMBUS_PIN_4_CNP;
>> -		else if (IS_CHERRYVIEW(dev_priv))
>> -			ddc_pin = GMBUS_PIN_DPD_CHV;
>> -		else
>> -			ddc_pin = GMBUS_PIN_DPD;
>> +		ddc_pin = GMBUS_PIN_4_CNP;
>> +		break;
>> +	default:
>> +		MISSING_CASE(port);
>> +		ddc_pin = GMBUS_PIN_DPB;
>> +		break;
>> +	}
>> +	return ddc_pin;
>> +}
>> +
>> +static u8 i915_ddc_pin_mapping(struct drm_i915_private *dev_priv,
>> +		enum port port)
>
>The first platform to run this is g4x, so please make the function name start with
>g4x_

I thought having i915_ will make it more readable. But will change to g4x_ in the next version.

>
>> +{
>> +	u8 ddc_pin;
>> +
>> +	switch (port) {
>> +	case PORT_B:
>> +		ddc_pin = GMBUS_PIN_DPB;
>> +		break;
>> +	case PORT_C:
>> +		ddc_pin = GMBUS_PIN_DPC;
>> +		break;
>> +	case PORT_D:
>> +		ddc_pin = GMBUS_PIN_DPD;
>>  		break;
>>  	default:
>>  		MISSING_CASE(port);
>>  		ddc_pin = GMBUS_PIN_DPB;
>>  		break;
>>  	}
>> +	return ddc_pin;
>> +
>> +}
>> +static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv,
>> +			     enum port port)
>
>Missing blank line between functions.

Will take care in the next version.
>
>> +{
>> +	const struct ddi_vbt_port_info *info =
>> +		&dev_priv->vbt.ddi_port_info[port];
>> +	u8 ddc_pin = 0;

>In our coding style we usually don't zero-initialize things when they don't need to
>be zero-initialized. The advantage of not zero- initializing when we don't need is
>that if some rework happens and we suddenly start forgetting to set a sane value,
>the compiler will tell us.

Got it. Thanks a lot Paulo. 

>
>> +
>> +	if (info->alternate_ddc_pin) {
>> +		DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c
>> (VBT)\n",
>> +			      info->alternate_ddc_pin,
>> port_name(port));
>> +		return info->alternate_ddc_pin;
>> +	}
>> +
>> +	if (IS_CHERRYVIEW(dev_priv))
>> +		ddc_pin = chv_ddc_pin_mapping(dev_priv, port);
>> +	else if (IS_GEN9_LP(dev_priv))
>> +		ddc_pin = bxt_ddc_pin_mapping(dev_priv, port);
>> +	else if (HAS_PCH_CNP(dev_priv))
>> +		ddc_pin = cnp_ddc_pin_mapping(dev_priv, port);
>> +	else
>> +		ddc_pin = i915_ddc_pin_mapping(dev_priv, port);
>
>>  	DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c (platform
>default)\n",
>>  		      ddc_pin, port_name(port));
>> -
>
>Please don't remove this line.

Yes. Will send the next version with changes soon.

Anusha
>
>>  	return ddc_pin;
>>  }
>>
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^ permalink raw reply	[flat|nested] 8+ messages in thread

* [PATCH] drm/i915: Split pin mapping into per platform functions
@ 2017-08-16 23:45 Anusha Srivatsa
  2017-08-17  0:06 ` ✓ Fi.CI.BAT: success for drm/i915: Split pin mapping into per platform functions (rev3) Patchwork
  2017-08-17 20:23 ` [PATCH] drm/i915: Split pin mapping into per platform functions Paulo Zanoni
  0 siblings, 2 replies; 8+ messages in thread
From: Anusha Srivatsa @ 2017-08-16 23:45 UTC (permalink / raw)
  To: intel-gfx; +Cc: Paulo Zanoni, Rodrigo Vivi

Cleanup the code. Map the pins in accordance to
individual platforms rather than according to ports.
Create separate functions for platforms.

v2:
 - Add missing condition for CoffeeLake. Make platform
 specific functions static. Add function
 i915_ddc_pin_mapping().

v3:
 - Rename functions to x_port_to_ddc_pin() which directly
   indicates the purpose. Correct default return values on CNP
   and BXT. Rename i915_port_to_ to g4x_port_to since that was
   the first platform to run this. Correct code style. (Paulo)

Sugested-by Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Clinton Tayloe <clinton.a.taylor@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
 drivers/gpu/drm/i915/intel_hdmi.c | 113 ++++++++++++++++++++++++++++++--------
 1 file changed, 91 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index e30c27a..e8abea7 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -1843,45 +1843,114 @@ void intel_hdmi_handle_sink_scrambling(struct intel_encoder *encoder,
 	DRM_DEBUG_KMS("sink scrambling handled\n");
 }
 
-static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv,
-			     enum port port)
+static u8 chv_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port)
 {
-	const struct ddi_vbt_port_info *info =
-		&dev_priv->vbt.ddi_port_info[port];
 	u8 ddc_pin;
 
-	if (info->alternate_ddc_pin) {
-		DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c (VBT)\n",
-			      info->alternate_ddc_pin, port_name(port));
-		return info->alternate_ddc_pin;
+	switch (port) {
+	case PORT_B:
+		ddc_pin = GMBUS_PIN_DPB;
+		break;
+	case PORT_C:
+		ddc_pin = GMBUS_PIN_DPC;
+		break;
+	case PORT_D:
+		ddc_pin = GMBUS_PIN_DPD_CHV;
+		break;
+	default:
+		MISSING_CASE(port);
+		ddc_pin = GMBUS_PIN_DPB;
+		break;
 	}
+	return ddc_pin;
+}
+
+static u8 bxt_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port)
+{
+	u8 ddc_pin;
 
 	switch (port) {
 	case PORT_B:
-		if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv))
-			ddc_pin = GMBUS_PIN_1_BXT;
-		else
-			ddc_pin = GMBUS_PIN_DPB;
+		ddc_pin = GMBUS_PIN_1_BXT;
 		break;
 	case PORT_C:
-		if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv))
-			ddc_pin = GMBUS_PIN_2_BXT;
-		else
-			ddc_pin = GMBUS_PIN_DPC;
+		ddc_pin = GMBUS_PIN_2_BXT;
+		break;
+	default:
+		MISSING_CASE(port);
+		ddc_pin = GMBUS_PIN_1_BXT;
+		break;
+	}
+	return ddc_pin;
+}
+
+static u8 cnp_port_to_ddc_pin(struct drm_i915_private *dev_priv,
+			      enum port port)
+{
+	u8 ddc_pin;
+
+	switch (port) {
+	case PORT_B:
+		ddc_pin = GMBUS_PIN_1_BXT;
+		break;
+	case PORT_C:
+		ddc_pin = GMBUS_PIN_2_BXT;
 		break;
 	case PORT_D:
-		if (HAS_PCH_CNP(dev_priv))
-			ddc_pin = GMBUS_PIN_4_CNP;
-		else if (IS_CHERRYVIEW(dev_priv))
-			ddc_pin = GMBUS_PIN_DPD_CHV;
-		else
-			ddc_pin = GMBUS_PIN_DPD;
+		ddc_pin = GMBUS_PIN_4_CNP;
+		break;
+	default:
+		MISSING_CASE(port);
+		ddc_pin = GMBUS_PIN_1_BXT;
+		break;
+	}
+	return ddc_pin;
+}
+
+static u8 g4x_port_to_ddc_pin(struct drm_i915_private *dev_priv,
+			      enum port port)
+{
+	u8 ddc_pin;
+
+	switch (port) {
+	case PORT_B:
+		ddc_pin = GMBUS_PIN_DPB;
+		break;
+	case PORT_C:
+		ddc_pin = GMBUS_PIN_DPC;
+		break;
+	case PORT_D:
+		ddc_pin = GMBUS_PIN_DPD;
 		break;
 	default:
 		MISSING_CASE(port);
 		ddc_pin = GMBUS_PIN_DPB;
 		break;
 	}
+	return ddc_pin;
+}
+
+static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv,
+			     enum port port)
+{
+	const struct ddi_vbt_port_info *info =
+		&dev_priv->vbt.ddi_port_info[port];
+	u8 ddc_pin;
+
+	if (info->alternate_ddc_pin) {
+		DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c (VBT)\n",
+			      info->alternate_ddc_pin, port_name(port));
+		return info->alternate_ddc_pin;
+	}
+
+	if (IS_CHERRYVIEW(dev_priv))
+		ddc_pin = chv_port_to_ddc_pin(dev_priv, port);
+	else if (IS_GEN9_LP(dev_priv))
+		ddc_pin = bxt_port_to_ddc_pin(dev_priv, port);
+	else if (HAS_PCH_CNP(dev_priv))
+		ddc_pin = cnp_port_to_ddc_pin(dev_priv, port);
+	else
+		ddc_pin = g4x_port_to_ddc_pin(dev_priv, port);
 
 	DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c (platform default)\n",
 		      ddc_pin, port_name(port));
-- 
2.7.4

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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* ✓ Fi.CI.BAT: success for drm/i915: Split pin mapping into per platform functions (rev3)
  2017-08-16 23:45 [PATCH] drm/i915: Split pin mapping into per platform functions Anusha Srivatsa
@ 2017-08-17  0:06 ` Patchwork
  2017-08-17 20:23 ` [PATCH] drm/i915: Split pin mapping into per platform functions Paulo Zanoni
  1 sibling, 0 replies; 8+ messages in thread
From: Patchwork @ 2017-08-17  0:06 UTC (permalink / raw)
  To: Anusha Srivatsa; +Cc: intel-gfx

== Series Details ==

Series: drm/i915: Split pin mapping into per platform functions (rev3)
URL   : https://patchwork.freedesktop.org/series/27965/
State : success

== Summary ==

Series 27965v3 drm/i915: Split pin mapping into per platform functions
https://patchwork.freedesktop.org/api/1.0/series/27965/revisions/3/mbox/

Test kms_pipe_crc_basic:
        Subgroup suspend-read-crc-pipe-b:
                pass       -> DMESG-WARN (fi-byt-n2820) fdo#101705

fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705

fi-bdw-5557u     total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  time:454s
fi-bdw-gvtdvm    total:279  pass:265  dwarn:0   dfail:0   fail:0   skip:14  time:446s
fi-blb-e6850     total:279  pass:224  dwarn:1   dfail:0   fail:0   skip:54  time:359s
fi-bsw-n3050     total:279  pass:243  dwarn:0   dfail:0   fail:0   skip:36  time:546s
fi-bxt-j4205     total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:521s
fi-byt-j1900     total:279  pass:254  dwarn:1   dfail:0   fail:0   skip:24  time:526s
fi-byt-n2820     total:279  pass:250  dwarn:1   dfail:0   fail:0   skip:28  time:510s
fi-glk-2a        total:279  pass:260  dwarn:0   dfail:0   fail:0   skip:19  time:622s
fi-hsw-4770      total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  time:441s
fi-hsw-4770r     total:279  pass:263  dwarn:0   dfail:0   fail:0   skip:16  time:423s
fi-ilk-650       total:279  pass:229  dwarn:0   dfail:0   fail:0   skip:50  time:427s
fi-ivb-3520m     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:504s
fi-ivb-3770      total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:474s
fi-kbl-7500u     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:479s
fi-kbl-7560u     total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:602s
fi-kbl-r         total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:595s
fi-pnv-d510      total:279  pass:223  dwarn:1   dfail:0   fail:0   skip:55  time:528s
fi-skl-6260u     total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:466s
fi-skl-6700k     total:279  pass:261  dwarn:0   dfail:0   fail:0   skip:18  time:480s
fi-skl-6770hq    total:279  pass:269  dwarn:0   dfail:0   fail:0   skip:10  time:489s
fi-skl-gvtdvm    total:279  pass:266  dwarn:0   dfail:0   fail:0   skip:13  time:443s
fi-skl-x1585l    total:279  pass:268  dwarn:0   dfail:0   fail:0   skip:11  time:496s
fi-snb-2520m     total:279  pass:251  dwarn:0   dfail:0   fail:0   skip:28  time:558s
fi-snb-2600      total:279  pass:250  dwarn:0   dfail:0   fail:0   skip:29  time:410s

ada53b43f81fe618f3f0f1dfbd3dd776bb277323 drm-tip: 2017y-08m-16d-15h-18m-56s UTC integration manifest
0b2d75f0f668 drm/i915: Split pin mapping into per platform functions

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_5418/
_______________________________________________
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^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] drm/i915: Split pin mapping into per platform functions
  2017-08-16 23:45 [PATCH] drm/i915: Split pin mapping into per platform functions Anusha Srivatsa
  2017-08-17  0:06 ` ✓ Fi.CI.BAT: success for drm/i915: Split pin mapping into per platform functions (rev3) Patchwork
@ 2017-08-17 20:23 ` Paulo Zanoni
  2017-08-17 21:29   ` Srivatsa, Anusha
  1 sibling, 1 reply; 8+ messages in thread
From: Paulo Zanoni @ 2017-08-17 20:23 UTC (permalink / raw)
  To: Anusha Srivatsa, intel-gfx; +Cc: Rodrigo Vivi

Em Qua, 2017-08-16 às 16:45 -0700, Anusha Srivatsa escreveu:
> Cleanup the code. Map the pins in accordance to
> individual platforms rather than according to ports.
> Create separate functions for platforms.
> 
> v2:
>  - Add missing condition for CoffeeLake. Make platform
>  specific functions static. Add function
>  i915_ddc_pin_mapping().
> 
> v3:
>  - Rename functions to x_port_to_ddc_pin() which directly
>    indicates the purpose. Correct default return values on CNP
>    and BXT. Rename i915_port_to_ to g4x_port_to since that was
>    the first platform to run this. Correct code style. (Paulo)
> 

Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>


> Sugested-by Ville Syrjala <ville.syrjala@linux.intel.com>
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Cc: Clinton Tayloe <clinton.a.taylor@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_hdmi.c | 113
> ++++++++++++++++++++++++++++++--------
>  1 file changed, 91 insertions(+), 22 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
> b/drivers/gpu/drm/i915/intel_hdmi.c
> index e30c27a..e8abea7 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -1843,45 +1843,114 @@ void
> intel_hdmi_handle_sink_scrambling(struct intel_encoder *encoder,
>  	DRM_DEBUG_KMS("sink scrambling handled\n");
>  }
>  
> -static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv,
> -			     enum port port)
> +static u8 chv_port_to_ddc_pin(struct drm_i915_private *dev_priv,
> enum port port)
>  {
> -	const struct ddi_vbt_port_info *info =
> -		&dev_priv->vbt.ddi_port_info[port];
>  	u8 ddc_pin;
>  
> -	if (info->alternate_ddc_pin) {
> -		DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c
> (VBT)\n",
> -			      info->alternate_ddc_pin,
> port_name(port));
> -		return info->alternate_ddc_pin;
> +	switch (port) {
> +	case PORT_B:
> +		ddc_pin = GMBUS_PIN_DPB;
> +		break;
> +	case PORT_C:
> +		ddc_pin = GMBUS_PIN_DPC;
> +		break;
> +	case PORT_D:
> +		ddc_pin = GMBUS_PIN_DPD_CHV;
> +		break;
> +	default:
> +		MISSING_CASE(port);
> +		ddc_pin = GMBUS_PIN_DPB;
> +		break;
>  	}
> +	return ddc_pin;
> +}
> +
> +static u8 bxt_port_to_ddc_pin(struct drm_i915_private *dev_priv,
> enum port port)
> +{
> +	u8 ddc_pin;
>  
>  	switch (port) {
>  	case PORT_B:
> -		if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv))
> -			ddc_pin = GMBUS_PIN_1_BXT;
> -		else
> -			ddc_pin = GMBUS_PIN_DPB;
> +		ddc_pin = GMBUS_PIN_1_BXT;
>  		break;
>  	case PORT_C:
> -		if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv))
> -			ddc_pin = GMBUS_PIN_2_BXT;
> -		else
> -			ddc_pin = GMBUS_PIN_DPC;
> +		ddc_pin = GMBUS_PIN_2_BXT;
> +		break;
> +	default:
> +		MISSING_CASE(port);
> +		ddc_pin = GMBUS_PIN_1_BXT;
> +		break;
> +	}
> +	return ddc_pin;
> +}
> +
> +static u8 cnp_port_to_ddc_pin(struct drm_i915_private *dev_priv,
> +			      enum port port)
> +{
> +	u8 ddc_pin;
> +
> +	switch (port) {
> +	case PORT_B:
> +		ddc_pin = GMBUS_PIN_1_BXT;
> +		break;
> +	case PORT_C:
> +		ddc_pin = GMBUS_PIN_2_BXT;
>  		break;
>  	case PORT_D:
> -		if (HAS_PCH_CNP(dev_priv))
> -			ddc_pin = GMBUS_PIN_4_CNP;
> -		else if (IS_CHERRYVIEW(dev_priv))
> -			ddc_pin = GMBUS_PIN_DPD_CHV;
> -		else
> -			ddc_pin = GMBUS_PIN_DPD;
> +		ddc_pin = GMBUS_PIN_4_CNP;
> +		break;
> +	default:
> +		MISSING_CASE(port);
> +		ddc_pin = GMBUS_PIN_1_BXT;
> +		break;
> +	}
> +	return ddc_pin;
> +}
> +
> +static u8 g4x_port_to_ddc_pin(struct drm_i915_private *dev_priv,
> +			      enum port port)
> +{
> +	u8 ddc_pin;
> +
> +	switch (port) {
> +	case PORT_B:
> +		ddc_pin = GMBUS_PIN_DPB;
> +		break;
> +	case PORT_C:
> +		ddc_pin = GMBUS_PIN_DPC;
> +		break;
> +	case PORT_D:
> +		ddc_pin = GMBUS_PIN_DPD;
>  		break;
>  	default:
>  		MISSING_CASE(port);
>  		ddc_pin = GMBUS_PIN_DPB;
>  		break;
>  	}
> +	return ddc_pin;
> +}
> +
> +static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv,
> +			     enum port port)
> +{
> +	const struct ddi_vbt_port_info *info =
> +		&dev_priv->vbt.ddi_port_info[port];
> +	u8 ddc_pin;
> +
> +	if (info->alternate_ddc_pin) {
> +		DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c
> (VBT)\n",
> +			      info->alternate_ddc_pin,
> port_name(port));
> +		return info->alternate_ddc_pin;
> +	}
> +
> +	if (IS_CHERRYVIEW(dev_priv))
> +		ddc_pin = chv_port_to_ddc_pin(dev_priv, port);
> +	else if (IS_GEN9_LP(dev_priv))
> +		ddc_pin = bxt_port_to_ddc_pin(dev_priv, port);
> +	else if (HAS_PCH_CNP(dev_priv))
> +		ddc_pin = cnp_port_to_ddc_pin(dev_priv, port);
> +	else
> +		ddc_pin = g4x_port_to_ddc_pin(dev_priv, port);
>  
>  	DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c (platform
> default)\n",
>  		      ddc_pin, port_name(port));
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^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] drm/i915: Split pin mapping into per platform functions
  2017-08-17 20:23 ` [PATCH] drm/i915: Split pin mapping into per platform functions Paulo Zanoni
@ 2017-08-17 21:29   ` Srivatsa, Anusha
  0 siblings, 0 replies; 8+ messages in thread
From: Srivatsa, Anusha @ 2017-08-17 21:29 UTC (permalink / raw)
  To: Zanoni, Paulo R, intel-gfx@lists.freedesktop.org; +Cc: Vivi, Rodrigo



>-----Original Message-----
>From: Zanoni, Paulo R
>Sent: Thursday, August 17, 2017 1:24 PM
>To: Srivatsa, Anusha <anusha.srivatsa@intel.com>; intel-
>gfx@lists.freedesktop.org
>Cc: Ville Syrjala <ville.syrjala@linux.intel.com>; Vivi, Rodrigo
><rodrigo.vivi@intel.com>; Taylor, Clinton A <clinton.a.taylor@intel.com>
>Subject: Re: [PATCH] drm/i915: Split pin mapping into per platform functions
>
>Em Qua, 2017-08-16 às 16:45 -0700, Anusha Srivatsa escreveu:
>> Cleanup the code. Map the pins in accordance to individual platforms
>> rather than according to ports.
>> Create separate functions for platforms.
>>
>> v2:
>>  - Add missing condition for CoffeeLake. Make platform
>>  specific functions static. Add function
>>  i915_ddc_pin_mapping().
>>
>> v3:
>>  - Rename functions to x_port_to_ddc_pin() which directly
>>    indicates the purpose. Correct default return values on CNP
>>    and BXT. Rename i915_port_to_ to g4x_port_to since that was
>>    the first platform to run this. Correct code style. (Paulo)
>>
>
>Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
>
Thanks for the review Paulo! 

Anusha 
>> Sugested-by Ville Syrjala <ville.syrjala@linux.intel.com>
>> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
>> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
>> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>> Cc: Clinton Tayloe <clinton.a.taylor@intel.com>
>> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
>> ---
>>  drivers/gpu/drm/i915/intel_hdmi.c | 113
>> ++++++++++++++++++++++++++++++--------
>>  1 file changed, 91 insertions(+), 22 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
>> b/drivers/gpu/drm/i915/intel_hdmi.c
>> index e30c27a..e8abea7 100644
>> --- a/drivers/gpu/drm/i915/intel_hdmi.c
>> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
>> @@ -1843,45 +1843,114 @@ void
>> intel_hdmi_handle_sink_scrambling(struct intel_encoder *encoder,
>>  	DRM_DEBUG_KMS("sink scrambling handled\n");
>>  }
>>
>> -static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv,
>> -			     enum port port)
>> +static u8 chv_port_to_ddc_pin(struct drm_i915_private *dev_priv,
>> enum port port)
>>  {
>> -	const struct ddi_vbt_port_info *info =
>> -		&dev_priv->vbt.ddi_port_info[port];
>>  	u8 ddc_pin;
>>
>> -	if (info->alternate_ddc_pin) {
>> -		DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c
>> (VBT)\n",
>> -			      info->alternate_ddc_pin,
>> port_name(port));
>> -		return info->alternate_ddc_pin;
>> +	switch (port) {
>> +	case PORT_B:
>> +		ddc_pin = GMBUS_PIN_DPB;
>> +		break;
>> +	case PORT_C:
>> +		ddc_pin = GMBUS_PIN_DPC;
>> +		break;
>> +	case PORT_D:
>> +		ddc_pin = GMBUS_PIN_DPD_CHV;
>> +		break;
>> +	default:
>> +		MISSING_CASE(port);
>> +		ddc_pin = GMBUS_PIN_DPB;
>> +		break;
>>  	}
>> +	return ddc_pin;
>> +}
>> +
>> +static u8 bxt_port_to_ddc_pin(struct drm_i915_private *dev_priv,
>> enum port port)
>> +{
>> +	u8 ddc_pin;
>>
>>  	switch (port) {
>>  	case PORT_B:
>> -		if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv))
>> -			ddc_pin = GMBUS_PIN_1_BXT;
>> -		else
>> -			ddc_pin = GMBUS_PIN_DPB;
>> +		ddc_pin = GMBUS_PIN_1_BXT;
>>  		break;
>>  	case PORT_C:
>> -		if (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv))
>> -			ddc_pin = GMBUS_PIN_2_BXT;
>> -		else
>> -			ddc_pin = GMBUS_PIN_DPC;
>> +		ddc_pin = GMBUS_PIN_2_BXT;
>> +		break;
>> +	default:
>> +		MISSING_CASE(port);
>> +		ddc_pin = GMBUS_PIN_1_BXT;
>> +		break;
>> +	}
>> +	return ddc_pin;
>> +}
>> +
>> +static u8 cnp_port_to_ddc_pin(struct drm_i915_private *dev_priv,
>> +			      enum port port)
>> +{
>> +	u8 ddc_pin;
>> +
>> +	switch (port) {
>> +	case PORT_B:
>> +		ddc_pin = GMBUS_PIN_1_BXT;
>> +		break;
>> +	case PORT_C:
>> +		ddc_pin = GMBUS_PIN_2_BXT;
>>  		break;
>>  	case PORT_D:
>> -		if (HAS_PCH_CNP(dev_priv))
>> -			ddc_pin = GMBUS_PIN_4_CNP;
>> -		else if (IS_CHERRYVIEW(dev_priv))
>> -			ddc_pin = GMBUS_PIN_DPD_CHV;
>> -		else
>> -			ddc_pin = GMBUS_PIN_DPD;
>> +		ddc_pin = GMBUS_PIN_4_CNP;
>> +		break;
>> +	default:
>> +		MISSING_CASE(port);
>> +		ddc_pin = GMBUS_PIN_1_BXT;
>> +		break;
>> +	}
>> +	return ddc_pin;
>> +}
>> +
>> +static u8 g4x_port_to_ddc_pin(struct drm_i915_private *dev_priv,
>> +			      enum port port)
>> +{
>> +	u8 ddc_pin;
>> +
>> +	switch (port) {
>> +	case PORT_B:
>> +		ddc_pin = GMBUS_PIN_DPB;
>> +		break;
>> +	case PORT_C:
>> +		ddc_pin = GMBUS_PIN_DPC;
>> +		break;
>> +	case PORT_D:
>> +		ddc_pin = GMBUS_PIN_DPD;
>>  		break;
>>  	default:
>>  		MISSING_CASE(port);
>>  		ddc_pin = GMBUS_PIN_DPB;
>>  		break;
>>  	}
>> +	return ddc_pin;
>> +}
>> +
>> +static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv,
>> +			     enum port port)
>> +{
>> +	const struct ddi_vbt_port_info *info =
>> +		&dev_priv->vbt.ddi_port_info[port];
>> +	u8 ddc_pin;
>> +
>> +	if (info->alternate_ddc_pin) {
>> +		DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c
>> (VBT)\n",
>> +			      info->alternate_ddc_pin,
>> port_name(port));
>> +		return info->alternate_ddc_pin;
>> +	}
>> +
>> +	if (IS_CHERRYVIEW(dev_priv))
>> +		ddc_pin = chv_port_to_ddc_pin(dev_priv, port);
>> +	else if (IS_GEN9_LP(dev_priv))
>> +		ddc_pin = bxt_port_to_ddc_pin(dev_priv, port);
>> +	else if (HAS_PCH_CNP(dev_priv))
>> +		ddc_pin = cnp_port_to_ddc_pin(dev_priv, port);
>> +	else
>> +		ddc_pin = g4x_port_to_ddc_pin(dev_priv, port);
>>
>>  	DRM_DEBUG_KMS("Using DDC pin 0x%x for port %c (platform
>default)\n",
>>  		      ddc_pin, port_name(port));
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^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2017-08-17 21:29 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-08-16 23:45 [PATCH] drm/i915: Split pin mapping into per platform functions Anusha Srivatsa
2017-08-17  0:06 ` ✓ Fi.CI.BAT: success for drm/i915: Split pin mapping into per platform functions (rev3) Patchwork
2017-08-17 20:23 ` [PATCH] drm/i915: Split pin mapping into per platform functions Paulo Zanoni
2017-08-17 21:29   ` Srivatsa, Anusha
  -- strict thread matches above, loose matches on Subject: below --
2017-08-10 18:42 Anusha Srivatsa
2017-08-14 21:14 ` Paulo Zanoni
2017-08-14 21:23   ` Srivatsa, Anusha
2017-07-27  1:44 Anusha Srivatsa

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