From: Ram Pai <linuxram@us.ibm.com>
To: mpe@ellerman.id.au, linuxppc-dev@lists.ozlabs.org
Cc: benh@kernel.crashing.org, paulus@samba.org,
khandual@linux.vnet.ibm.com, aneesh.kumar@linux.vnet.ibm.com,
bsingharora@gmail.com, hbabu@us.ibm.com, mhocko@kernel.org,
bauerman@linux.vnet.ibm.com, ebiederm@xmission.com,
linuxram@us.ibm.com
Subject: [PATCH 5/7] powerpc: Swizzle around 4K PTE bits to free up bit 5 and bit 6
Date: Fri, 8 Sep 2017 15:44:45 -0700 [thread overview]
Message-ID: <1504910713-7094-6-git-send-email-linuxram@us.ibm.com> (raw)
In-Reply-To: <1504910713-7094-1-git-send-email-linuxram@us.ibm.com>
We need PTE bits 3 ,4, 5, 6 and 57 to support protection-keys,
because these are the bits we want to consolidate on across all
configuration to support protection keys.
Bit 3,4,5 and 6 are currently used on 4K-pte kernels. But bit 9
and 10 are available. Hence we use the two available bits and
free up bit 5 and 6. We will still not be able to free up bit 3
and 4. In the absence of any other free bits, we will have to
stay satisfied with what we have :-(. This means we will not
be able to support 32 protection keys, but only 8. The bit
numbers are big-endian as defined in the ISA3.0
This patch does the following change to 4K PTE.
H_PAGE_F_SECOND (S) which occupied bit 4 moves to bit 7.
H_PAGE_F_GIX (G,I,X) which occupied bit 5, 6 and 7 also moves
to bit 8,9, 10 respectively.
H_PAGE_HASHPTE (H) which occupied bit 8 moves to bit 4.
Before the patch, the 4k PTE format was as follows
0 1 2 3 4 5 6 7 8 9 10....................57.....63
: : : : : : : : : : : : :
v v v v v v v v v v v v v
,-,-,-,-,--,--,--,--,-,-,-,-,-,------------------,-,-,-,
|x|x|x|B|S |G |I |X |H| | |x|x|................| |x|x|x|
'_'_'_'_'__'__'__'__'_'_'_'_'_'________________'_'_'_'_'
After the patch, the 4k PTE format is as follows
0 1 2 3 4 5 6 7 8 9 10....................57.....63
: : : : : : : : : : : : :
v v v v v v v v v v v v v
,-,-,-,-,--,--,--,--,-,-,-,-,-,------------------,-,-,-,
|x|x|x|B|H | | |S |G|I|X|x|x|................| |.|.|.|
'_'_'_'_'__'__'__'__'_'_'_'_'_'________________'_'_'_'_'
The patch has no code changes; just swizzles around bits.
Signed-off-by: Ram Pai <linuxram@us.ibm.com>
---
arch/powerpc/include/asm/book3s/64/hash-4k.h | 7 ++++---
arch/powerpc/include/asm/book3s/64/hash-64k.h | 1 +
arch/powerpc/include/asm/book3s/64/hash.h | 1 -
3 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/include/asm/book3s/64/hash-4k.h b/arch/powerpc/include/asm/book3s/64/hash-4k.h
index dc153c6..5187249 100644
--- a/arch/powerpc/include/asm/book3s/64/hash-4k.h
+++ b/arch/powerpc/include/asm/book3s/64/hash-4k.h
@@ -16,10 +16,11 @@
#define H_PUD_TABLE_SIZE (sizeof(pud_t) << H_PUD_INDEX_SIZE)
#define H_PGD_TABLE_SIZE (sizeof(pgd_t) << H_PGD_INDEX_SIZE)
-#define H_PAGE_F_GIX_SHIFT 56
-#define H_PAGE_F_SECOND _RPAGE_RSV2 /* HPTE is in 2ndary HPTEG */
-#define H_PAGE_F_GIX (_RPAGE_RSV3 | _RPAGE_RSV4 | _RPAGE_RPN44)
+#define H_PAGE_F_GIX_SHIFT 53
+#define H_PAGE_F_SECOND _RPAGE_RPN44 /* HPTE is in 2ndary HPTEG */
+#define H_PAGE_F_GIX (_RPAGE_RPN43 | _RPAGE_RPN42 | _RPAGE_RPN41)
#define H_PAGE_BUSY _RPAGE_RSV1 /* software: PTE & hash are busy */
+#define H_PAGE_HASHPTE _RPAGE_RSV2 /* software: PTE & hash are busy */
/* PTE flags to conserve for HPTE identification */
#define _PAGE_HPTEFLAGS (H_PAGE_BUSY | H_PAGE_HASHPTE | \
diff --git a/arch/powerpc/include/asm/book3s/64/hash-64k.h b/arch/powerpc/include/asm/book3s/64/hash-64k.h
index 89ef5a9..8576060 100644
--- a/arch/powerpc/include/asm/book3s/64/hash-64k.h
+++ b/arch/powerpc/include/asm/book3s/64/hash-64k.h
@@ -13,6 +13,7 @@
#define H_PAGE_COMBO _RPAGE_RPN0 /* this is a combo 4k page */
#define H_PAGE_4K_PFN _RPAGE_RPN1 /* PFN is for a single 4k page */
#define H_PAGE_BUSY _RPAGE_RPN44 /* software: PTE & hash are busy */
+#define H_PAGE_HASHPTE _RPAGE_RPN43 /* PTE has associated HPTE */
/*
* We need to differentiate between explicit huge page and THP huge
diff --git a/arch/powerpc/include/asm/book3s/64/hash.h b/arch/powerpc/include/asm/book3s/64/hash.h
index 46f3a23..953795e 100644
--- a/arch/powerpc/include/asm/book3s/64/hash.h
+++ b/arch/powerpc/include/asm/book3s/64/hash.h
@@ -8,7 +8,6 @@
*
*/
#define H_PTE_NONE_MASK _PAGE_HPTEFLAGS
-#define H_PAGE_HASHPTE _RPAGE_RPN43 /* PTE has associated HPTE */
#ifdef CONFIG_PPC_64K_PAGES
#include <asm/book3s/64/hash-64k.h>
--
1.7.1
next prev parent reply other threads:[~2017-09-08 22:46 UTC|newest]
Thread overview: 134+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-09-08 22:44 [PATCH 0/7] powerpc: Free up RPAGE_RSV bits Ram Pai
2017-09-08 22:44 ` [PATCH 1/7] powerpc: introduce pte_set_hash_slot() helper Ram Pai
2017-09-13 7:55 ` Balbir Singh
2017-10-19 4:52 ` Michael Ellerman
2017-09-08 22:44 ` [PATCH 2/7] powerpc: introduce pte_get_hash_gslot() helper Ram Pai
2017-09-13 9:32 ` Balbir Singh
2017-09-13 20:10 ` Ram Pai
2017-09-08 22:44 ` [PATCH 3/7] powerpc: Free up four 64K PTE bits in 4K backed HPTE pages Ram Pai
2017-09-14 1:18 ` Balbir Singh
2017-10-19 3:25 ` Michael Ellerman
2017-10-19 17:02 ` Ram Pai
2017-10-23 8:47 ` Aneesh Kumar K.V
2017-10-23 16:29 ` Ram Pai
2017-10-25 9:18 ` Michael Ellerman
2017-10-26 6:08 ` Ram Pai
2017-09-08 22:44 ` [PATCH 4/7] powerpc: Free up four 64K PTE bits in 64K " Ram Pai
2017-09-14 1:44 ` Balbir Singh
2017-09-14 17:54 ` Ram Pai
2017-09-14 18:25 ` Ram Pai
2017-09-14 8:13 ` Benjamin Herrenschmidt
2017-10-23 8:52 ` Aneesh Kumar K.V
2017-10-23 23:42 ` Ram Pai
2017-10-23 19:22 ` Ram Pai
2017-10-24 3:37 ` Aneesh Kumar K.V
2017-09-08 22:44 ` Ram Pai [this message]
2017-09-14 1:48 ` [PATCH 5/7] powerpc: Swizzle around 4K PTE bits to free up bit 5 and bit 6 Balbir Singh
2017-09-14 17:23 ` Ram Pai
2017-09-08 22:44 ` [PATCH 6/7] powerpc: use helper functions to get and set hash slots Ram Pai
2017-09-08 22:44 ` [PATCH 7/7] powerpc: capture the PTE format changes in the dump pte report Ram Pai
2017-09-14 3:22 ` Balbir Singh
2017-09-14 17:19 ` Ram Pai
2017-09-08 22:44 ` [PATCH 00/25] powerpc: Memory Protection Keys Ram Pai
2017-09-08 22:44 ` [PATCH 01/25] powerpc: initial pkey plumbing Ram Pai
2017-09-14 3:32 ` Balbir Singh
2017-09-14 16:17 ` Ram Pai
2017-10-19 4:20 ` Michael Ellerman
2017-10-19 17:11 ` Ram Pai
2017-10-24 8:17 ` Michael Ellerman
2017-09-08 22:44 ` [PATCH 02/25] powerpc: define an additional vma bit for protection keys Ram Pai
2017-09-14 4:38 ` Balbir Singh
2017-09-14 8:11 ` Benjamin Herrenschmidt
2017-10-23 21:06 ` Ram Pai
2017-09-14 16:15 ` Ram Pai
2017-10-23 9:25 ` Aneesh Kumar K.V
2017-10-23 9:28 ` Aneesh Kumar K.V
2017-10-23 17:57 ` Ram Pai
2017-10-23 17:43 ` Ram Pai
2017-09-08 22:44 ` [PATCH 03/25] powerpc: track allocation status of all pkeys Ram Pai
2017-10-07 10:02 ` Michael Ellerman
2017-10-08 23:02 ` Ram Pai
2017-10-18 2:47 ` Balbir Singh
2017-10-23 9:41 ` Aneesh Kumar K.V
2017-10-23 18:14 ` Ram Pai
2017-10-24 6:28 ` Aneesh Kumar K.V
2017-10-24 7:23 ` Ram Pai
2017-09-08 22:44 ` [PATCH 04/25] powerpc: helper function to read, write AMR, IAMR, UAMOR registers Ram Pai
2017-10-18 3:17 ` [PATCH 04/25] powerpc: helper function to read,write AMR,IAMR,UAMOR registers Balbir Singh
2017-10-18 3:42 ` Ram Pai
2017-09-08 22:44 ` [PATCH 05/25] powerpc: helper functions to initialize AMR, IAMR and UAMOR registers Ram Pai
2017-10-18 3:24 ` Balbir Singh
2017-10-18 20:38 ` Ram Pai
2017-10-24 6:25 ` Aneesh Kumar K.V
2017-10-24 7:04 ` Ram Pai
2017-10-24 8:29 ` Michael Ellerman
2017-09-08 22:44 ` [PATCH 06/25] powerpc: cleaup AMR, iAMR when a key is allocated or freed Ram Pai
2017-10-18 3:34 ` [PATCH 06/25] powerpc: cleaup AMR,iAMR " Balbir Singh
2017-10-23 9:43 ` [PATCH 06/25] powerpc: cleaup AMR, iAMR " Aneesh Kumar K.V
2017-10-23 18:36 ` [PATCH 06/25] powerpc: cleaup AMR,iAMR " Ram Pai
2017-10-23 9:43 ` [PATCH 06/25] powerpc: cleaup AMR, iAMR " Aneesh Kumar K.V
2017-10-23 18:29 ` [PATCH 06/25] powerpc: cleaup AMR,iAMR " Ram Pai
2017-09-08 22:44 ` [PATCH 07/25] powerpc: implementation for arch_set_user_pkey_access() Ram Pai
2017-09-08 22:44 ` [PATCH 08/25] powerpc: sys_pkey_alloc() and sys_pkey_free() system calls Ram Pai
2017-10-24 15:48 ` Michael Ellerman
2017-10-24 18:34 ` Ram Pai
2017-10-25 9:26 ` Michael Ellerman
2017-09-08 22:44 ` [PATCH 09/25] powerpc: ability to create execute-disabled pkeys Ram Pai
2017-10-18 3:42 ` Balbir Singh
2017-10-18 5:15 ` Ram Pai
2017-10-24 6:58 ` Aneesh Kumar K.V
2017-10-24 7:20 ` Ram Pai
2017-10-24 4:36 ` Aneesh Kumar K.V
2017-10-28 23:18 ` Ram Pai
2017-09-08 22:44 ` [PATCH 10/25] powerpc: store and restore the pkey state across context switches Ram Pai
2017-10-18 3:49 ` Balbir Singh
2017-10-18 20:47 ` Ram Pai
2017-10-18 23:00 ` Balbir Singh
2017-10-19 0:52 ` Ram Pai
2017-09-08 22:44 ` [PATCH 11/25] powerpc: introduce execute-only pkey Ram Pai
2017-10-18 4:15 ` Balbir Singh
2017-10-18 20:57 ` Ram Pai
2017-10-18 23:02 ` Balbir Singh
2017-10-19 15:52 ` Ram Pai
2017-09-08 22:45 ` [PATCH 12/25] powerpc: ability to associate pkey to a vma Ram Pai
2017-10-18 4:27 ` Balbir Singh
2017-10-18 21:01 ` Ram Pai
2017-09-08 22:45 ` [PATCH 13/25] powerpc: implementation for arch_override_mprotect_pkey() Ram Pai
2017-10-18 4:36 ` Balbir Singh
2017-10-18 21:10 ` Ram Pai
2017-10-18 23:04 ` Balbir Singh
2017-10-19 16:39 ` Ram Pai
2017-09-08 22:45 ` [PATCH 14/25] powerpc: map vma key-protection bits to pte key bits Ram Pai
2017-10-18 4:39 ` Balbir Singh
2017-10-18 21:14 ` Ram Pai
2017-09-08 22:45 ` [PATCH 15/25] powerpc: sys_pkey_mprotect() system call Ram Pai
2017-09-08 22:45 ` [PATCH 16/25] powerpc: Program HPTE key protection bits Ram Pai
2017-10-18 4:43 ` Balbir Singh
2017-09-08 22:45 ` [PATCH 17/25] powerpc: helper to validate key-access permissions of a pte Ram Pai
2017-10-18 4:48 ` Balbir Singh
2017-10-18 21:19 ` Ram Pai
2017-09-08 22:45 ` [PATCH 18/25] powerpc: check key protection for user page access Ram Pai
2017-10-18 19:57 ` Balbir Singh
2017-10-18 21:29 ` Ram Pai
2017-10-18 23:08 ` Balbir Singh
2017-10-19 16:46 ` Ram Pai
2017-09-08 22:45 ` [PATCH 19/25] powerpc: implementation for arch_vma_access_permitted() Ram Pai
2017-10-18 23:20 ` Balbir Singh
2017-10-24 15:48 ` Michael Ellerman
2017-09-08 22:45 ` [PATCH 20/25] powerpc: Handle exceptions caused by pkey violation Ram Pai
2017-10-18 23:27 ` Balbir Singh
2017-10-19 16:53 ` Ram Pai
2017-10-24 15:47 ` Michael Ellerman
2017-10-24 18:26 ` Ram Pai
2017-10-29 14:03 ` Aneesh Kumar K.V
2017-10-30 0:37 ` Ram Pai
2017-09-08 22:45 ` [PATCH 21/25] powerpc: introduce get_pte_pkey() helper Ram Pai
2017-10-18 23:29 ` Balbir Singh
2017-10-19 16:55 ` Ram Pai
2017-09-08 22:45 ` [PATCH 22/25] powerpc: capture the violated protection key on fault Ram Pai
2017-10-24 15:46 ` Michael Ellerman
2017-09-08 22:45 ` [PATCH 23/25] powerpc: Deliver SEGV signal on pkey violation Ram Pai
2017-10-24 15:46 ` Michael Ellerman
2017-10-24 17:19 ` Ram Pai
2017-09-08 22:45 ` [PATCH 24/25] powerpc/ptrace: Add memory protection key regset Ram Pai
2017-09-08 22:45 ` [PATCH 25/25] powerpc: Enable pkey subsystem Ram Pai
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1504910713-7094-6-git-send-email-linuxram@us.ibm.com \
--to=linuxram@us.ibm.com \
--cc=aneesh.kumar@linux.vnet.ibm.com \
--cc=bauerman@linux.vnet.ibm.com \
--cc=benh@kernel.crashing.org \
--cc=bsingharora@gmail.com \
--cc=ebiederm@xmission.com \
--cc=hbabu@us.ibm.com \
--cc=khandual@linux.vnet.ibm.com \
--cc=linuxppc-dev@lists.ozlabs.org \
--cc=mhocko@kernel.org \
--cc=mpe@ellerman.id.au \
--cc=paulus@samba.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.