[PATCH v2 14/17] phy: qcom-qusb2: Set vbus sw-override signal in device mode

[Manu Gautam <mgautam@codeaurora.org>]

VBUS signal coming from PHY must be asserted in device for
controller to start operation or assert pull-up. For some
platforms where VBUS line is not connected to PHY there is
HS_PHY_CTRL register in QSCRATCH wrapper that can be used
by software to override VBUS signal going to controller.

Signed-off-by: Manu Gautam <mgautam@codeaurora.org>
---
 drivers/phy/qualcomm/phy-qcom-qusb2.c | 39 +++++++++++++++++++++++++++++++++++
 1 file changed, 39 insertions(+)

diff --git a/drivers/phy/qualcomm/phy-qcom-qusb2.c b/drivers/phy/qualcomm/phy-qcom-qusb2.c
index bda1f4c..0e9d88b 100644
--- a/drivers/phy/qualcomm/phy-qcom-qusb2.c
+++ b/drivers/phy/qualcomm/phy-qcom-qusb2.c
@@ -68,6 +68,11 @@
 #define	QUSB2PHY_IMP_CTRL2			0x224
 #define	QUSB2PHY_CHG_CTRL2			0x23c
 
+/* QSCRATCH register bits */
+#define QSCRATCH_HS_PHY_CTRL			0x10
+#define UTMI_OTG_VBUS_VALID			BIT(20)
+#define SW_SESSVLD_SEL				BIT(28)
+
 struct qusb2_phy_init_tbl {
 	unsigned int offset;
 	unsigned int val;
@@ -211,6 +216,7 @@ struct qusb2_phy_cfg {
  *
  * @phy: generic phy
  * @base: iomapped memory space for qubs2 phy
+ * @qscratch_base: iomapped memory space for qscratch region
  *
  * @cfg_ahb_clk: AHB2PHY interface clock
  * @ref_clk: phy reference clock
@@ -223,10 +229,12 @@ struct qusb2_phy_cfg {
  *
  * @cfg: phy config data
  * @has_se_clk_scheme: indicate if PHY has single-ended ref clock scheme
+ * @mode: indicate current PHY mode of operation e.g. HOST or DEVICE
  */
 struct qusb2_phy {
 	struct phy *phy;
 	void __iomem *base;
+	void __iomem *qscratch_base;
 
 	struct clk *cfg_ahb_clk;
 	struct clk *ref_clk;
@@ -239,6 +247,7 @@ struct qusb2_phy {
 
 	const struct qusb2_phy_cfg *cfg;
 	bool has_se_clk_scheme;
+	enum phy_mode mode;
 };
 
 static inline void qusb2_setbits(void __iomem *base, u32 offset, u32 val)
@@ -307,6 +316,25 @@ static void qusb2_phy_set_tune2_param(struct qusb2_phy *qphy)
 	qusb2_setbits(qphy->base, QUSB2PHY_PORT_TUNE2, val[0] << 0x4);
 }
 
+static int qusb2_phy_set_mode(struct phy *phy, enum phy_mode mode)
+{
+	struct qusb2_phy *qphy = phy_get_drvdata(phy);
+
+	qphy->mode = mode;
+
+	/* Update VBUS override in qscratch register */
+	if (qphy->qscratch_base) {
+		if (mode == PHY_MODE_USB_DEVICE)
+			qusb2_setbits(qphy->qscratch_base, QSCRATCH_HS_PHY_CTRL,
+				      UTMI_OTG_VBUS_VALID | SW_SESSVLD_SEL);
+		else
+			qusb2_clrbits(qphy->qscratch_base, QSCRATCH_HS_PHY_CTRL,
+				      UTMI_OTG_VBUS_VALID | SW_SESSVLD_SEL);
+	}
+
+	return 0;
+}
+
 static int qusb2_phy_init(struct phy *phy)
 {
 	struct qusb2_phy *qphy = phy_get_drvdata(phy);
@@ -473,6 +501,7 @@ static int qusb2_phy_exit(struct phy *phy)
 static const struct phy_ops qusb2_phy_gen_ops = {
 	.init		= qusb2_phy_init,
 	.exit		= qusb2_phy_exit,
+	.set_mode	= qusb2_phy_set_mode,
 	.owner		= THIS_MODULE,
 };
 
@@ -507,6 +536,16 @@ static int qusb2_phy_probe(struct platform_device *pdev)
 	if (IS_ERR(qphy->base))
 		return PTR_ERR(qphy->base);
 
+	/* Check if platform uses qscratch wrapper */
+	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "qscratch");
+	if (res) {
+		/* Can't request region as used by other phy and glue drivers */
+		qphy->qscratch_base = devm_ioremap(dev, res->start,
+						   resource_size(res));
+		if (IS_ERR(qphy->qscratch_base))
+			return PTR_ERR(qphy->qscratch_base);
+	}
+
 	qphy->cfg_ahb_clk = devm_clk_get(dev, "cfg_ahb");
 	if (IS_ERR(qphy->cfg_ahb_clk)) {
 		ret = PTR_ERR(qphy->cfg_ahb_clk);
-- 
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